IRF7483MPBF [INFINEON]
Brushed Motor drive applications;
| 型号： | IRF7483MPBF |
| 厂家： | 
Infineon |
| 描述： | Brushed Motor drive applications |
| 文件： | 总11页 (文件大小：515K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
StrongIRFET™
IRF7483MTRPbF
DirectFET® N-Channel Power MOSFET
Application
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
VDSS
RDS(on) typ.
max
40V
1.7m
2.3m
135A
ID (Silicon Limited)
S
S
D
D
Benefits
S
G
Improved Gate, Avalanche and Dynamic dv/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dv/dt and di/dt Capability
Lead-Free, RoHS Compliant
MF
Standard Pack
Orderable Part Number
Base part number Package Type
Form
Quantity
IRF7483MPbF
DirectFET® MF
Tape and Reel
4800
IRF7483MTRPbF
6.5
5.0
3.5
2.0
0.5
150
125
100
75
I
= 81A
D
T
= 125°C
50
J
25
T
= 25°C
J
0
4
6
8
10 12 14 16 18 20
25
50
75
100
125
150
T
, Case Temperature (°C)
C
V
Gate -to -Source Voltage (V)
GS,
Fig 2. Maximum Drain Current vs. Case Temperature
Fig 1. Typical On-Resistance vs. Gate Voltage
1
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IRF7483MTRPbF
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
Parameter
Max.
135
86
Units
A
Pulsed Drain Current
Maximum Power Dissipation
Linear Derating Factor
540
IDM
74
PD @TC = 25°C
W
W/°C
V
0.59
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
± 20
VGS
TJ
TSTG
-55 to + 150
°C
Avalanche Characteristics
EAS (Thermally limited) Single Pulse Avalanche Energy
69
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy Tested Value
Avalanche Current
mJ
EAS (Thermally limited)
152
147
EAS (tested)
IAR
A
See Fig.15,16, 23a, 23b
EAR
Repetitive Avalanche Energy
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
12.5
20
Max.
60
Units
Junction-to-Ambient
RJA
Junction-to-Ambient
Junction-to-Ambient
Junction-to-Case
Junction-to-PCB Mounted
–––
–––
1.7
RJA
°C/W
RJA
RJC
–––
1.0
–––
RJ-PCB
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
40
––– –––
V
–––
32 ––– mV/°C Reference to 25°C, ID = 1.0mA
V(BR)DSS/TJ
RDS(on)
––– 1.7
––– 3.4 –––
2.2 3.0 3.9
2.3
VGS = 10V, ID = 81A
m
V
GS = 6.0V, ID = 41A
VDS = VGS, ID = 100µA
VGS(th)
IDSS
Gate Threshold Voltage
V
––– ––– 1.0
––– ––– 150
––– ––– 100
––– ––– -100
––– 1.2 –––
V
DS = 40V, VGS = 0V
Drain-to-Source Leakage Current
µA
V
DS = 40V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
VGS = 20V
GS = -20V
nA
V
RG
Notes:
Mounted on minimum footprint full size board with metalized
back and with small clip heatsink.
TC measured with thermocouple mounted to top (Drain) of part.
Used double sided cooling , mounting pad with large heatsink.
Mounted to a PCB with small clip
heatsink (still air)
Mounted on minimum footprint full size
board with metalized back and with
small clip heatsink (still air)
Surface mounted on 1 in. square Cu
board (still air).
2
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IRF7483MTRPbF
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Min. Typ. Max. Units
Conditions
DS = 10V, ID = 81A
gfs
Qg
125 ––– –––
S
V
–––
–––
–––
–––
–––
–––
–––
–––
81
21
28
53
15
53
39
25
ID = 81A
VDS =20V
Qgs
Qgd
Qsync
td(on)
tr
–––
–––
–––
–––
–––
–––
–––
nC
VGS = 10V
ID = 81A, VDS =0V, VGS = 10V
VDD = 20V
ID = 30A
ns
td(off)
tf
RG = 2.7
VGS = 10V
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 3913 –––
––– 642 –––
––– 431 –––
V
GS = 0V
VDS = 25V
ƒ = 1.0MHz
pF
C
C
oss eff. (ER) Effective Output Capacitance (Energy Related) ––– 765 –––
oss eff. (TR) Effective Output Capacitance (Time Related) ––– 932 –––
VGS = 0V, VDS = 0V to 32V
VGS = 0V, VDS = 0V to 32V
Diode Characteristics
Symbol Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
MOSFET symbol
showing the
integral reverse
p-n junction diode.
––– –––
––– –––
74
A
V
G
ISM
540
S
VSD
Diode Forward Voltage
––– ––– 1.2
TJ= 25°C,IS = 81A, VGS = 0V
dv/dt
Peak Diode Recovery
TJ =150°C,IS = 81A,
VDS = 40V
––– 2.4 ––– V/ns
trr
Reverse Recovery Time
–––
–––
–––
–––
38
39
42
46
–––
–––
–––
–––
TJ = 25° C VR = 34V,
ns
IF = 81A
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
di/dt = 100A/µs
Qrr
IRRM
Reverse Recovery Charge
Reverse Recovery Current
nC
A
––– 1.9 –––
Notes:
Coss eff. (ER) is a fixed capacitance that gives the
Repetitive rating; pulse width limited by max. junction
temperature.
same energy as Coss while VDS is rising from 0 to
80% VDSS
.
Limited by TJmax, starting TJ = 25°C, L = 0.021mH
When mounted on 1" square PCB (FR-4 or G-10
Material). For recommended footprint and soldering
techniques refer to application note # AN-994.
http://www.irf.com/technical-info/appnotes/an-994.pdf
R is measured at TJ approximately 90°C.
RG = 50, IAS = 81A, VGS =10V.
ISD ≤ 81A, di/dt ≤ 839A/µs, VDD ≤ V(BR)DSS, TJ ≤ 150°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the
same charging time as Coss while VDS is rising from 0
This value determined from sample failure population,
to 80% VDSS
.
starting TJ = 25°C, L= 0.021mH, RG = 50, IAS = 81A,
VGS =10V.
Limited by TJmax, starting TJ = 25°C, L = 1mH
RG = 50, IAS = 17A, VGS =10V.
3
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IRF7483MTRPbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
4.5V
60µs PULSE WIDTH
60µs PULSE WIDTH
Tj = 25°C
Tj = 150°C
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 3. Typical Output Characteristics
Fig 4. Typical Output Characteristics
2.0
1.5
1.0
0.5
0.0
1000
100
10
I
= 81A
D
V
= 10V
GS
T
= 150°C
J
T
= 25°C
= 10V
J
V
DS
60µs PULSE WIDTH
1.0
2
3
4
5
6
7
8
-60 -40 -20
T
0
20 40 60 80 100 120 140 160
, Junction Temperature (°C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
14.0
100000
10000
1000
V
C
= 0V,
f = 1 MHZ
GS
I = 81A
D
= C + C , C SHORTED
iss
gs
gd ds
12.0
C
= C
rss
gd
V
V
= 32V
= 20V
DS
DS
C
= C + C
oss
ds
gd
10.0
8.0
6.0
4.0
2.0
0.0
C
iss
C
oss
rss
C
100
0
20
40
60
80
100
0.1
1
10
100
Q , Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRF7483MTRPbF
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 150°C
J
100µsec
1msec
T
= 25°C
= 0V
J
DC
1
10msec
1
Tc = 25°C
Tj = 150°C
Single Pulse
0.1
V
GS
0.01
0.1
0.1
1
10
100
0.3
0.4
V
0.5
0.6
0.7
0.8
0.9
1.0
V
, Drain-to-Source Voltage (V)
DS
, Source-to-Drain Voltage (V)
SD
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
0.6
48
Id = 1.0mA
47
46
45
44
43
42
41
40
39
0.5
0.4
0.3
0.2
0.1
0.0
-5
0
5
10 15 20 25 30 35 40 45
-60 -40 -20
0
20 40 60 80 100 120 140 160
, Temperature ( °C )
T
J
V
Drain-to-Source Voltage (V)
DS,
Fig 12. Typical Coss Stored Energy
Fig 11. Drain-to-Source Breakdown Voltage
10
VGS = 5.5V
9
8
7
6
5
4
3
2
1
0
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
VGS = 10V
0
25 50 75 100 125 150 175 200
I , Drain Current (A)
D
Fig 13. Typical On-Resistance vs. Drain Current
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IRF7483MTRPbF
10
1
D = 0.50
0.20
0.10
0.05
0.1
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 125°C and
Tstart =25°C (Single Pulse)
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 125°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
80
70
60
50
40
30
20
10
0
TOP
Single Pulse
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
BOTTOM 1.0% Duty Cycle
I
= 81A
D
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
25
50
75
100
125
150
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
I
av = 2T/ [1.3·BV·Zth]
Fig 16. Maximum Avalanche Energy vs. Temperature
EAS (AR) = PD (ave)· av
t
6
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IRF7483MTRPbF
4.5
4.0
3.5
3.0
2.5
2.0
1.5
8
7
6
5
4
3
2
1
I
= 54A
= 34V
F
V
R
T = 25°C
J
T = 125°C
J
I
I
I
I
= 100µA
= 250µA
= 1.0mA
= 1.0A
D
D
D
D
-75 -50 -25
0
25 50 75 100 125 150
100
200
300
400
500
600
T
, Temperature ( °C )
di /dt (A/µs)
J
F
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
160
8
7
6
5
4
3
2
1
I
= 54A
= 34V
I
= 81A
= 34V
F
F
140
120
100
80
V
V
R
R
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
60
40
20
100
200
300
400
500
600
100
200
300
400
500
600
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig 20. Typical Stored Charge vs. dif/dt
Fig 19. Typical Recovery Current vs. dif/dt
160
I
= 81A
F
140
120
100
80
V
= 34V
R
T = 25°C
J
T = 125°C
J
60
40
20
100
200
300
400
500
600
di /dt (A/µs)
F
Fig 21. Typical Stored Charge vs. dif/dt
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IRF7483MTRPbF
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
I
0.01
t
AS
p
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
Fig 25a. Gate Charge Test Circuit
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IRF7483MTRPbF
DirectFET® Board Footprint, MF Outline
(Medium Size Can, E-Designation)
Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®.
This includes all recommendations for stencil and substrate designs.
G = GATE
D = DRAIN
S = SOURCE
D
D
D
D
G
S
S
S
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRF7483MTRPbF
DirectFET® Outline Dimension, MF Outline
(Medium Size Can, E-Designation)
Please see DirectFET® application note AN-1035 for all details regarding the assembly of DirectFET®. This includes all
recommendations for stencil and substrate designs.
DIMENSIONS
METRIC
IMPERIAL
CODE MIN MAX
MIN
MAX
0.250
0.199
0.156
0.018
0.024
0.044
0.038
0.052
0.017
0.024
0.036
0.083
0.028
A
B
C
D
E
F
6.25 6.35
4.80 5.05
3.85 3.95
0.35 0.45
0.58 0.62
1.08 1.12
0.93 0.97
1.28 1.32
0.38 0.42
0.58 0.62
0.88 0.92
2.08 2.12
0.59 0.70
0.246
0.189
0.152
0.014
0.023
0.043
0.037
0.050
0.015
0.023
0.035
0.082
0.023
G
H
J
J1
K
L
M
N
P
0.02 0.08 0.0008 0.003
0.08 0.17
0.003
0.007
Dimensions are shown in
millimeters (inches)
DirectFET® Part Marking
LOGO
GATE MARKING
PART NUMBER
BATCH NUMBER
DATE CODE
Line above the last character of
the date code indicates "Lead-Free"
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRF7483MTRPbF
DirectFET® Tape & Reel Dimension (Showing component orientation).
LOADED TAPE FEED DIRECTION
NOTE: Controlling dimensions in mm
Std reel quantity is 4800 parts. (ordered as IRF7483MTRPBF). For 1000 parts on 7"
reel, order IRF7483MTR1PBF
REEL DIMENSIONS
DIMENSIONS
METRIC
STANDARD OPTION (QTY 4800)
METRIC
IMPERIAL
MIN
MAX
TR1 OPTION (QTY 1000)
METRIC
IMPERIAL
IMPERIAL
NOTE: CONTROLLING
DIMENSIONS IN MM
CODE
MIN
MAX
0.319
0.161
0.484
0.219
0.209
0.264
N.C
MIN
MAX
8.10
4.10
12.30
5.55
5.30
6.70
N.C
CODE
MIN
12.992
0.795
0.504
0.059
3.937
N.C
MAX
N.C
MIN
6.9
MAX
N.C
N.C
0.50
N.C
N.C
0.53
N.C
N.C
MIN
MAX
N.C
A
B
C
D
E
F
0.311
0.154
0.469
0.215
0.201
0.256
0.059
0.059
7.90
3.90
11.90
5.45
5.10
6.50
1.50
1.50
A
B
C
D
E
F
330.0
20.2
12.8
1.5
N.C
N.C
13.2
N.C
N.C
18.4
14.4
15.4
177.77
19.06
13.5
1.5
0.75
0.53
0.059
2.31
N.C
N.C
N.C
0.520
N.C
12.8
N.C
100.0
N.C
58.72
N.C
N.C
N.C
0.724
0.567
0.606
13.50
12.01
12.01
G
H
0.488
0.469
0.47
0.47
12.4
11.9
11.9
11.9
G
H
0.063
1.60
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Qualification Information†
Industrial *
(per JEDEC JESD47F†† guidelines)
Qualification Level
MSL1
DFET 1.5
Moisture Sensitivity Level
RoHS Compliant
(per JEDEC J-STD-020D††)
Yes
†
Qualification standards can be found at International Rectifier’s web site
http://www.irf.com/product-info/reliability
††
Applicable version of JEDEC standard at the time of product release.
* Industrial qualification standards except autoclave test conditions.
Revision History
Date
Comments
Updated registered trademark from DirectFETTM to DirectFET® on page 1,9 and 10.
05/14/2015
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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