IRF9520NPBF [INFINEON]
HEXFET POWER MOSFET; HEXFET功率MOSFET型号: | IRF9520NPBF |
厂家: | Infineon |
描述: | HEXFET POWER MOSFET |
文件: | 总8页 (文件大小:157K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 95411
IRF9520NPbF
HEXFET® Power MOSFET
l Advanced Process Technology
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
D
VDSS = -100V
RDS(on) = 0.48Ω
l P-Channel
G
l Fully Avalanche Rated
l Lead-Free
ID = -6.8A
S
Description
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This benefit,
combined with the fast switching speed and ruggedized
device design that HEXFET Power MOSFETs are well
knownfor, providesthedesignerwithanextremelyefficient
and reliable device for use in a wide variety of applications.
The TO-220 package is universally preferred for all
commercial-industrial applications at power dissipation
levelstoapproximately50watts. Thelowthermalresistance
and low package cost of the TO-220 contribute to its wide
acceptance throughout the industry.
TO-220AB
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ -10V
Continuous Drain Current, VGS @ -10V
Pulsed Drain Current
-6.8
-4.8
-27
A
PD @TC = 25°C
Power Dissipation
48
W
W/°C
V
Linear Derating Factor
0.32
± 20
140
-4.0
4.8
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energy
Avalanche Current
mJ
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating
mJ
V/ns
-5.0
Junction
and-55
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 srew
°C
300 (1.6mm from case )
10 lbfin (1.1Nm)
Thermal Resistance
Parameter
Junction-to-Case
Typ.
Max.
Units
RθJC
RθCS
RθJA
3.1
62
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
°C/W
06/15/04
IRF9520NPbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
-100
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = -250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient -0.10 V/°C Reference to 25°C, ID = -1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
0.48
-2.0 -4.0
Ω
V
S
VGS = -10V, ID = -4.0A
VDS = VGS, ID = -250µA
VDS = -50V, ID = -4.0A
Forward Transconductance
1.4
-25
-250
100
-100
27
5.0
15
V
DS = -100V, VGS = 0V
VDS = -80V, VGS = 0V, TJ = 150°C
VGS = 20V
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
ID = -4.0A
Qg
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = -80V
VGS = -10V, See Fig. 6 and 13
14
47
28
31
VDD = -50V
ID = -4.0A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 22Ω
RD = 12Ω, See Fig. 10
Between lead,
6mm (0.25in.)
from package
D
4.5
LD
LS
Internal Drain Inductance
Internal Source Inductance
nH
pF
G
7.5
and center of die contact
VGS = 0V
S
Ciss
Coss
Crss
Input Capacitance
350
110
Output Capacitance
VDS = -25V
Reverse Transfer Capacitance
70
= 1.0MHz, See Fig. 5
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
showing the
D
IS
-6.8
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
-27
p-n junction diode.
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
-1.6
100 150
420 630
V
TJ = 25°C, IS = -4.0A, VGS = 0V
ns
TJ = 25°C, IF = -4.0A
Qrr
ton
nC di/dt = -100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Repetitive rating; pulse width limited by
ISD ≤ -4.0A, di/dt ≤ -300A/µs, VDD ≤ V(BR)DSS
,
max. junction temperature. ( See fig. 11 )
TJ ≤ 175°C
Starting TJ = 25°C, L = 18 mH
Pulse width ≤ 300µs; duty cycle ≤ 2%.
RG = 25Ω, IAS = -4.0A. (See Figure 12)
IRF9520NPbF
100
10
1
100
10
1
VGS
VGS
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
TOP
-15V
-10V
-8.0V
-7.0V
-6.0V
-5.5V
-5.0V
TOP
BOTTOM-4.5V
BOTTOM-4.5V
-4.5V
20µs PULSE WIDTH
T = 150 C
J
-4.5V 20µs PULSE WIDTH
°
°
T = 25 C
J
0.1
0.1
0.1
0.1
1
10
100
1
10
100
-V , Drain-to-Source Voltage (V)
DS
-V , Drain-to-Source Voltage (V)
DS
Fig 2. Typical Output Characteristics,
Fig 1. Typical Output Characteristics,
100
2.5
-6.7A
=
I
D
2.0
1.5
1.0
0.5
0.0
°
T = 175 C
J
10
°
T = 25 C
J
1
V
= 10V
DS
20µs PULSE WIDTH
V
=-10V
GS
0.1
4
5
6
7
8
9
10
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
-V , Gate-to-Source Voltage (V)
GS
T , Junction Temperature ( C)
J
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
IRF9520NPbF
20
16
12
8
800
I
D
= -4.0 A
V
= 0V,
f = 1MHz
C SHORTED
ds
GS
V
V
V
=-80V
=-50V
=-20V
DS
DS
DS
C
= C + C
iss
gs
gd ,
C
= C
rss
gd
C
= C + C
gd
oss
ds
600
400
200
0
C
iss
C
C
oss
rss
4
FOR TEST CIRCUIT
SEE FIGURE 13
0
0
5
10
15
20
25
1
10
100
Q , Total Gate Charge (nC)
G
-V , Drain-to-Source Voltage (V)
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
100
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
°
T = 175 C
J
10
100us
°
T = 25 C
J
1ms
1
10ms
°
T = 25 C
C
°
T = 175 C
Single Pulse
J
V
= 0 V
GS
0.1
0.2
0.1
0.8
1.4
2.0
2.6
1
10
100
1000
-V ,Source-to-Drain Voltage (V)
SD
-V , Drain-to-Source Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
IRF9520NPbF
RD
VDS
8.0
6.0
4.0
2.0
0.0
VGS
D.U.T.
RG
-
+
VDD
-10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
t
t
r
t
t
f
d(on)
d(off)
V
GS
10%
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
90%
V
DS
Fig 9. Maximum Drain Current Vs.
Fig 10b. Switching Time Waveforms
Case Temperature
10
D = 0.50
1
0.20
0.10
0.05
P
2
0.02
0.01
DM
SINGLE PULSE
(THERMAL RESPONSE)
0.1
t
1
t
2
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
IRF9520NPbF
L
V
DS
400
300
200
100
0
I
D
TOP
-1.7A
-2.5A
BOTTOM -4.0A
D.U.T
AS
R
G
V
DD
A
I
DRIVER
-20V
0.01
Ω
t
p
15V
Fig 12a. Unclamped Inductive Test Circuit
I
AS
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
t
p
V
(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
Q
G
.2µF
12V
.3µF
-10V
-
V
+
DS
Q
Q
GD
GS
D.U.T.
V
GS
V
G
-3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
IRF9520NPbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T*
-
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
VDD
VGS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
]
[
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For P-Channel HEXFETS
IRF9520NPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
2- DRAIN
3- SOURCE
1
2
3
1- GATE
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMP LE: THIS IS AN IRF1010
LO T C O DE 1789
P ART NUMBER
ASS EMB LED O N WW 19, 1997
IN THE AS S EMBLY LINE "C"
INTERNATIO NAL
RECT IF IER
LO G O
Note: "P" in assembly line
position indicates "Lead-Free"
DATE C O DE
YEAR 7 = 1997
WEEK 19
AS S E MB LY
LO T CO DE
LINE C
Data and specifications subject to change without notice.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/04
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