IRFB16N60LPBF [INFINEON]
SMPS MOSFET; 开关电源MOSFET
| 型号： | IRFB16N60LPBF |
| 厂家： | 
Infineon |
| 描述： | SMPS MOSFET |
| 文件： | 总9页 (文件大小：196K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95471
SMPS MOSFET
IRFB16N60LPbF
HEXFET® Power MOSFET
Applications
• Zero Voltage Switching SMPS
• Telecom and Server Power Supplies
• Uninterruptible Power Supplies
• Motor Control applications
• Lead-Free
Trr typ.
VDSS RDS(on) typ.
385m
ID
600V
Ω
130ns 16A
Features and Benefits
• SuperFast body diode eliminates the need for external
diodes in ZVS applications.
• Lower Gate charge results in simpler drive requirements.
• Enhanced dv/dt capabilities offer improved ruggedness.
TO-220AB
• Higher Gate voltage threshold offers improved noise immunity.
Absolute Maximum Ratings
Parameter
Max.
16
Units
A
Continuous Drain Current, VGS @ 10V
I
I
I
@ T = 25°C
C
D
D
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
@ T = 100°C
C
10
60
DM
P
@T = 25°C
Power Dissipation
C
310
W
D
Linear Derating Factor
Gate-to-Source Voltage
2.5
±30
W/°C
V
V
GS
Peak Diode Recovery dv/dt
Operating Junction and
dv/dt
10
V/ns
T
J
-55 to + 150
T
Storage Temperature Range
°C
STG
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
300 (1.6mm from case )
1.1(10)
N•m (lbf•in)
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
D
I
I
Continuous Source Current
––– –––
––– –––
––– –––
16
MOSFET symbol
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
60
SM
S
(Body Diode)
p-n junction diode.
V
t
T = 25°C, I = 16A, V = 0V
J S GS
Diode Forward Voltage
Reverse Recovery Time
1.5
V
SD
T = 25°C, I = 16A
––– 130 200
––– 240 360
ns
rr
J
F
TJ = 125°C, di/dt = 100A/µs
Q
rr
T = 25°C, I = 16A, V = 0V
Reverse Recovery Charge
––– 450 670 nC
––– 1080 1620
J
S
GS
TJ = 125°C, di/dt = 100A/µs
IRRM
T = 25°C
J
Reverse Recovery Current
Forward Turn-On Time
––– 5.8
8.7
A
t
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
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1
7/7/04
IRFB16N60LPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
600
–––
0.39
385
–––
–––
–––
–––
–––
0.79
–––
V
∆
∆
V(BR)DSS/ TJ
Breakdown Voltage Temp. Coefficient –––
––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
IDSS
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
3.0
460
5.0
VGS = 10V, ID = 9.0A
VDS = VGS, ID = 250µA
mΩ
V
Drain-to-Source Leakage Current
–––
–––
–––
–––
–––
50
µA VDS = 600V, VGS = 0V
mA VDS = 480V, VGS = 0V, TJ = 125°C
nA VGS = 30V
2.0
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
100
-100
–––
VGS = -30V
Ω
f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 9.0A
8.3
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
20
–––
100
30
S
Qg
ID = 16A
Qgs
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 480V
VGS = 10V, See Fig. 7 & 15
VDD = 300V
ns ID = 16A
Qgd
46
td(on)
–––
–––
–––
–––
tr
44
td(off)
Turn-Off Delay Time
Fall Time
28
RG = 1.8Ω
tf
5.5
VGS = 10V, See Fig. 11a & 11b
VGS = 0V
Ciss
Input Capacitance
––– 2720 –––
Coss
Output Capacitance
–––
–––
–––
–––
260
20
–––
–––
–––
–––
VDS = 25V
Crss
Reverse Transfer Capacitance
Effective Output Capacitance
Effective Output Capacitance
pF ƒ = 1.0MHz, See Fig. 5
VGS = 0V,VDS = 0V to 480V
Coss eff.
Coss eff. (ER)
120
100
(Energy Related)
Avalanche Characteristics
Parameter
Typ.
–––
–––
–––
Max.
310
16
Units
mJ
A
Symbol
EAS
Single Pulse Avalanche Energy
Avalanche Current
IAR
Repetitive Avalanche Energy
EAR
31
mJ
Thermal Resistance
Symbol
Parameter
Junction-to-Case
Junction-to-Ambient
Typ.
–––
Max.
0.4
Units
°C/W
Rθ
Rθ
JC
–––
62
JA
Notes:
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff.(ER) is a fixed capacitance that stores the same energy
as Coss while VDS is rising from 0 to 80% VDSS
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11)
Starting TJ = 25°C, L = 2.5mH, RG = 25Ω,
IAS = 16A, dv/dt = 10V/ns. (See Figure 12a)
ISD ≤ 16A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C.
.
.
,
2
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IRFB16N60LPbF
1000
100
10
100
10
VGS
15V
12V
VGS
TOP
TOP
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
5.0V
10V
9.0V
8.0V
7.0V
6.0V
5.0V
BOTTOM
BOTTOM
5.0V
1
1
5.0V
0.1
0.1
0.01
0.01
0.001
20µs PULSE WIDTH
Tj = 150°C
20µs PULSE WIDTH
Tj = 25°C
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
3.0
I
= 15A
D
V
= 10V
GS
2.5
2.0
1.5
1.0
0.5
0.0
T
= 150°C
J
10
1
T
6
= 25°C
J
0.1
0.01
V
= 50V
DS
20µs PULSE WIDTH
4
8
10
12
14
16
-60 -40 -20
0
20 40 60 80 100 120 140 160
V
, Gate-to-Source Voltage (V)
T
J
, Junction Temperature (°C)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs. Temperature
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3
IRFB16N60LPbF
25
20
15
10
5
100000
V
= 0V,
f = 1 MHZ
GS
C
= C + C , C SHORTED
iss
gs gd ds
C
= C
rss
gd
10000
1000
100
10
C
= C + C
ds gd
oss
C
iss
C
oss
C
rss
0
1
0
100 200 300 400 500 600 700
Drain-to-Source Voltage (V)
1
10
100
1000
V
, Drain-to-Source Voltage (V)
DS
V
DS,
Fig 5. Typical Capacitance vs.
Fig 6. Typ. Output Capacitance
Drain-to-Source Voltage
Stored Energy vs. VDS
12.0
10.0
8.0
100.00
10.00
1.00
I = 15A
D
V
V
V
= 480V
= 300V
= 120V
DS
DS
DS
T
= 150°C
J
6.0
T
= 25°C
J
4.0
2.0
V
= 0V
GS
0.0
0.10
0
10
20
30
40
50
60
70
0.2
0.4
V
0.6
0.8
1.0
1.2
1.4
1.6
Q
Total Gate Charge (nC)
, Source-to-Drain Voltage (V)
G
SD
Fig 8. Typical Source-Drain Diode
Fig 7. Typical Gate Charge vs.
Forward Voltage
Gate-to-Source Voltage
4
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IRFB16N60LPbF
1000
100
10
18
16
14
12
10
8
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100µsec
6
1msec
1
4
Tc = 25°C
Tj = 150°C
Single Pulse
2
10msec
1000
0.1
0
1
10
100
10000
25
50
T
75
100
125
150
V
, Drain-to-Source Voltage (V)
, Case Temperature (°C)
DS
C
Fig 9. Maximum Safe Operating Area
Fig 10. Maximum Drain Current vs.
Case Temperature
RD
V
VDS
DS
90%
VGS
D.U.T.
RG
+VDD
-
10%
10V
V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
t
t
r
t
t
f
d(on)
d(off)
Fig 11b. Switching Time Waveforms
Fig 11a. Switching Time Test Circuit
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5
IRFB16N60LPbF
1
D = 0.50
0.1
0.20
0.10
0.05
P
DM
0.02
0.01
0.01
t
1
t
2
Notes:
SINGLE PULSE
( THERMAL RESPONSE )
1. Duty factor D =
t
/ t
1
2
2. Peak T
= P
x
Z
+ T
J
DM
thJC
C
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5.0
4.5
4.0
3.5
I
= 250µA
D
3.0
2.5
2.0
-75 -50 -25
0
25 50 75 100 125 150 175
, Temperature ( °C )
T
J
Fig 13. Threshold Voltage vs. Temperature
6
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IRFB16N60LPbF
600
500
400
300
200
100
0
I
D
TOP
7.2A
10A
BOTTOM 16A
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
J
Fig 14a. Maximum Avalanche Energy
vs. Drain Current
15V
V
(BR)DSS
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01Ω
t
p
I
AS
Fig 14b. Unclamped Inductive Test Circuit
Fig 14c. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
Q
G
50KΩ
.2µF
VGS
V
12V
.3µF
Q
+
GS
GD
V
DS
D.U.T.
-
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 15b. Basic Gate Charge Waveform
Fig 15a. Gate Charge Test Circuit
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7
IRFB16N60LPbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 16. For N-Channel HEXFET® Power MOSFETs
8
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IRFB16N60LPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
1
2
3
1- GATE
1- GATE
2- DRAIN
3- SOURCE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
E XAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
AS S EMBLED ON WW 19, 1997
IN T HE AS S E MBLY LINE "C"
INT ERNAT IONAL
RE CT IFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DAT E CODE
YEAR 7 = 1997
WEEK 19
AS SE MBLY
LOT CODE
LINE C
TO-220AB package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.7/04
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