IRFB4110 [INFINEON]

The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. ;
IRFB4110
型号: IRFB4110
厂家: Infineon    Infineon
描述:

The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. 

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IRFB4110PbF  
HEXFET® Power MOSFET  
Applications  
l High Efficiency Synchronous Rectification in SMPS  
l Uninterruptible Power Supply  
l High Speed Power Switching  
D
S
VDSS  
RDS(on) typ.  
max.  
ID (Silicon Limited)  
ID (Package Limited)  
100V  
3.7m  
4.5m  
180A  
l Hard Switched and High Frequency Circuits  
G
120A  
Benefits  
l Improved Gate, Avalanche and Dynamic dv/dt  
D
Ruggedness  
l Fully Characterized Capacitance and Avalanche  
SOA  
S
l Enhanced body diode dV/dt and dI/dt Capability  
l Lead Free  
D
G
l RoHS Compliant, Halogen-Free  
TO-220AB  
G
D
S
Gate  
Drain  
Source  
Standard Pack  
Base Part Number  
Package Type  
Orderable Part Number  
Form  
Quantity  
IRFB4110PbF  
TO-220  
Tube  
50  
IRFB4110PbF  
Absolute Maximum Ratings  
Symbol  
Parameter  
Max.  
180  
130  
120  
670  
370  
2.5  
Units  
A
ID @ TC = 25°C  
Continuous Drain Current, VGS @ 10V (Silicon Limited)  
Continuous Drain Current, VGS @ 10V (Silicon Limited)  
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)  
Pulsed Drain Current  
ID @ TC = 100°C  
ID @ TC = 25°C  
IDM  
PD @TC = 25°C  
W
Maximum Power Dissipation  
Linear Derating Factor  
W/°C  
V
VGS  
± 20  
5.3  
Gate-to-Source Voltage  
Peak Diode Recovery  
dv/dt  
TJ  
V/ns  
-55 to + 175  
°C  
Operating Junction and  
TSTG  
Storage Temperature Range  
300  
Soldering Temperature, for 10 seconds  
(1.6mm from case)  
10lb in (1.1N m)  
Mounting torque, 6-32 or M3 screw  
Avalanche Characteristics  
Single Pulse Avalanche Energy  
EAS (Thermally limited)  
190  
mJ  
A
Avalanche Current  
IAR  
See Fig. 14, 15, 22a, 22b  
Repetitive Avalanche Energy  
EAR  
mJ  
Thermal Resistance  
Symbol  
Parameter  
Typ.  
–––  
Max.  
0.402  
–––  
Units  
Rθ  
JC  
Junction-to-Case  
RθCS  
0.50  
–––  
°C/W  
Case-to-Sink, Flat Greased Surface  
Junction-to-Ambient  
Rθ  
JA  
62  
1
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April 28, 2014  
IRFB4110PbF  
Static @ TJ = 25°C (unless otherwise specified)  
Symbol  
V(BR)DSS  
Parameter  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
Min. Typ. Max. Units  
100 ––– –––  
––– 0.108 ––– V/°C Reference to 25°C, ID = 5mA  
Conditions  
VGS = 0V, ID = 250µA  
V
V(BR)DSS/TJ  
RDS(on)  
–––  
2.0  
3.7  
4.5  
4.0  
20  
VGS = 10V, ID = 75A  
mΩ  
V
VGS(th)  
–––  
VDS = VGS, ID = 250µA  
IDSS  
Drain-to-Source Leakage Current  
––– –––  
µA  
VDS = 100V, VGS = 0V  
VDS = 100V, VGS = 0V, TJ = 125°C  
VGS = 20V  
V
––– ––– 250  
––– ––– 100  
––– ––– -100  
IGSS  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
nA  
GS = -20V  
Dynamic @ TJ = 25°C (unless otherwise specified)  
Symbol  
gfs  
Qg  
Parameter  
Forward Transconductance  
Total Gate Charge  
Min. Typ. Max. Units  
Conditions  
VDS = 50V, ID = 75A  
160 ––– –––  
S
––– 150 210  
nC ID = 75A  
VDS = 50V  
Qgs  
Qgd  
Gate-to-Source Charge  
–––  
–––  
35  
43  
–––  
–––  
Gate-to-Drain ("Miller") Charge  
VGS = 10V  
RG  
td(on)  
tr  
–––  
–––  
–––  
–––  
–––  
Gate Resistance  
Turn-On Delay Time  
Rise Time  
1.3  
25  
67  
78  
88  
–––  
–––  
–––  
–––  
–––  
ns VDD = 65V  
ID = 75A  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
RG = 2.6Ω  
VGS = 10V  
Ciss  
Coss  
Crss  
Input Capacitance  
Output Capacitance  
Reverse Transfer Capacitance  
––– 9620 –––  
––– 670 –––  
––– 250 –––  
––– 820 –––  
––– 950 –––  
pF  
V
GS = 0V  
VDS = 50V  
ƒ = 1.0MHz  
Coss eff. (ER)  
V
GS = 0V, VDS = 0V to 80V  
GS = 0V, VDS = 0V to 80V  
Effective Output Capacitance (Energy Related)  
Effective Output Capacitance (Time Related)  
Coss eff. (TR)  
V
Diode Characteristics  
Symbol  
Parameter  
Min. Typ. Max. Units  
Conditions  
MOSFET symbol  
IS  
D
S
Continuous Source Current  
––– –––  
A
170  
(Body Diode)  
Pulsed Source Current  
(Body Diode)  
showing the  
integral reverse  
G
ISM  
––– ––– 670  
p-n junction diode.  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
––– –––  
1.3  
75  
V
TJ = 25°C, IS = 75A, VGS = 0V  
TJ = 25°C  
TJ = 125°C  
TJ = 25°C  
TJ = 125°C  
TJ = 25°C  
VR = 85V,  
IF = 75A  
di/dt = 100A/µs  
–––  
–––  
–––  
50  
60  
94  
ns  
90  
Qrr  
Reverse Recovery Charge  
140  
nC  
––– 140 210  
––– 3.5 –––  
IRRM  
ton  
Reverse Recovery Current  
Forward Turn-On Time  
A
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
 Calculated continuous current based on maximum allowable junction  
temperature. Bond wire current limit is 120A. Note that current  
limitations arising from heating of the device leads may occur with  
„ ISD 75A, di/dt 630A/µs, VDD V(BR)DSS, TJ 175°C.  
Pulse width 400µs; duty cycle 2%.  
† Coss eff. (TR) is a fixed capacitance that gives the same charging time  
as Coss while VDS is rising from 0 to 80% VDSS  
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as  
Coss while VDS is rising from 0 to 80% VDSS  
ˆ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom  
mended footprint and soldering techniques refer to application note #AN-994.  
.
some lead mounting arrangements.  
‚ Repetitive rating; pulse width limited by max. junction  
temperature.  
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.033mH  
RG = 25, IAS = 108A, VGS =10V. Part not recommended for use  
above this value.  
.
‰ Rθ is measured at TJ approximately 90°C.  
2
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April 28, 2014  
IRFB4110PbF  
1000  
100  
10  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
6.0V  
5.5V  
5.0V  
4.8V  
4.5V  
VGS  
15V  
10V  
8.0V  
6.0V  
5.5V  
5.0V  
4.8V  
4.5V  
TOP  
TOP  
BOTTOM  
BOTTOM  
4.5V  
4.5V  
60µs PULSE WIDTH  
Tj = 175°C  
60µs PULSE WIDTH  
Tj = 25°C  
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
1000  
100  
10  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
I
= 75A  
D
V
= 10V  
GS  
T
= 25°C  
J
T
= 175°C  
J
1
V
= 25V  
DS  
60µs PULSE WIDTH  
0.1  
1
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180  
, Junction Temperature (°C)  
T
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 4. Normalized On-Resistance vs. Temperature  
Fig 3. Typical Transfer Characteristics  
100000  
10000  
1000  
12.0  
V
= 0V,  
= C  
f = 1 MHZ  
GS  
I = 75A  
D
C
C
C
+ C , C  
SHORTED  
ds  
iss  
gs  
gd  
= C  
10.0  
rss  
oss  
gd  
= C + C  
V
= 80V  
= 50V  
ds  
gd  
DS  
V
DS  
C
8.0  
6.0  
4.0  
2.0  
0.0  
iss  
C
oss  
C
rss  
100  
1
10  
, Drain-to-Source Voltage (V)  
100  
0
50  
100  
150  
200  
V
Q , Total Gate Charge (nC)  
DS  
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage  
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Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage  
3
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April 28, 2014  
IRFB4110PbF  
10000  
1000  
100  
10  
1000  
100  
10  
OPERATION IN THIS AREA  
LIMITED BY R (on)  
DS  
T
= 175°C  
J
T
= 25°C  
100µsec  
J
1msec  
1
1
10msec  
DC  
Tc = 25°C  
Tj = 175°C  
Single Pulse  
0.1  
V
= 0V  
GS  
0.01  
0.1  
0.1  
1
10  
100  
1000  
0.0  
0.5  
1.0  
1.5  
2.0  
V
, Drain-to-Source Voltage (V)  
V
, Source-to-Drain Voltage (V)  
DS  
SD  
Fig 8. Maximum Safe Operating Area  
Fig 7. Typical Source-Drain Diode Forward Voltage  
180  
125  
120  
115  
110  
105  
100  
95  
Id = 5mA  
160  
Limited By Package  
140  
120  
100  
80  
60  
40  
20  
0
90  
25  
50  
75  
100  
125  
150  
175  
-60 -40 -20 0 20 40 60 80 100120140160180  
T
, Case Temperature (°C)  
T
, Temperature ( °C )  
C
J
Fig 10. Drain-to-Source Breakdown Voltage  
Fig 9. Maximum Drain Current vs. Case Temperature  
5.0  
4.5  
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
800  
I
D
700  
600  
500  
400  
300  
200  
100  
0
TOP  
17A  
27A  
BOTTOM 108A  
0
20  
V
40  
60  
80  
100  
120  
25  
50  
75  
100  
125  
150  
175  
Starting T , Junction Temperature (°C)  
J
Drain-to-Source Voltage (V)  
DS,  
Fig 12. Maximum Avalanche Energy vs. DrainCurrent  
Submit Datasheet Feedback  
Fig 11. Typical COSS Stored Energy  
4
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April 28, 2014  
IRFB4110PbF  
1
0.1  
D = 0.50  
0.20  
0.10  
0.05  
R1  
R1  
R2  
R2  
R3  
R3  
τ
0.02  
0.01  
i (sec)  
Ri (°C/W)  
0.01  
τ
J τJ  
τ
τ
CτC  
0.09876251 0.000111  
0.2066697 0.001743  
0.09510464 0.012269  
τ
1 τ1  
τ
2 τ2  
3 τ3  
Ci= τi/Ri  
Ci= τi/Ri  
0.001  
0.0001  
SINGLE PULSE  
( THERMAL RESPONSE )  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
1000  
100  
10  
Duty Cycle = Single Pulse  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming Tj = 150°C and  
0.01  
Tstart =25°C (Single Pulse)  
0.05  
0.10  
1
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming  
Tstart = 150°C.  
j = 25°C and  
∆Τ  
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 14. Typical Avalanche Current vs.Pulsewidth  
250  
200  
150  
100  
50  
Notes on Repetitive Avalanche Curves , Figures 14, 15:  
(For further info, see AN-1005 at www.irf.com)  
1. Avalanche failures assumption:  
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of Tjmax. This is validated for every part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.  
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.  
4. PD (ave) = Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
6. Iav = Allowable avalanche current.  
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as  
25°C in Figure 14, 15).  
tav = Average time in avalanche.  
D = Duty cycle in avalanche = tav ·f  
TOP  
BOTTOM 1.0% Duty Cycle  
= 108A  
Single Pulse  
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)  
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC  
25  
50  
75  
100  
125  
150  
175  
Iav = 2DT/ [1.3·BV·Zth]  
EAS (AR) = PD (ave)·tav  
Starting T , Junction Temperature (°C)  
J
Fig 15. Maximum Avalanche Energy vs. Temperature  
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5
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IRFB4110PbF  
25  
20  
15  
10  
5
4.0  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
I = 30A  
F
V
= 85V  
R
T = 25°C  
J
T = 125°C  
J
I
I
I
= 250µA  
= 1.0mA  
= 1.0A  
D
D
D
0
0
200  
400  
600  
800  
1000  
-75 -50 -25  
0
25 50 75 100 125 150175 200  
, Temperature ( °C )  
di /dt (A/µs)  
T
F
J
Fig. 17 - Typical Recovery Current vs. dif/dt  
Fig 16. Threshold Voltage vs. Temperature  
560  
25  
I = 30A  
I = 45A  
F
F
V
= 85V  
V
= 85V  
R
480  
400  
320  
240  
160  
80  
R
20  
15  
10  
5
T = 25°C  
T = 25°C  
J
J
T = 125°C  
J
T = 125°C  
J
0
0
200  
400  
600  
800  
1000  
0
200  
400  
600  
800  
1000  
di /dt (A/µs)  
di /dt (A/µs)  
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt  
Fig. 19 - Typical Stored Charge vs. dif/dt  
560  
I = 45A  
F
V
= 85V  
R
480  
400  
320  
240  
160  
80  
T = 25°C  
J
T = 125°C  
J
0
200  
400  
600  
800  
1000  
di /dt (A/µs)  
F
Fig. 20 - Typical Stored Charge vs. dif/dt  
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6
April 28, 2014  
IRFB4110PbF  
Driver Gate Drive  
P.W.  
P.W.  
Period  
D.U.T  
Period  
D =  
+
*
=10V  
V
GS  
ƒ
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
-
D.U.T. I Waveform  
SD  
+
‚
-
Reverse  
Recovery  
Current  
Body Diode Forward  
„
Current  
di/dt  
-
+
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  

V
DD  
VDD  
Re-Applied  
Voltage  
dv/dt controlled by RG  
RG  
+
-
Body Diode  
Forward Drop  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
Inductor Current  
I
SD  
Ripple  
5%  
* VGS = 5V for Logic Level Devices  
Fig 20. Peak Diode Recovery dv/dt Test Circuit for N-Channel  
HEXFET® Power MOSFETs  
V
(BR)DSS  
15V  
t
p
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
V
2
GS  
0.01  
t
p
I
AS  
Fig 21b. Unclamped Inductive Waveforms  
Fig 21a. Unclamped Inductive Test Circuit  
LD  
VDS  
VDS  
90%  
+
-
VDD  
10%  
VGS  
D.U.T  
VGS  
Pulse Width < 1µs  
Duty Factor < 0.1%  
td(on)  
td(off)  
tr  
tf  
Fig 22a. Switching Time Test Circuit  
Fig 22b. Switching Time Waveforms  
Id  
Vds  
Vgs  
L
VCC  
DUT  
Vgs(th)  
0
1K  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 23a. Gate Charge Test Circuit  
Fig 23b. Gate Charge Waveform  
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7
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April 28, 2014  
IRFB4110PbF  
TO-220AB Package Outline  
Dimensions are shown in millimeters (inches)  
TO-220AB Part Marking Information  
INTERNATIONAL  
RECTIFIER LOGO  
INTERNATIONAL  
RECTIFIER LOGO  
PART NUMBER  
PART NUMBER  
DATE CODE  
P = LEAD-FREE  
Y = LAST DIGIT OF YEAR  
WW = WORK WEEK  
? = ASSEMBLY SITE CODE  
IRFB4110  
IRFB4110  
DATE CODE  
OR  
ASSEMBLY  
LOT CODE  
ASSEMBLY  
LOT CODE  
Y = LAST DIGIT OF YEAR  
WW = WORK WEEK  
P = LEAD-FREE  
PYWW?  
YWWP  
LC  
LC  
LC  
LC  
TO-220AB packages are not recommended for Surface Mount Application.  
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/  
8
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IRFB4110PbF  
Qualification information†  
Industrial†  
(per JEDEC JESD47F†† guidelines)  
Qualification level  
Moisture Sensitivity Level  
RoHS compliant  
TO-220  
N/A  
Yes  
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/  
†† Applicable version of JEDEC standard at the time of product release.  
Revision History  
Date  
Comment  
Updated data sheet with new IR corporate template.  
Updated package outline & part marking on page 8.  
4/28/2014  
Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.  
Updated typo on the Fig.19 and Fig.20, unit of Y-axis from "A" to "nC" on page 6.  
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA  
To contact International Rectifier, please visit http://www.irf.com/whoto-call/  
9
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April 28, 2014  
IMPORTANT NOTICE  
The information given in this document shall in no For further information on the product, technology,  
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please  
characteristics (“Beschaffenheitsgarantie”) .  
contact your nearest Infineon Technologies office  
(www.infineon.com).  
With respect to any examples, hints or any typical  
values stated herein and/or any information  
regarding the application of the product, Infineon  
Technologies hereby disclaims any and all  
warranties and liabilities of any kind, including  
without limitation warranties of non-infringement  
of intellectual property rights of any third party.  
WARNINGS  
Due to technical requirements products may  
contain dangerous substances. For information on  
the types in question please contact your nearest  
Infineon Technologies office.  
In addition, any information given in this document  
is subject to customers compliance with its  
obligations stated in this document and any  
applicable legal requirements, norms and  
standards concerning customers products and any  
use of the product of Infineon Technologies in  
customers applications.  
Except as otherwise explicitly approved by Infineon  
Technologies in a written document signed by  
authorized  
representatives  
of  
Infineon  
Technologies, Infineon Technologies’ products may  
not be used in any applications where a failure of  
the product or any consequences of the use thereof  
can reasonably be expected to result in personal  
injury.  
The data contained in this document is exclusively  
intended for technically trained staff. It is the  
responsibility of customers technical departments  
to evaluate the suitability of the product for the  
intended application and the completeness of the  
product information given in this document with  
respect to such application.  

相关型号:

IRFB4110GPBF

HEXFET Power MOSFET
INFINEON

IRFB4110PBF

High Efficiency Synchronous Rectification in SMPS
INFINEON

IRFB4110PBF

HEXFETPower MOSFET
FREESCALE

IRFB4110QPBF

HEXFET Power MOSFET
INFINEON

IRFB4110_18

N-Channel MOSFET Transistor
ISC

IRFB4115

N-Channel MOSFET Transistor
ISC

IRFB4115G

N-Channel MOSFET Transistor
ISC

IRFB4115GPBF

HEXFETPower MOSFET
INFINEON

IRFB4115PBF

HEXFET Power MOSFET
INFINEON

IRFB4127

The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. 
INFINEON

IRFB4127PBF

HEXFETPower MOSFET
INFINEON

IRFB4137PBF

High Efficiency Synchronous Rectification in SMPS
INFINEON