IRFBC40APBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRFBC40APBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总8页 (文件大小：189K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94986
SMPS MOSFET
IRFBC40APbF
HEXFET® Power MOSFET
Applications
VDSS
600V
Rds(on) max
ID
6.2A
l Switch Mode Power Supply ( SMPS )
l Uninterruptable Power Supply
l High speed power switching
l Lead-Free
1.2Ω
Benefits
l Low Gate Charge Qg results in Simple
Drive Requirement
l Improved Gate, Avalanche and Dynamic
dv/dt Ruggedness
l Fully Characterized Capacitance and
Avalanche Voltage and Current
G D S
l Effective Coss Specified ( See AN 1001)
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
6.2
3.9
25
A
PD @TC = 25°C
Power Dissipation
125
W
W/°C
V
Linear Derating Factor
1.0
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 30
Peak Diode Recovery dv/dt
Operating Junction and
6.0
V/ns
-55 to + 150
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Typical SMPS Topologies:
l Single Transistor Forward
Notes through ꢀare on page 8
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1
2/5/04
IRFBC40APbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
600 ––– –––
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.66 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
Static Drain-to-Source On-Resistance ––– ––– 1.2
Ω
V
VGS = 10V, ID = 3.7A
VDS = VGS, ID = 250µA
VDS = 600V, VGS = 0V
VDS = 480V, VGS = 0V, TJ = 125°C
VGS = 30V
Gate Threshold Voltage
2.0
––– 4.0
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
µA
nA
IDSS
IGSS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
3.4 ––– –––
Conditions
VDS = 50V, ID = 3.7A
ID = 6.2A
gfs
S
Qg
––– ––– 42
––– ––– 10
––– ––– 20
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 480V
VGS = 10V, See Fig. 6 and 13
–––
–––
–––
–––
13 –––
23 –––
31 –––
18 –––
VDD = 300V
ID = 6.2A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 9.1Ω
RD = 47Ω,See Fig. 10
VGS = 0V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 1036 –––
––– 136 –––
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
VDS = 25V
–––
7.0 –––
pF ƒ = 1.0MHz, See Fig. 5
––– 1487 –––
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 480V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 480V ꢀ
–––
–––
36 –––
48 –––
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Typ.
–––
–––
–––
Max.
570
6.2
Units
mJ
EAS
IAR
Avalanche Current
A
EAR
Repetitive Avalanche Energy
13
mJ
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
1.0
Units
RθJC
RθCS
RθJA
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
–––
62
°C/W
Diode Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
S
IS
6.2
25
––– –––
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.5
––– 431 647
––– 1.8 2.8
V
TJ = 25°C, IS = 6.2A, VGS = 0V
ns
TJ = 25°C, IF = 6.2A
Qrr
ton
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFBC40APbF
100
10
100
10
1
VGS
15V
VGS
TOP
TOP
15V
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
1
4.5V
4.5V
0.1
0.01
20µs PULSE WIDTH
20µs PULSE WIDTH
J
°
T = 150 C
J
°
T = 25 C
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2ꢀ Typical Output Characteristics,
Fig 1ꢀ Typical Output Characteristics,
100
10
1
3.0
2.5
2.0
1.5
1.0
0.5
0.0
6ꢀ2A
=
I
D
°
T = 150 C
J
°
T = 25 C
J
V
= 50V
DS
20µs PULSE WIDTH
V
=10V
GS
0.1
4.0
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
5.0
6.0
7.0
8.0 9.0
10.0
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3ꢀ Typical Transfer Characteristics
Fig 4ꢀ Normalized On-Resistance
Vsꢀ Temperature
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3
IRFBC40APbF
100000
V
C
= 0V,
f = 1 MHZ
GS
20
16
12
8
= C + C
,
C
SHORTED
6ꢀ2A
=
I
D
iss
gs
gd
ds
C
= C
rss
gd
V
V
V
= 480V
= 300V
= 120V
10000
1000
100
10
DS
DS
DS
C
= C + C
oss
ds gd
Ciss
Coss
Crss
4
1
FOR TEST CIRCUIT
SEE FIGURE 13
1
10
100
1000
0
0
8
16
24 32
40
V
, Drain-to-Source Voltage (V)
DS
Q , Total Gate Charge (nC)
G
Fig 6ꢀ Typical Gate Charge Vsꢀ
Fig 5ꢀ Typical Capacitance Vsꢀ
Gate-to-Source Voltage
Drain-to-Source Voltage
100
10
1
100
10
1
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
°
T = 150 C
J
100us
1ms
°
T = 25 C
J
10ms
°
T = 25 C
C
°
T = 150 C
Single Pulse
J
V
= 0 V
GS
0.1
0.4
0.1
0.6
0.8
1.0
1.2
10
100
1000
10000
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 7ꢀ Typical Source-Drain Diode
Fig 8ꢀ Maximum Safe Operating Area
Forward Voltage
4
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IRFBC40APbF
RD
7.0
6.0
5.0
4.0
3.0
2.0
1.0
0.0
VDS
VGS
DꢀUꢀTꢀ
RG
+VDD
-
10V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10aꢀ Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
°
T , Case Temperature ( C)
C
10%
V
GS
Fig 9ꢀ Maximum Drain Current Vsꢀ
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10bꢀ Switching Time Waveforms
10
1
D = 0.50
0.20
P
2
DM
0.10
0.05
0.1
0.01
t
1
t
2
0.02
0.01
Notes:
1. Duty factor D =
2. Peak T =P
SINGLE PULSE
t / t
1
x Z
(THERMAL RESPONSE)
+ T
C
J
DM
thJC
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11ꢀ Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFBC40APbF
1400
1200
1000
800
600
400
200
0
15V
I
D
TOP
2.8A
3.9A
DRIVER
+
BOTTOM 6.2A
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
°
Starting T , Junction Temperature ( C)
J
I
AS
Fig 12c. Maximum Avalanche Energy
Fig 12b. Unclamped Inductive Waveforms
Vs. DrainCurrent
Q
G
820
800
780
760
740
720
10 V
Q
Q
GD
GS
V
G
Charge
Fig 13a. Basic Gate Charge Waveform
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
0.0
1.0
2.0
3.0
4.0
5.0
6.0
7.0
V
GS
3mA
I
, Avalanche Current ( A)
AV
I
I
D
G
Current Sampling Resistors
Fig 12d. Typical Drain-to-Source Voltage
Fig 13b. Gate Charge Test Circuit
Vs. Avalanche Current
6
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IRFBC40APbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
DꢀUꢀT
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as DꢀUꢀTꢀ
• ISD controlled by Duty Factor "D"
• DꢀUꢀTꢀ - Device Under Test
VDD
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig14ꢀForN-ChannelHEXFETS
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7
IRFBC40APbF
TO-220AB Package Outline
10.54 (.415)
10.29 (.405)
- B -
3.78 (.149)
3.54 (.139)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
2- DRAIN
3- SOURCE
1
2
3
1- GATE
1- GATE
2- COLLECTOR
3- EMITTER
4- COLLECTOR
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1
2
DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH
3
4
OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
AS S EMBLED ON WW 19, 1997
IN THE AS S EMBLY LINE "C"
INTERNAT IONAL
RECTIFIER
L OGO
Note: "P" in assembly line
position indicates "Lead-Free"
DAT E CODE
YEAR 7 = 1997
WEEK 19
AS S E MB L Y
LOT CODE
LINE C
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature. ( See fig. 11 )
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
Starting TJ = 25°C, L =29.6mH
as Coss while VDS is rising from 0 to 80% VDSS
RG = 25Ω, IAS = 6.2A. (See Figure 12)
ISD ≤ 6.2A, di/dt ≤ 80A/µs, VDD ≤ V(BR)DSS
TJ ≤ 150°C
,
Data and specifications subject to change without notice.
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TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/04
8
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