IRFH4255DTRPBF [INFINEON]

Power Field-Effect Transistor;
IRFH4255DTRPBF
型号: IRFH4255DTRPBF
厂家: Infineon    Infineon
描述:

Power Field-Effect Transistor

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中文:  中文翻译
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FastIRFET™  
IRFH4255DPbF  
HEXFET® Power MOSFET  
Q1  
25  
Q2  
25  
VDSS  
V
RDS(on) max  
(@VGS = 4.5V)  
4.60  
10  
2.10  
23  
m  
nC  
Qg (typical)  
ID  
30  
30  
A
(@TC = 25°C)  
Applications  
Control and Synchronous MOSFETs for synchronous buck  
converters  
DUAL PQFN 5X6 mm  
Benefits  
Features  
Control and synchronous MOSFETs in one package  
Increased power density  
Lower switching losses  
Lower conduction losses  
Lower Switching Losses  
Environmentally friendlier  
Increased reliability  
Low charge control MOSFET (10nC typical)  
results in  
Low RDSON synchronous MOSFET (<2.10m)  
Intrinsic Schottky Diode with Low Forward Voltage on Q2  
RoHS Compliant, Halogen-Free  
MSL1, Industrial Qualification  
Base part number  
Package Type  
Standard Pack  
Orderable Part Number  
IRFH4255DTRPbF  
Form  
Quantity  
4000  
IRFH4255DPbF  
Dual PQFN 5mm x 6mm  
Tape and Reel  
Absolute Maximum Ratings  
Parameter  
Gate-to-Source Voltage  
Q1 Max.  
Q2 Max.  
Units  
VGS  
± 20  
V
ID @ TC = 25°C  
Continuous Drain Current, VGS @ 4.5V  
Continuous Drain Current, VGS @ 4.5V  
64  
51  
105  
84  
ID @ TC = 70°C  
ID @ TC = 25°C  
A
Continuous Drain Current, VGS @ 4.5V  
(Source Bonding Technology Limited)  
30  
30  
IDM  
Pulsed Drain Current  
Power Dissipation  
Power Dissipation  
120  
31  
420  
38  
PD @TC = 25°C  
PD @TC = 70°C  
W
W/°C  
°C  
20  
24  
Linear Derating Factor  
0.25  
0.30  
TJ  
Operating Junction and  
Storage Temperature Range  
-55 to + 150  
TSTG  
Thermal Resistance  
Parameter  
Q1 Max.  
Q2 Max.  
Units  
Junction-to-Case   
4.0  
20  
34  
24  
3.3  
12  
31  
19  
RJC (Bottom)  
RJC (Top)  
RJA  
Junction-to-Case   
°C/W  
Junction-to-Ambient   
Junction-to-Ambient   
RJA (<10s)  
Notes through are on page 12  
1
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April 14, 2014  
IRFH4255DPbF  
Static @ TJ = 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max. Units  
Conditions  
BVDSS  
Drain-to-Source Breakdown Voltage  
Q1  
Q2  
Q1  
25  
25  
–––  
––– –––  
––– –––  
VGS = 0V, ID = 250µA  
VGS = 0V, ID = 1.0mA  
Reference to 25°C, ID = 1.0mA  
V
Breakdown Voltage Temp. Coefficient  
22  
–––  
BVDSS/TJ  
mV/°C  
Q2  
Q1  
Q2  
–––  
23  
–––  
Reference to 25°C, ID = 10mA  
VGS = 10V, ID = 30A   
VGS = 10V, ID = 30A   
––– 2.50 3.20  
––– 1.20 1.50  
RDS(on)  
Static Drain-to-Source On-Resistance  
m  
Q1  
Q2  
Q1  
Q2  
Q1  
––– 3.70 4.60  
––– 1.65 2.10  
1.1  
1.1  
VGS = 4.5V, ID = 30A   
VGS = 4.5V, ID = 30A   
Q1: VDS = VGS, ID = 35µA  
Q2: VDS = VGS, ID = 100µA  
Q1: VDS = VGS, ID = 35µA  
VGS(th)  
Gate Threshold Voltage  
1.6  
1.6  
2.1  
2.1  
V
Gate Threshold Voltage Coefficient  
––– -5.7 –––  
VGS(th)/TJ  
mV/°C  
µA  
Q2  
––– -5.3 –––  
Q2: VDS = VGS, ID = 1mA  
IDSS  
Drain-to-Source Leakage Current  
Gate-to-Source Forward Leakage  
Q1  
Q2  
Q1  
––– ––– 1.0  
––– ––– 250  
––– ––– 100  
VDS = 20V, VGS = 0V  
VDS = 20V, VGS = 0V  
VGS = 20V  
Q2  
Q1  
Q2  
––– ––– 100  
––– ––– -100  
––– ––– -100  
VGS = 20V  
IGSS  
nA  
S
VGS = -20V  
Gate-to-Source Reverse Leakage  
Forward Transconductance  
VGS = -20V  
gfs  
Qg  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
131 ––– –––  
182 ––– –––  
VDS = 10V, ID = 30A  
VDS = 10V, ID = 30A  
Total Gate Charge  
Pre-Vth Gate-to-Source Charge  
Post-Vth Gate-to-Source Charge  
Gate-to-Drain Charge  
Gate Charge Overdrive  
Switch Charge (Qgs2 + Qgd)  
Output Charge  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
10  
23  
15  
35  
Q1  
VDS = 13V  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Qsw  
Qoss  
RG  
2.5 –––  
4.5 –––  
1.6 –––  
2.3 –––  
3.8 –––  
8.4 –––  
2.1 –––  
7.8 –––  
5.4 –––  
VGS = 4.5V, ID = 30A  
nC  
Q2  
VDS = 13V  
VGS = 4.5V, ID = 30A  
––– 10.7 –––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
10  
23  
–––  
–––  
VDS = 16V, VGS = 0V  
nC  
Gate Resistance  
2.4 –––  
1.5 –––  
  
td(on)  
tr  
td(off)  
tf  
Turn-On Delay Time  
Rise Time  
10  
10  
61  
43  
13  
27  
15  
26  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
Q1  
VDS = 13V VGS = 4.5V  
ID = 30A, Rg = 1.8  
ns  
Q2  
Turn-Off Delay Time  
Fall Time  
VDS = 13V VGS = 4.5V  
ID = 30A, Rg = 1.8  
Ciss  
Input Capacitance  
––– 1314 –––  
V
GS = 0V  
Q2  
Q1  
Q2  
Q1  
Q2  
––– 2877 –––  
––– 365 –––  
––– 907 –––  
VDS = 13V  
Coss  
Crss  
Output Capacitance  
pF  
ƒ = 1.0MHz  
Reverse Transfer Capacitance  
–––  
92  
–––  
––– 234 –––  
2
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IRFH4255DPbF  
Avalanche Characteristics  
Parameter  
Single Pulse Avalanche Energy   
Typ.  
Q1 Max.  
Q2 Max.  
Units  
EAS  
–––  
61  
364  
mJ  
Diode Characteristics  
Parameter  
Min. Typ. Max. Units  
Conditions  
IS  
Continuous Source Current  
(Body Diode)  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
Q1  
Q2  
––– ––– 30  
––– ––– 30  
––– ––– 120  
––– ––– 420  
––– ––– 1.0  
––– ––– 0.75  
A
A
V
MOSFET symbol  
showing the  
integral reverse  
p-n junction diode.  
ISM  
VSD  
trr  
Pulsed Source Current  
(Body Diode)  
Diode Forward Voltage  
TJ = 25°C, IS = 30A, VGS = 0V  
TJ = 25°C, IS = 30A, VGS = 0V  
Reverse Recovery Time  
Reverse Recovery Charge  
–––  
–––  
–––  
–––  
16  
26  
13  
34  
–––  
–––  
ns Q1 TJ = 25°C, IF = 30A  
DD = 13V, di/dt = 235A/µs   
V
Qrr  
––– nC Q2 TJ = 25°C, IF = 30A  
–––  
VDD = 13V, di/dt = 270A/µs   
3
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IRFH4255DPbF  
Q2 - Synchronous FET  
Q1 - Control FET  
1000  
100  
10  
1000  
100  
10  
VGS  
10V  
VGS  
10V  
TOP  
TOP  
5.0V  
4.5V  
3.5V  
3.1V  
2.9V  
2.7V  
2.5V  
5.0V  
4.5V  
3.5V  
3.1V  
2.9V  
2.7V  
2.5V  
BOTTOM  
BOTTOM  
2.5V  
1
60µs PULSE WIDTH  
Tj = 25°C  
60µs PULSE WIDTH  
Tj = 25°C  
2.5V  
0.1  
1
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 2. Typical Output Characteristics  
Fig 1. Typical Output Characteristics  
1000  
1000  
100  
10  
VGS  
10V  
VGS  
10V  
TOP  
TOP  
5.0V  
4.5V  
3.5V  
3.1V  
2.9V  
2.7V  
2.5V  
5.0V  
4.5V  
3.5V  
3.1V  
2.9V  
2.7V  
2.5V  
100  
10  
1
BOTTOM  
BOTTOM  
2.5V  
2.5V  
60µs PULSE WIDTH  
60µs PULSE WIDTH  
Tj = 150°C  
Tj = 150°C  
0.1  
1
10  
100  
0.1  
1
10  
, Drain-to-Source Voltage (V)  
DS  
100  
V
, Drain-to-Source Voltage (V)  
V
DS  
Fig 3. Typical Output Characteristics  
Fig 4. Typical Output Characteristics  
1000  
1000  
100  
10  
100  
10  
1
T
= 150°C  
J
T
= 25°C  
T
= 150°C  
J
J
T
V
= 25°C  
= 15V  
J
DS  
V
= 15V  
DS  
60µs PULSE WIDTH  
60µs PULSE WIDTH  
0.1  
1.0  
1.5  
2.0  
2.5  
3.0  
3.5  
4.0  
1
2
3
4
V
, Gate-to-Source Voltage (V)  
GS  
V
, Gate-to-Source Voltage (V)  
GS  
Fig 6. Typical Transfer Characteristics  
Fig 5. Typical Transfer Characteristics  
4
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April 14, 2014  
IRFH4255DPbF  
Q2 - Synchronous FET  
Q1 - Control FET  
100000  
10000  
1000  
100  
100000  
10000  
1000  
V
= 0V,  
= C  
f = 1 MHZ  
V
C
= 0V,  
f = 1 MHZ  
GS  
GS  
C
C
C
+ C , C  
SHORTED  
= C + C , C SHORTED  
iss  
gs  
gd  
ds  
iss  
gs  
gd ds  
= C  
C
= C  
rss  
oss  
gd  
= C + C  
rss  
gd  
C
= C + C  
ds  
gd  
oss  
ds  
gd  
C
C
iss  
C
iss  
oss  
C
oss  
C
rss  
C
rss  
10  
100  
1
10  
, Drain-to-Source Voltage (V)  
100  
0.1  
1
10  
100  
V
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage  
Fig 8. Typical Capacitance vs. Drain-to-Source Voltage  
14.0  
14.0  
I
= 30A  
I
= 30A  
D
D
12.0  
10.0  
8.0  
12.0  
10.0  
8.0  
V
V
= 20V  
= 13V  
DS  
DS  
V
= 20V  
DS  
VDS= 13V  
6.0  
6.0  
4.0  
4.0  
2.0  
2.0  
0.0  
0.0  
0
5
10  
15  
20  
25  
30  
0
10  
Q
20  
30  
40  
50  
60  
Q , Total Gate Charge (nC)  
, Total Gate Charge (nC)  
G
G
Fig 10. Typical Gate Charge vs. Gate-to-Source Voltage  
Fig 9. Typical Gate Charge vs. Gate-to-Source Voltage  
1000  
1000  
OPERATION IN THIS AREA  
OPERATION IN THIS AREA LIMITED BY R  
(on)  
DS  
LIMITED BY R (on)  
DS  
100  
100  
10  
100µsec  
100µsec  
Limited by package  
10  
1
Limited by Package  
1msec  
1msec  
10msec  
DC  
1
10msec  
DC  
0.1  
0.01  
0.1  
0.01  
Tc = 25°C  
Tj = 150°C  
Single Pulse  
Tc = 25°C  
Tj = 150°C  
Single Pulse  
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
DS  
V
DS  
, Drain-to-Source Voltage (V)  
Fig 11. Maximum Safe Operating Area  
Fig 12. Maximum Safe Operating Area  
5
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IRFH4255DPbF  
Q2 - Synchronous FET  
Q1 - Control FET  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
1.8  
1.6  
1.4  
1.2  
1.0  
0.8  
0.6  
I
= 30A  
D
I
= 30A  
D
V
= 4.5V  
GS  
V
= 4.5V  
GS  
-60 -40 -20  
0
20 40 60 80 100 120 140 160  
-60 -40 -20  
T
0
20 40 60 80 100 120 140 160  
T
J
, Junction Temperature (°C)  
, Junction Temperature (°C)  
J
Fig 14. Normalized On-Resistance vs. Temperature  
1000  
Fig 13. Normalized On-Resistance vs. Temperature  
1000  
100  
100  
T
= 150°C  
J
T
= 150°C  
J
T
= 25°C  
J
10  
10  
T
= 25°C  
= 0V  
J
V
V
= 0V  
GS  
GS  
1.0  
1.0  
0.4  
0.5  
V
0.6  
0.7  
0.8  
0.9  
1.0  
0.2  
0.4  
0.6  
, Source-to-Drain Voltage (V)  
SD  
0.8  
1.0  
1.2  
, Source-to-Drain Voltage (V)  
V
SD  
Fig 15. Typical Source-Drain Diode Forward Voltage  
Fig 16. Typical Source-Drain Diode Forward Voltage  
5.0  
10  
I
= 30A  
I
= 30A  
D
D
4.0  
3.0  
2.0  
1.0  
0.0  
8
6
4
2
0
T = 125°C  
J
T
= 125°C  
J
T = 25°C  
J
T
= 25°C  
J
0
5
10  
15  
20  
2
4
6
8
10 12 14 16 18 20  
V
Gate -to -Source Voltage (V)  
V
Gate -to -Source Voltage (V)  
GS,  
GS,  
Fig 17. Typical On-Resistance vs. Gate Voltage  
Fig 18. Typical On-Resistance vs. Gate Voltage  
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6
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© 2014 International Rectifier  
IRFH4255DPbF  
Q2 - Synchronous FET  
Q1 - Control FET  
70  
60  
50  
40  
30  
20  
10  
0
120  
100  
80  
60  
40  
20  
0
Limited By Package  
Limited By Package  
25  
50  
75  
100  
125  
150  
25  
50  
75  
100  
125  
150  
T
, Case Temperature (°C)  
C
T
C
, Case Temperature (°C)  
Fig 20. Maximum Drain Current vs. Case Temperature  
Fig 19. Maximum Drain Current vs. Case Temperature  
2.5  
2.2  
2.0  
1.8  
2.0  
1.5  
I
= 1.0mA  
D
1.6  
1.4  
1.2  
1.0  
I
= 35µA  
D
1.0  
0.5  
0.0  
-75 -50 -25  
0
25 50 75 100 125 150  
-75 -50 -25  
0
25 50 75 100 125 150  
T
, Temperature ( °C )  
T
, Temperature ( °C )  
J
J
Fig 21. Threshold Voltage vs. Temperature  
Fig 22. Threshold Voltage vs. Temperature  
1600  
250  
I
I
D
D
1400  
1200  
1000  
800  
600  
400  
200  
0
TOP  
7.7A  
12A  
TOP  
7.9A  
16A  
200  
150  
100  
50  
BOTTOM 60A  
BOTTOM 30A  
0
25  
50  
75  
100  
125  
150  
25  
50  
75  
100  
125  
150  
Starting T , Junction Temperature (°C)  
Starting T , Junction Temperature (°C)  
J
J
Fig 23. Maximum Avalanche Energy vs. Drain Current  
Fig 24. Maximum Avalanche Energy vs. Drain Current  
7
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April 14, 2014  
July 31, 2013  
IRFH4255DPbF  
1000  
100  
10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming Tj = 125°C and  
Tstart =25°C (Single Pulse)  
1
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming  j = 25°C and  
Tstart = 125°C.  
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 25. Typical Avalanche Current vs. Pulse Width (Q1)  
1000  
100  
10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming Tj = 125°C and  
Tstart =25°C (Single Pulse)  
1
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming  j = 25°C and  
Tstart = 125°C.  
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 26. Typical Avalanche Current vs. Pulse Width (Q2)  
10  
D = 0.50  
1
0.1  
0.20  
0.10  
0.05  
0.02  
0.01  
0.01  
SINGLE PULSE  
( THERMAL RESPONSE )  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
1
10  
t
, Rectangular Pulse Duration (sec)  
1
Fig 27. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Q1)  
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April 14, 2014  
IRFH4255DPbF  
10  
1
D = 0.50  
0.20  
0.10  
0.05  
0.02  
0.01  
0.1  
0.01  
0.001  
0.0001  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
SINGLE PULSE  
( THERMAL RESPONSE )  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
1
10  
t
, Rectangular Pulse Duration (sec)  
1
Fig 28. Maximum Effective Transient Thermal Impedance, Junction-to-Case (Q2)  
9
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IRFH4255DPbF  
Fig 29. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs  
V
(BR)DSS  
t
p
15V  
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
20V  
I
0.01  
t
p
AS  
Fig 30a. Unclamped Inductive Test Circuit  
Fig 30b. Unclamped Inductive Waveforms  
Fig 31a. Switching Time Test Circuit  
Fig 31b. Switching Time Waveforms  
Id  
Vds  
Vgs  
VDD  
Vgs(th)  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 32a. Gate Charge Test Circuit  
Fig 32b. Gate Charge Waveform  
10  
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April 14, 2014  
IRFH4255DPbF  
Dual PQFN 5x6 Outline “H” Package Details  
C
D
4
A
INDEX AREA  
(D/2xE/2)  
D2  
PIN#1 ID  
R0.30  
B
L1  
A1  
7x L2  
8x b  
8x K  
D1  
1.15  
0.48  
TOP VIEW  
SIDE VIEW  
1.08  
0.94  
BOTTOM VIEW  
Dimension Table  
V : Very Thin  
NOTE  
MINIMUM NOM INAL M AXIMUM  
A
A1  
b
0.80  
0.00  
0.30  
0.90  
0.02  
0.40  
1.00  
0.05  
0.50  
6
D
E
e
D1  
E1  
D2  
E2  
K
6.00 BSC  
5.00 BSC  
1.27 BSC  
2.57  
2.42  
4.41  
0.78  
4.01  
0.20  
1.67  
2.67  
4.66  
1.03  
4.26  
---  
4.56  
0.93  
4.16  
---  
L1  
L2  
1.77  
0.50  
1.87  
0.60  
0.40  
Dual PQFN 5x6 Outline “H” Part Marking  
INTERNATIONAL  
RECTIFIER LOGO  
DATE CODE  
PART NUMBER  
XXXX  
XYWWX  
XXXXX  
(“4 or 5 digits”)  
ASSEMBLY  
SITE CODE  
(Per SCOP 200-002)  
MARKING CODE  
(Per Marking Spec)  
PIN 1  
IDENTIFIER  
LOT CODE  
(Eng Mode - Min last 4 digits of EATI#)  
(Prod Mode - 4 digits of SPN code)  
For more information on board mounting, including footprint and stencil recommendation, please refer to  
application note AN-1136: http://www.irf.com/technical-info/appnotes/an-1136.pdf  
For more information on package inspection techniques, please refer to application note AN-1154:  
http://www.irf.com/technical-info/appnotes/an-1154.pdf  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
11  
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© 2014 International Rectifier  
Submit Datasheet Feedback  
April 14, 2014  
 
IRFH4255DPbF  
Dual PQFN 5x6 Outline Tape and Reel  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
Qualification Information†  
Industrial  
Qualification level  
(per JEDEC JESD47F †† guidelines )  
MSL1  
DUAL PQFN 5mm x 6mm  
Moisture Sensitivity Level  
RoHS Compliant  
(per JEDEC J-STD-020D††)  
Yes  
††  
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability  
Applicable version of JEDEC standard at the time of product release.  
Notes:  
Repetitive rating; pulse width limited by max. junction temperature.  
Starting TJ = 25°C,  
Q1: L = 0.14mH, RG = 50, IAS = 30A;  
Q2: L = 0.20mH, RG = 50, IAS = 60A.  
Pulse width 400µs; duty cycle 2%.  
Ris measured at TJ approximately 90°C.  
When mounted on 1 inch square PCB (FR-4). Please refer to AN-994 for more details:  
http://www.irf.com/technical-info/appnotes/an-994.pdf  
Calculated continuous current based on maximum allowable junction temperature.  
Current is limited to Q1 = 30A & Q2 = 30A by source bonding technology.  
Pulsed drain current is limited to 120A by source bonding technology.  
Revision History  
Date  
Comments  
01/27/2014  
 Update the MSL level from MSL2 to MSL1, on page 1 & 12.  
 Removed “redundant” information of IDSS Q1 & Q2 on page 2.  
04/08/2014  
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA  
To contact International Rectifier, please visit http://www.irf.com/whoto-call/  
12  
www.irf.com  
© 2014 International Rectifier  
Submit Datasheet Feedback  
April 14, 2014  
 

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