IRFIB7N50APBF [INFINEON]

SMPS MOSFET; 开关电源MOSFET
IRFIB7N50APBF
型号: IRFIB7N50APBF
厂家: Infineon    Infineon
描述:

SMPS MOSFET
开关电源MOSFET

晶体 开关 晶体管 脉冲 局域网
文件: 总8页 (文件大小:194K)
中文:  中文翻译
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PD - 94805  
SMPS MOSFET  
IRFIB7N50APbF  
HEXFET® Power MOSFET  
Applications  
VDSS  
500V  
Rds(on) max  
ID  
6.6A  
Switch Mode Power Supply ( SMPS )  
Uninterruptable Power Supply  
High speed power switching  
High Voltage Isolation = 2.5KVRMS  
Lead-Free  
0.52Ω  
Benefits  
Low Gate Charge Qg results in Simple  
Drive Requirement  
Improved Gate, Avalanche and dynamic  
dv/dt Ruggedness  
Fully Characterized Capacitance and  
Avalanche Voltage and Current  
Effective Coss specified ( See AN 1001)  
G D S  
TO-220 FULLPAK  
Absolute Maximum Ratings  
Parameter  
Max.  
Units  
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current ꢁꢃ  
6.6  
4.2  
44  
A
PD @TC = 25°C  
Power Dissipation  
60  
W
W/°C  
V
Linear Derating Factor  
0.48  
VGS  
dv/dt  
TJ  
Gate-to-Source Voltage  
± 30  
Peak Diode Recovery dv/dt ꢄꢃ  
Operating Junction and  
6.9  
V/ns  
-55 to + 150  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
Mounting torqe, 6-32 or M3 screw  
°C  
300 (1.6mm from case )  
10 lbf•in (1.1N•m)  
Applicable Off Line SMPS Topologies:  
Two Transistor Forward  
Half & Full Bridge Convertors  
Power Factor Correction Boost  
Notes through are on page 8  
www.irf.com  
1
10/31/03  
IRFIB7N50APbF  
Static @ TJ = 25°C (unless otherwise specified)  
Parameter  
Min. Typ. Max. Units  
500 ––– –––  
Conditions  
VGS = 0V, ID = 250µA  
V(BR)DSS  
Drain-to-Source Breakdown Voltage  
V
V(BR)DSS/TJ Breakdown Voltage Temp. Coefficient ––– 0.61 ––– V/°C Reference to 25°C, ID = 1mAꢁ  
RDS(on)  
VGS(th)  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
––– ––– 0.52  
2.0 ––– 4.0  
V
VGS = 10V, ID = 4.0A ꢂ  
VDS = VGS, ID = 250µA  
VDS = 500V, VGS = 0V  
VDS = 400V, VGS = 0V, TJ = 125°C  
VGS = 30V  
––– ––– 25  
––– ––– 250  
––– ––– 100  
––– ––– -100  
µA  
IDSS  
IGSS  
Drain-to-Source Leakage Current  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
nA  
VGS = -30V  
Dynamic @ TJ = 25°C (unless otherwise specified)  
Parameter  
Forward Transconductance  
Total Gate Charge  
Min. Typ. Max. Units  
6.1 ––– –––  
Conditions  
VDS = 50V, ID = 6.6Aꢃ  
ID = 11A  
gfs  
S
Qg  
––– ––– 52  
––– ––– 13  
––– ––– 18  
Qgs  
Qgd  
td(on)  
tr  
Gate-to-Source Charge  
Gate-to-Drain ("Miller") Charge  
Turn-On Delay Time  
Rise Time  
nC VDS = 400V  
VGS = 10V, See Fig. 6 and 13 ꢅꢃ  
–––  
–––  
–––  
–––  
14 –––  
35 –––  
32 –––  
28 –––  
VDD = 250V  
ID = 11A  
ns  
td(off)  
tf  
Turn-Off Delay Time  
Fall Time  
RG = 9.1Ω  
RD = 22,See Fig. 10 ꢅꢃ  
VGS = 0V  
Ciss  
Coss  
Crss  
Coss  
Coss  
Coss eff.  
Input Capacitance  
––– 1423 –––  
––– 208 –––  
Output Capacitance  
Reverse Transfer Capacitance  
Output Capacitanceꢃ  
Output Capacitanceꢃ  
Effective Output Capacitance  
VDS = 25V  
–––  
8.1 –––  
pF  
ƒ = 1.0MHz, See Fig. 5ꢃ  
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz  
VGS = 0V, VDS = 400V, ƒ = 1.0MHz  
VGS = 0V, VDS = 0V to 400V ꢆꢃ  
––– 2000 –––  
–––  
–––  
55 –––  
97 –––  
Avalanche Characteristics  
Parameter  
Single Pulse Avalanche Energyꢇꢃ  
Avalanche Currentꢁꢃ  
Typ.  
Max.  
275  
11  
Units  
mJ  
A
EAS  
IAR  
–––  
–––  
–––  
EAR  
Repetitive Avalanche Energyꢁ  
6.0  
mJ  
Thermal Resistance  
Parameter  
Junction-to-Case  
Typ.  
–––  
Max.  
2.1  
Units  
RθJC  
RθJA  
Junction-to-Ambient  
–––  
65  
°C/W  
Diode Characteristics  
Parameter  
Min. Typ. Max. Units  
Conditions  
D
S
IS  
Continuous Source Current  
MOSFET symbol  
6.6  
44  
––– –––  
––– –––  
(Body Diode)  
showing the  
A
G
ISM  
Pulsed Source Current  
(Body Diode) ꢀꢁ  
integral reverse  
p-n junction diode.  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse RecoveryCharge  
Forward Turn-On Time  
––– ––– 1.5  
––– 510 770  
––– 3.4 5.1  
V
TJ = 25°C, IS = 11A, VGS = 0V ꢂ  
ns  
TJ = 25°C, IF = 11A  
Qrr  
ton  
µC di/dt = 100A/µs ꢂꢁ  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
2
www.irf.com  
IRFIB7N50APbF  
100  
10  
1
100  
10  
1
VGS  
15V  
VGS  
15V  
TOP  
TOP  
10V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
BOTTOM 4.5V  
BOTTOM 4.5V  
20µs PULSE WIDTH  
J
4.5V  
20µs PULSE WIDTH  
°
4.5V  
°
T = 150 C  
T = 25 C  
J
0.1  
0.1  
1
10  
100  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
100  
10  
3.0  
11A  
=
I
D
2.5  
2.0  
1.5  
1.0  
0.5  
0.0  
°
T = 150 C  
J
°
T = 25 C  
J
1
V
= 100V  
DS  
20µs PULSE WIDTH  
V
=10V  
GS  
0.1  
4.0  
-60 -40 -20  
0
20 40 60 80 100 120 140 160  
°
5.0  
6.0  
7.0 8.0  
9.0  
T , Junction Temperature ( C)  
J
V
, Gate-to-Source Voltage (V)  
GS  
Fig 3. Typical Transfer Characteristics  
Fig 4. Normalized On-Resistance  
Vs. Temperature  
www.irf.com  
3
IRFIB7N50APbF  
20  
16  
12  
8
2400  
11A  
=
I
D
V
C
C
C
= 0V,  
f = 1MHz  
GS  
iss  
rss  
oss  
= C + C  
,
C
SHORTED  
gs  
gd  
gd  
ds  
V
V
V
= 400V  
= 250V  
= 100V  
DS  
DS  
DS  
= C  
2000  
1600  
1200  
800  
400  
0
= C + C  
ds  
gd  
C
C
iss  
oss  
C
rss  
4
FOR TEST CIRCUIT  
SEE FIGURE 13  
0
A
0
10  
20  
30  
40  
50  
1
10  
100  
1000  
Q , Total Gate Charge (nC)  
V
, Drain-to-Source Voltage (V)  
G
DS  
Fig 6. Typical Gate Charge Vs.  
Fig 5. Typical Capacitance Vs.  
Gate-to-Source Voltage  
Drain-to-Source Voltage  
100  
1000  
100  
10  
OPERATION IN THIS AREA LIMITED  
BY R  
DS(on)  
10  
10us  
°
T = 150 C  
J
100us  
1ms  
1
°
T = 25 C  
J
1
10ms  
°
T = 25 C  
C
°
T = 150 C  
Single Pulse  
J
V
= 0 V  
GS  
0.1  
0.1  
0.0  
10  
100  
1000  
10000  
0.4  
0.8  
1.2  
1.6  
V
, Drain-to-Source Voltage (V)  
V
,Source-to-Drain Voltage (V)  
DS  
SD  
Fig 8. Maximum Safe Operating Area  
Fig 7. Typical Source-Drain Diode  
Forward Voltage  
4
www.irf.com  
IRFIB7N50APbF  
RD  
7.0  
6.0  
5.0  
4.0  
3.0  
2.0  
1.0  
0.0  
VDS  
VGS  
D.U.T.  
RG  
+VDD  
-
10V  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
Fig 10a. Switching Time Test Circuit  
V
DS  
90%  
25  
50  
75  
100  
125  
150  
°
T , Case Temperature ( C)  
C
10%  
V
GS  
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.  
d(on)  
d(off)  
Case Temperature  
Fig 10b. Switching Time Waveforms  
10  
D = 0.50  
1
0.20  
0.10  
0.05  
P
2
DM  
0.1  
t
1
0.02  
0.01  
t
2
Notes:  
1. Duty factor D =  
SINGLE PULSE  
(THERMAL RESPONSE)  
t / t  
1
2. Peak T =P  
J
x Z  
+ T  
C
DM  
thJC  
0.01  
0.00001  
0.0001  
0.001  
0.01  
0.1  
1
10  
t , Rectangular Pulse Duration (sec)  
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
www.irf.com  
5
IRFIB7N50APbF  
600  
500  
400  
300  
200  
100  
0
15V  
I
D
TOP  
4.9A  
7.0A  
BOTTOM 11A  
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
20V  
0.01  
t
p
Fig 12a. Unclamped Inductive Test Circuit  
V
(BR)DSS  
t
p
25  
50  
75  
100  
125  
150  
°
Starting T , Junction Temperature ( C)  
J
I
AS  
Fig 12c. Maximum Avalanche Energy  
Fig 12b. Unclamped Inductive Waveforms  
Vs. Drain Current  
Q
G
10 V  
660  
Q
Q
GD  
GS  
V
G
640  
620  
600  
580  
Charge  
Fig 13a. Basic Gate Charge Waveform  
Current Regulator  
Same Type as D.U.T.  
50KΩ  
.2µF  
12V  
.3µF  
+
V
DS  
D.U.T.  
-
A
0.0  
1.0  
2.0  
3.0  
4.0  
5.0  
6.0  
7.0  
V
GS  
I
, Avalanche Current (A)  
av  
3mA  
I
I
D
G
Current Sampling Resistors  
Fig 12d. Typical Drain-to-Source Voltage  
Vs. Avalanche Current  
Fig 13b. Gate Charge Test Circuit  
6
www.irf.com  
IRFIB7N50APbF  
Peak Diode Recovery dv/dt Test Circuit  
+
-
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
D.U.T  
+
-
-
+
RG  
dv/dt controlled by RG  
+
-
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
VDD  
Driver Gate Drive  
P.W.  
P.W.  
Period  
Period  
D =  
V
=10V  
*
GS  
D.U.T. I Waveform  
SD  
Reverse  
Recovery  
Current  
Body Diode Forward  
Current  
di/dt  
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  
V
DD  
Re-Applied  
Voltage  
Body Diode  
Forward Drop  
Inductor Curent  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 14. For N-Channel HEXFETS  
www.irf.com  
7
IRFIB7N50APbF  
TO-220 Full-Pak Package Outline  
Dimensions are shown in millimeters (inches)  
TO-220 Full-Pak Part Marking Information  
EXAMPLE: THIS IS AN IRFI840G  
WITH ASSEMBLY  
LO T CODE 3432  
INTERNATIONAL  
ASSEMBLED ON WW 24 1999  
PART NUMBER  
IRFI840G  
924K  
RECTIFIER  
LOGO  
IN THE ASSEMBLY LINE "K"  
34  
32  
DATE CODE  
YEAR 9 = 1999  
WEEK 24  
Note: "P" in assembly line  
position indicates "Lead-Free"  
ASSEMBLY  
LOT CODE  
LINE K  
Notes:  
Repetitive rating; pulse width limited by  
Pulse width 300µs; duty cycle 2%.  
max. junction temperature. ( See fig. 11 )  
Coss eff. is a fixed capacitance that gives the same charging time  
Starting TJ = 25°C, L = 4.5mH  
as Coss while VDS is rising from 0 to 80% VDSS  
RG = 25, IAS = 11A. (See Figure 12)  
Uses IRFB11N50A data and test conditions  
ISD 11A, di/dt 140A/µs, VDD V(BR)DSS  
TJ 150°C  
,
t=60s,f=60Hz  
Data and specifications subject to change without notice.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information.10/03  
8
www.irf.com  

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