IRFP23N50LPBF [INFINEON]
HEXFET Power MOSFET ( VDSS = 500V , RDS(on)typ. = 0.190ヘ , Trr typ. = 170ns , ID = 23A ); HEXFET功率MOSFET （ VDSS = 500V ， RDS （ ON） （典型值） = 0.190ヘ， TRR （典型值） = 170ns ， ID = 23A ）
| 型号： | IRFP23N50LPBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET ( VDSS = 500V , RDS(on)typ. = 0.190ヘ , Trr typ. = 170ns , ID = 23A ) |
| 文件： | 总9页 (文件大小：202K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 94999
IRFP23N50LPbF
SMPS MOSFET
HEXFET® Power MOSFET
Applications
• Zero Voltage Switching SMPS
• Telecom and Server Power Supplies
• Uninterruptible Power Supplies
• Motor Control applications
Trr typ.
VDSS RDS(on) typ.
0.190
ID
500V
Ω
170ns 23A
• Lead-Free
Features and Benefits
• SuperFast body diode eliminates the need for external
diodes in ZVS applicationsꢀ
• Lower Gate charge results in simpler drive requirementsꢀ
• Enhanced dv/dt capabilities offer improved ruggednessꢀ
• Higher Gate voltage threshold offers improved noise
immunityꢀ
TO-247AC
Absolute Maximum Ratings
Parameter
Max.
23
Units
A
ID @ TC = 25°C Continuous Drain Current, VGS @ 10V
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V
15
IDM
92
Pulsed Drain Current
PD @TC = 25°C
Power Dissipation
370
W
Linear Derating Factor
Gate-to-Source Voltage
2.9
± 30
W/°C
V
VGS
dv/dt
TJ
Peak Diode Recovery dv/dt
Operating Junction and
14
V/ns
-55 to + 150
TSTG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
300 (1.6mm from case )
10lb in (1.1N m)
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
Conditions
I
I
Continuous Source Current
––– ––– 23
MOSFET symbol
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
––– ––– 92
SM
(Body Diode)
p-n junction diode.
V
t
T = 25°C, I = 14A, V = 0V
J S GS
Diode Forward Voltage
Reverse Recovery Time
––– ––– 1.5
––– 170 250
––– 220 330
V
SD
T = 25°C, I = 23A
ns
rr
J
F
TJ = 125°C, di/dt = 100A/µs
Q
rr
T = 25°C, I = 23A, V = 0V
Reverse Recovery Charge
––– 560 840 nC
––– 980 1500
J
S
GS
TJ = 125°C, di/dt = 100A/µs
IRRM
T = 25°C
J
Reverse Recovery Current
Forward Turn-On Time
––– 7.6
11
A
t
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
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1
02/11/04
IRFP23N50LPbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Min. Typ. Max. Units
Conditions
VGS = 0V, ID = 250µA
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
500
–––
–––
V
∆
∆
(BR)DSS/ TJ
V
–––
0.27
–––
V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
IDSS
––– 0.190 0.235
V
V
V
V
GS = 10V, ID = 14A
Ω
V
3.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
5.0
50
DS = VGS, ID = 250µA
Drain-to-Source Leakage Current
µA
mA
DS = 500V, VGS = 0V
2.0
100
DS = 400V, VGS = 0V, TJ = 125°C
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
nA VGS = 30V
VGS = -30V
––– -100
1.2 –––
Ω
f = 1MHz, open drain
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 14A
ID = 23A
DS = 400V
gfs
Qg
12
–––
–––
–––
–––
26
–––
150
44
S
–––
–––
–––
–––
–––
–––
–––
Qgs
Qgd
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC
V
72
VGS = 10V, See Fig. 7 & 15
VDD = 250V
td(on)
tr
td(off)
tf
–––
–––
–––
–––
94
ns ID = 23A
Ω
RG = 6.0
VGS = 10V, See Fig. 11a & 11b
VGS = 0V
Turn-Off Delay Time
Fall Time
53
45
Ciss
Coss
Crss
Coss
Coss
Input Capacitance
––– 3600 –––
Output Capacitance
–––
–––
380
37
–––
–––
VDS = 25V
Reverse Transfer Capacitance
Output Capacitance
ƒ = 1.0MHz, See Fig. 5
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 400V, ƒ = 1.0MHz
––– 4800 –––
pF
Output Capacitance
–––
–––
–––
100
220
160
–––
–––
–––
C
oss eff.
Effective Output Capacitance
Effective Output Capacitance
VGS = 0V,VDS = 0V to 400V
Coss eff. (ER)
(Energy Related)
Avalanche Characteristics
Parameter
Typ.
–––
–––
–––
Max.
410
23
Units
mJ
A
Symbol
Single Pulse Avalanche Energy
EAS
IAR
Avalanche Current
Repetitive Avalanche Energy
EAR
37
mJ
Thermal Resistance
Symbol
Parameter
Junction-to-Case
Typ.
–––
Max.
0.34
–––
40
Units
RθJC
RθCS
RθJA
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.24
–––
°C/W
Notes:
Repetitive rating; pulse width limited by
max. junction temperature. (See Fig. 11).
Starting TJ = 25°C, L = 1.5mH, RG = 25Ω,
IAS = 23A, dv/dt = 14V/ns. (See Figure 12).
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff.(ER) is a fixed capacitance that stores the same energy
as Coss while VDS is rising from 0 to 80% VDSS
.
ISD ≤ 23A, di/dt ≤ 430A/µs, VDD ≤ V(BR)DSS
,
.
TJ ≤ 150°C.
2
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IRFP23N50LPbF
100
10
1
100
10
VGS
15V
10V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
TOP
TOP
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
1
0.1
4.5V
4.5V
0.01
0.001
20µs PULSE WIDTH
Tj = 25°C
20µs PULSE WIDTH
Tj = 150°C
0.1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
3.0
1000.00
23A
=
I
D
2.5
2.0
1.5
1.0
0.5
0.0
T
= 25°C
J
100.00
10.00
1.00
T = 150°C
J
V
= 15V
DS
20µs PULSE WIDTH
V
= 10V
GS
-60 -40 -20
0
20
40
60
80 100 120 140 160
1.0
6.0
11.0
16.0
°
T , Junction Temperature
( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFP23N50LPbF
100000
25
20
15
10
5
V
= 0V,
f = 1 MHZ
GS
C
= C + C
,
C
SHORTED
iss
gs
gd
ds
C
= C
rss
gd
C
= C + C
oss
ds gd
10000
1000
100
Ciss
Coss
Crss
0
10
0
100
V
200
300
400
500
600
1
10
100
1000
V
, Drain-to-Source Voltage (V)
DS
Drain-to-Source Voltage (V)
DS,
Fig 6. Typ. Output Capacitance
Fig 5. Typical Capacitance vs.
Stored Energy vs. VDS
Drain-to-Source Voltage
100.00
10.00
1.00
12
10
7
D
I
= 23
V
V
V
=
=
=
400V
250V
100V
DS
DS
DS
T
= 150°C
J
T
= 25°C
J
5
2
V
= 0V
GS
0.10
0
0
24
Q
48
72
96
120
0.0
0.5
1.0
1.5
2.0
, Total Gate Charge (nC)
G
V
, Source-toDrain Voltage (V)
SD
Fig 8. Typical Source-Drain Diode
Fig 7. Typical Gate Charge vs.
Forward Voltage
Gate-to-Source Voltage
4
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IRFP23N50LPbF
1000
100
10
25
20
15
10
5
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
100us
1ms
°
T = 25 C
C
10ms
°
T = 150 C
Single Pulse
J
1
0
10
100
1000
10000
25
50
T
75
100
125
150
V
, Drain-to-Source Voltage (V)
°
( C)
, Case Temperature
DS
C
Fig 9. Maximum Safe Operating Area
Fig 10. Maximum Drain Current vs.
Case Temperature
RD
VDS
V
DS
90%
VGS
DꢀUꢀTꢀ
RG
+VDD
-
10%
10V
V
GS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
t
t
r
t
t
f
d(on)
d(off)
Fig 11b. Switching Time Waveforms
Fig 11a. Switching Time Test Circuit
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5
IRFP23N50LPbF
10
1
D = 0.50
0.1
0.20
0.10
0.05
P
DM
t
0.02
0.01
1
SINGLE PULSE
(THERMAL RESPONSE)
0.01
t
2
Notes:
1. Duty factor D =
t / t
1
2
2. Peak T
= P
x Z
+ T
J
DM
thJC
C
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 12. Maximum Effective Transient Thermal Impedance, Junction-to-Case
5.0
4.5
4.0
I
= 250µA
3.5
3.0
2.5
2.0
1.5
1.0
D
-75 -50 -25
0
25
50
75 100 125 150
T , Temperature ( °C )
J
Fig 13. Threshold Voltage vs. Temperature
6
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IRFP23N50LPbF
750
600
450
300
150
0
I
D
TOP
10A
15A
23A
BOTTOM
25
50
75
100
125
150
°
( C)
Starting T , Junction Temperature
J
Fig 14. Maximum Avalanche Energy
Vs. Drain Current
15V
V
(BR)DSS
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01Ω
t
p
I
AS
Fig 15b. Unclamped Inductive Waveforms
Fig 15a. Unclamped Inductive Test Circuit
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
.2µF
12V
VGS
V
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
V
GS
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 16b. Basic Gate Charge Waveform
Fig 16a. Gate Charge Test Circuit
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7
IRFP23N50LPbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
DꢀUꢀT
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as DꢀUꢀTꢀ
• ISD controlled by Duty Factor "D"
• DꢀUꢀTꢀ - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 17. For N-Channel HEXFET® Power MOSFETs
8
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IRFP23N50LPbF
TO-247AC Package Outline
Dimensions are shown in millimeters (inches)
- D -
3.65 (.143)
3.55 (.140)
5.30 (.209)
4.70 (.185)
15.90 (.626)
15.30 (.602)
0.25 (.010)
D
M
B
M
2.50 (.089)
- B -
- A -
1.50 (.059)
5.50 (.217)
4
20.30 (.800)
19.70 (.775)
NOTES:
5.50 (.217)
4.50 (.177)
2X
1
DIMENSIONING & TOLERANCING
PER ANSI Y14.5M, 1982.
CONTROLLING DIMENSION : INCH.
CONFORMS TO JEDEC OUTLINE
TO-247-AC.
1
2
3
2
3
- C -
14.80 (.583)
14.20 (.559)
4.30 (.170)
3.70 (.145)
LEAD ASSIGNMENTS
Hexfet
IGBT
1 -Gate1-Gate
2.40 (.094)
2.00 (.079)
2X
0.80 (.031)
0.40 (.016)
1.40 (.056)
1.00 (.039)
3X
3X
2 - Drain2 - Collector
3 - Source 3 - Emitter
2.60 (.102)
2.20 (.087)
0.25 (.010)
A
C
M
S
5.45 (.215)
4 - Drain
4 - Collector
3.40 (.133)
3.00 (.118)
2X
TO-247AC Part Marking Information
EXAMPLE: THIS IS AN IRFPE30
WITH ASSEMBLY
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
LOT CODE 5657
IRFPE30
ASSEMBLED ON WW 35, 2000
IN THE ASSEMBLY LINE "H"
035H
57
56
DATE CODE
YEAR 0 = 2000
WE EK 35
Note: "P" in assembly line
position indicates "Lead-Free"
ASSEMBLY
LOT CODE
LINE H
TO-247AC package is not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.02/04
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9
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