IRFR4615TRPBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRFR4615TRPBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总11页 (文件大小：392K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD -96206A
IRFR4615PbF
IRFU4615PbF
HEXFET® Power MOSFET
Applications
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
D
S
VDSS
RDS(on) typ.
150V
34m
42m
33A
G
max.
l Hard Switched and High Frequency Circuits
ID
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt
D
D
Ruggedness
l Fully Characterized Capacitance and Avalanche
SOA
S
S
D
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
G
G
DPak
IRFR4615PbF
IPAK
IRFU4615PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
Parameter
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
Max.
33
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
24
A
140
PD @TC = 25°C
W
144
Maximum Power Dissipation
Linear Derating Factor
0.96
W/°C
V
VGS
± 20
Gate-to-Source Voltage
38
Peak Diode Recovery
dv/dt
TJ
V/ns
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
°C
300
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally limited)
109
mJ
A
Avalanche Current
IAR
See Fig. 14, 15, 22a, 22b,
Repetitive Avalanche Energy
EAR
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
–––
–––
Max.
1.045
50
Units
RθJC
Junction-to-Case
RθJA
RθJA
°C/W
Junction-to-Ambient (PCB Mount)
Junction-to-Ambient
110
ORDERING INFORMATION:
See detailed ordering and shipping information on the last page of this data sheet.
Notes through are on page 11
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1
06/08/09
IRFR/U4615PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
Min. Typ. Max. Units
150 ––– –––
––– 0.19 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250µA
V
V
/ T
∆
J
∆
(BR)DSS
RDS(on)
VGS(th)
IDSS
–––
3.0
34
42
5.0
20
VGS = 10V, ID = 21A
m
V
Ω
–––
VDS = VGS, ID = 100µA
Drain-to-Source Leakage Current
––– –––
VDS = 150V, VGS = 0V
µA
––– ––– 250
––– ––– 100
––– ––– -100
VDS = 150V, VGS = 0V, TJ = 125°C
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
V
GS = 20V
nA
VGS = -20V
RG(int)
–––
2.7
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 21A
35
––– –––
S
Qg
Total Gate Charge
–––
–––
–––
–––
–––
–––
–––
–––
26
ID = 21A
Qgs
Qgd
Qsync
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
8.6
9.0
17
15
35
25
20
–––
–––
–––
–––
–––
–––
–––
VDS = 75V
nC
VGS = 10V
ID = 21A, VDS =0V, VGS = 10V
VDD = 98V
ID = 21A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
R = 7.3
Ω
G
VGS = 10V
Ciss
Coss
Crss
Input Capacitance
––– 1750 –––
––– 155 –––
VGS = 0V
Output Capacitance
Reverse Transfer Capacitance
VDS = 50V
ƒ = 1.0MHz
–––
40
–––
(See Fig.5)
pF
C
oss eff. (ER)
––– 179 –––
––– 382 –––
VGS = 0V, VDS = 0V to 120V (See Fig.11)
VGS = 0V, VDS = 0V to 120V
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Coss eff. (TR)
Diode Characteristics
Symbol
Parameter
Continuous Source Current
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– –––
33
(Body Diode)
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 140
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
–––
–––
V
TJ = 25°C, IS = 21A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 100V,
IF = 21A
di/dt = 100A/µs
–––
–––
70
83
ns
Qrr
Reverse Recovery Charge
––– 177 –––
––– 247 –––
nC
A
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
4.9
–––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFR/U4615PbF
1000
100
10
1000
100
10
VGS
15V
12V
VGS
15V
12V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM
BOTTOM
5.0V
1
1
5.0V
0.1
0.01
60µs PULSE WIDTH
Tj = 175°C
≤
60µs PULSE WIDTH
Tj = 25°C
≤
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
3.0
2.5
2.0
1.5
1.0
0.5
I
= 21A
D
V
= 10V
GS
T = 175°C
J
T = 25°C
J
1
V
= 50V
DS
≤
60µs PULSE WIDTH
0.1
2
4
6
8
10 12 14
16
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
100000
10000
1000
100
14.0
V
= 0V,
= C
f = 1 MHZ
GS
I
= 21A
C
C
C
+ C , C
SHORTED
ds
D
iss
gs
gd
12.0
10.0
8.0
= C
rss
oss
gd
= C + C
V
V
= 120V
= 75V
DS
DS
ds
gd
VDS= 30V
C
iss
C
oss
6.0
C
rss
4.0
2.0
10
0.0
1
10
100
1000
0
5
10
15
20
25
30
35
V
, Drain-to-Source Voltage (V)
Q , Total Gate Charge (nC)
DS
G
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFR/U4615PbF
1000
100
10
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100µsec
100
1msec
T
= 175°C
10msec
J
T
= 25°C
J
10
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
1.4
GS
0.1
1.0
1
10
100
1000
0.2
0.4
V
0.6
0.8
1.0
1.2
1.6
V
, Drain-to-Source Voltage (V)
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
40
190
185
180
175
170
165
160
155
150
145
140
Id = 5mA
35
30
25
20
15
10
5
0
25
50
75
100
125
150
175
-60 -40 -20 0 20 40 60 80 100120140160180
T
, Case Temperature (°C)
T , Temperature ( °C )
J
Fig 10. Drain-to-Source Breakdown Voltage
Fig 9. MaxiCmum Drain Current vs.
Case Temperature
3.0
500
I
D
450
400
350
300
250
200
150
100
50
TOP
2.8A
5.3A
BOTTOM 21A
2.5
2.0
1.5
1.0
0.5
0.0
0
-20
0
20 40 60 80 100 120 140 160
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
V
J
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
4
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IRFR/U4615PbF
10
1
D = 0.50
0.20
0.10
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.1
0.02324 0.000008
0.26212 0.000106
0.50102 0.001115
0.25880 0.005407
τ
τ
J τJ
τ
0.05
0.02
0.01
Cτ
1τ1
Ci= τi/Ri
τ
τ
τ
2 τ2
3τ3
4τ4
0.01
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
100
10
1
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τ j = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
120
100
80
60
40
20
0
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1.0% Duty Cycle
= 21A
Single Pulse
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
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IRFR/U4615PbF
6.0
5.5
5.0
4.5
4.0
3.5
30
25
20
15
10
5
I = 14A
F
V
= 100V
R
T = 25°C
J
T = 125°C
J
I
I
= 100µA
D
D
3.0
2.5
2.0
1.5
1.0
= 250uA
ID = 1.0mA
ID = 1.0A
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
400
600
800
1000
T
, Temperature ( °C )
di /dt (A/µs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
35
800
I = 21A
I = 14A
F
F
30
25
20
15
10
5
700
600
500
400
300
200
100
V
= 100V
V
= 100V
R
R
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
1000
I = 21A
F
V
900
800
700
600
500
400
300
200
100
= 100V
R
T = 25°C
J
T = 125°C
J
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
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IRFR/U4615PbF
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
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IRFR/U4615PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRFR/U4615PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRFR/U4615PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
10
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IRFR/U4615PbF
Orderable part number
Package Type
Standard Pack
Form Quantity
Note
IRFR4615PbF
IRFR4615TRPbF
D-PAK
D-PAK
Tube/Bulk
Tape and Reel
75
2000
IRFU4615PbF
I-PAK
Tube/Bulk
75
Qualification Information†
Industrial ††
(per JEDEC JESD47F††† guidelines)
Qualification level
Comments: This family of products has passed JEDEC’s Industrial
qualification. IR’s Consumer qualification level is granted by extension of the
higher Industrial level.
MSL1
D-PAK
(per JEDEC J-STD-020D†††
)
Moisture Sensitivity Level
RoHS Compliant
Not applicable
I-PAK
Yes
†
Qualification standards can be found at International Rectifier’s web site http://www.irf.com/product-info/reliability
†† Higher qualification ratings may be available should the user have such requirements. Please contact
your International Rectifier sales representative for further information: http://www.irf.com/whoto-call/salesrep/
††† Applicable version of JEDEC standard at the time of product release.
Notes:
ꢀ Coss eff. (TR) is a fixed capacitance that gives the same charging time
Repetitive rating; pulse width limited by max. junction
as Coss while VDS is rising from 0 to 80% VDSS
.
temperature.
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
Limited by TJmax, starting TJ = 25°C, L = 0.51mH
RG = 25Ω, IAS = 21A, VGS =10V. Part not recommended for use
above this value .
ISD ≤ 21A, di/dt ≤ 549A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
Pulse width ≤ 400µs; duty cycle ≤ 2%.
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application
note #AN-994
Rθ is measured at TJ approximately 90°C
Data and specifications subject to change without notice
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/2009
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