IRFS3107TRRPBF [INFINEON]
Power Field-Effect Transistor, 195A I(D), 75V, 0.003ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, LEAD FREE, PLASTIC, D2PAK-3;
| 型号： | IRFS3107TRRPBF |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 195A I(D), 75V, 0.003ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, LEAD FREE, PLASTIC, D2PAK-3 |
| 文件： | 总10页 (文件大小：371K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD -97144A
IRFS3107PbF
IRFSL3107PbF
HEXFET® Power MOSFET
Applications
D
VDSS
RDS(on) typ.
75V
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
2.5m
3.0m
:
:
max.
G
ID
ID
230A
c
(Silicon Limited)
195A
(Package Limited)
S
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
D
D
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
S
D
S
G
G
D2Pak
IRFS3107PbF
TO-262
IRFSL3107PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Parameter
Max.
230c
160
Units
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current d
195
900
PD @TC = 25°C
370
Maximum Power Dissipation
Linear Derating Factor
W
2.5
W/°C
V
VGS
± 20
Gate-to-Source Voltage
14
Peak Diode Recovery f
dv/dt
TJ
V/ns
-55 to + 175
Operating Junction and
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
(1.6mm from case)
°C
300
10lbxin (1.1Nxm)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
Single Pulse Avalanche Energy e
EAS (Thermally limited)
300
mJ
A
Avalanche Currentꢀd
IAR
See Fig. 14, 15, 22a, 22b,
Repetitive Avalanche Energy g
EAR
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
Max.
0.40
40
Units
RθJC
Junction-to-Case kl
RθJA
Junction-to-Ambient (PCB Mount) jk
–––
°C/W
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1
5/2/11
IRFS/SL3107PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Min. Typ. Max. Units
75 ––– –––
––– 0.09 ––– V/°C Reference to 25°C, ID = 5mAd
Conditions
VGS = 0V, ID = 250μA
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
V
ΔV(BR)DSS/ΔTJ
RDS(on)
–––
2.0
2.5
3.0
4.0
20
VGS = 10V, ID = 140A g
VDS = VGS, ID = 250μA
mΩ
V
VGS(th)
–––
IDSS
Drain-to-Source Leakage Current
––– –––
μA VDS = 75V, VGS = 0V
VDS = 75V, VGS = 0V, TJ = 125°C
nA VGS = 20V
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
VGS = -20V
–––
1.2
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 140A
230 ––– –––
S
Qg
––– 160 240
nC ID = 140A
VDS =38V
Qgs
Qgd
Qsync
td(on)
tr
Gate-to-Source Charge
–––
–––
38
54
–––
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
VGS = 10V g
ID = 140A, VDS =0V, VGS = 10V
ns VDD = 49V
––– 106 –––
––– 19 –––
––– 110 –––
––– 99 –––
Rise Time
ID = 140A
td(off)
tf
Turn-Off Delay Time
RG = 2.7Ω
VGS = 10V g
Fall Time
––– 100 –––
––– 9370 –––
––– 840 –––
––– 580 –––
––– 1130 –––
––– 1500 –––
Ciss
Coss
Crss
Input Capacitance
pF VGS = 0V
Output Capacitance
VDS = 50V
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)h
ƒ = 1.0 MHz, See Fig. 5
VGS = 0V, VDS = 0V to 60V i, See Fig. 11
VGS = 0V, VDS = 0V to 60V h
C
oss eff. (ER)
oss eff. (TR)
C
Diode Characteristics
Symbol
Parameter
Continuous Source Current
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– –––
A
230c
(Body Diode)
showing the
G
ISM
Pulsed Source Current
––– ––– 900
A
integral reverse
S
(Body Diode)ꢀd
p-n junction diode.
VSD
trr
Diode Forward Voltage
––– –––
1.3
–––
–––
V
TJ = 25°C, IS = 140A, VGS = 0V g
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 64V,
Reverse Recovery Time
Reverse Recovery Charge
–––
–––
54
60
ns
IF = 140A
di/dt = 100A/μs g
Qrr
––– 103 –––
––– 132 –––
nC
A
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
–––
3.6
–––
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
Calculated continuous current based on maximum allowable junction
ISD ≤ 140A, di/dt ≤ 1380A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
ꢁ Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.045mH
RG = 25Ω, IAS = 140A, VGS =10V. Part not recommended for use
above this value .
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
.
.
When mounted on 1" square PCB (FR-4 or G-10 Material). For recom
mended footprint and soldering techniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C
RθJC value shown is at time zero.
2
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IRFS/SL3107PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
4.8V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
4.5V
≤ 60μs PULSE WIDTH
≤ 60μs PULSE WIDTH
Tj = 175°C
Tj = 25°C
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.5
2.0
1.5
1.0
0.5
1000
100
10
I
= 140A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
= 25V
J
V
DS
≤ 60μs PULSE WIDTH
1
2.0
3.0
4.0
5.0
6.0
7.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
V
, Gate-to-Source Voltage (V)
GS
T
, Junction Temperature (°C)
J
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
16000
12000
8000
4000
0
16
V
C
= 0V,
f = 100 kHz
GS
I = 140A
D
= C + C , C SHORTED
iss
gs
gd ds
V
V
= 60V
= 38V
DS
DS
C
= C
rss
gd
C
= C + C
ds
oss
gd
12
8
Ciss
4
Coss
Crss
0
0
40
80
120
160
200
240
1
10
100
Q
Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
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3
IRFS/SL3107PbF
1000
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 175°C
J
100
10
1
100μsec
1msec
10msec
T
= 25°C
J
LIMITED BY PACKAGE
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
2.0
0.1
0.1
0.0
0.5
1.0
1.5
2.5
0.1
1
10
100
V
, Drain-toSource Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
100
250
I
= 5mA
D
LIMITED BY PACKAGE
200
150
100
50
90
80
0
70
25
50
75
100
125
150
175
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
T
, Case Temperature (°C)
C
T
, Junction Temperature (°C)
J
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
1400
4.0
3.0
2.0
1.0
0.0
I
D
1200
1000
800
600
400
200
0
TOP
21A
49A
140A
BOTTOM
25
50
75
100
125
150
175
0
20
40
60
80
Starting T , Junction Temperature (°C)
V
Drain-to-Source Voltage (V)
J
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent
4
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IRFS/SL3107PbF
1
0.1
D = 0.50
0.20
0.10
0.05
0.02
0.01
R1
R1
R2
R2
R3
R3
τι (sec)
Ri (°C/W)
τ
J τJ
τ
τ
Cτ
0.01
0.047711 0.000071
0.16314 0.000881
0.189304 0.007457
τ
1τ1
τ
2τ2
3τ3
Ci= τi/Ri
Ci= τi/Ri
0.001
0.0001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
350
300
250
200
150
100
50
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
TOP
BOTTOM 1% Duty Cycle
= 140A
Single Pulse
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
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5
IRFS/SL3107PbF
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
32
24
16
8
I
I
I
= 1.0A
D
D
D
= 1.0mA
= 250μA
I
= 90A
= 64V
F
V
T
R
= 125°C
J
T
= 25°C
J
0
100 200 300 400 500 600 700 800 900
-75 -50 -25
0
25 50 75 100 125 150 175
, Temperature ( °C )
di / dt - (A / μs)
T
f
J
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage Vs. Temperature
800
32
600
400
24
16
I
= 90A
= 64V
I
= 135A
= 64V
F
F
200
0
8
0
V
V
T
R
R
T
= 125°C
= 125°C
J
J
T
= 25°C
T
= 25°C
J
J
100 200 300 400 500 600 700 800 900
100 200 300 400 500 600 700 800 900
di / dt - (A / μs)
di / dt - (A / μs)
f
f
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
800
600
400
200
0
I
= 135A
= 64V
F
V
T
R
= 125°C
J
T
= 25°C
J
100 200 300 400 500 600 700 800 900 1000
di / dt - (A / μs)
f
Fig. 20 - Typical Stored Charge vs. dif/dt
6
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IRFS/SL3107PbF
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
D.U.T
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple
≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
0.01Ω
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2μF
12V
.3μF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
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7
IRFS/SL3107PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLED ON WW 19, 1997
IN THE ASSEMBLY LINE "C"
DATE CODE
YEAR 7 = 1997
WEEK 19
ASSEMBLY
LOT CODE
LINE C
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
P = DE S IGNAT E S L E AD-F RE E
PRODUCT (OPTIONAL)
YEAR 7 = 1997
AS S E MB L Y
LOT CODE
WEEK 19
A= ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
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IRFS/SL3107PbF
D2Pak (TO-263AB) Package Outline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
THIS IS AN IRF530S WITH
PART NUMBER
LOT CODE 8024
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
F530S
DATE CODE
YEAR 0 = 2000
WEEK 02
AS S E MB L Y
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
F530S
DATE CODE
P = DE S IGNAT E S L E AD - F RE E
PRODUCT (OPTIONAL)
YEAR 0 = 2000
AS S E MB L Y
LOT CODE
WEEK 02
A = AS S E MB L Y S IT E CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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9
IRFS/SL3107PbF
D2Pak (TO-263AB) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 101N. Sepulveda., El Segundo, California 90245, USA Tel: (310) 252-
7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 5/2011
10
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