IRFS4127PBF [INFINEON]

HEXFET Power MOSFET; HEXFET功率MOSFET
IRFS4127PBF
型号: IRFS4127PBF
厂家: Infineon    Infineon
描述:

HEXFET Power MOSFET
HEXFET功率MOSFET

文件: 总10页 (文件大小:356K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
PD - 96177  
IRFS4127PbF  
IRFSL4127PbF  
HEXFET® Power MOSFET  
Applications  
l High Efficiency Synchronous Rectification in SMPS  
l Uninterruptible Power Supply  
l High Speed Power Switching  
D
VDSS  
200V  
18.6m  
22m  
RDS(on) typ.  
G
max.  
l Hard Switched and High Frequency Circuits  
ID  
72A  
S
Benefits  
l Improved Gate, Avalanche and Dynamic dV/dt  
Ruggedness  
D
D
l Fully Characterized Capacitance and Avalanche  
SOA  
l Enhanced body diode dV/dt and dI/dt Capability  
l Lead-Free  
S
D
S
G
G
D2Pak  
IRFS4127PbF  
TO-262  
IRFSL4127PbF  
G
D
S
Gate  
Drain  
Source  
Absolute Maximum Ratings  
Symbol  
Parameter  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current  
Max.  
72  
Units  
A
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
51  
300  
375  
2.5  
PD @TC = 25°C  
W
Maximum Power Dissipation  
Linear Derating Factor  
W/°C  
V
VGS  
± 20  
57  
Gate-to-Source Voltage  
Peak Diode Recovery  
dv/dt  
TJ  
V/ns  
°C  
-55 to + 175  
Operating Junction and  
TSTG  
Storage Temperature Range  
Soldering Temperature, for 10 seconds  
(1.6mm from case)  
300  
10lb in (1.1N m)  
Mounting torque, 6-32 or M3 screw  
Avalanche Characteristics  
Single Pulse Avalanche Energy  
EAS (Thermally limited)  
250  
mJ  
A
Avalanche Current  
IAR  
See Fig. 14, 15, 22a, 22b,  
Repetitive Avalanche Energy  
EAR  
mJ  
Thermal Resistance  
Symbol  
Parameter  
Typ.  
–––  
Max.  
0.4  
Units  
RθJC  
Junction-to-Case  
°C/W  
RθJA  
–––  
40  
Junction-to-Ambient  
www.irf.com  
1
09/16/08  
IRFS/SL4127PbF  
Static @ TJ = 25°C (unless otherwise specified)  
Symbol  
V(BR)DSS  
Parameter  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
Gate Threshold Voltage  
Min. Typ. Max. Units  
200 ––– –––  
––– 0.23 ––– V/°C Reference to 25°C, ID = 5mA  
Conditions  
VGS = 0V, ID = 250µA  
V
V(BR)DSS/TJ  
RDS(on)  
––– 18.6  
3.0 –––  
––– –––  
22  
5.0  
20  
VGS = 10V, ID = 44A  
mΩ  
V
VGS(th)  
VDS = VGS, ID = 250µA  
IDSS  
Drain-to-Source Leakage Current  
VDS = 200V, VGS = 0V  
µA  
––– ––– 250  
––– ––– 100  
––– ––– -100  
VDS = 200V, VGS = 0V, TJ = 125°C  
IGSS  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Internal Gate Resistance  
VGS = 20V  
GS = -20V  
nA  
V
RG(int)  
–––  
3.0  
–––  
Dynamic @ TJ = 25°C (unless otherwise specified)  
Symbol  
gfs  
Qg  
Parameter  
Forward Transconductance  
Total Gate Charge  
Min. Typ. Max. Units  
Conditions  
VDS = 50V, ID = 44A  
79  
––– –––  
S
––– 100 150  
ID = 44A  
Qgs  
Qgd  
Qsync  
td(on)  
tr  
Gate-to-Source Charge  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
30  
31  
69  
17  
18  
56  
22  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
VDS = 100V  
nC  
Gate-to-Drain ("Miller") Charge  
Total Gate Charge Sync. (Qg - Qgd)  
VGS = 10V  
ID = 44A, VDS =0V, VGS = 10V  
VDD = 130V  
Turn-On Delay Time  
Rise Time  
ID = 44A  
ns  
td(off)  
tf  
Turn-Off Delay Time  
RG = 2.7Ω  
VGS = 10V  
Fall Time  
Ciss  
Coss  
Crss  
Input Capacitance  
––– 5380 –––  
––– 410 –––  
V
GS = 0V  
Output Capacitance  
VDS = 50V  
Reverse Transfer Capacitance  
Effective Output Capacitance (Energy Related)  
Effective Output Capacitance (Time Related)  
–––  
86  
–––  
pF ƒ = 1.0MHz (See Fig.5)  
Coss eff. (ER)  
oss eff. (TR)  
––– 360 –––  
––– 590 –––  
V
GS = 0V, VDS = 0V to 160V (See Fig.11)  
GS = 0V, VDS = 0V to 160V  
C
V
Diode Characteristics  
Symbol  
Parameter  
Continuous Source Current  
Min. Typ. Max. Units  
Conditions  
MOSFET symbol  
IS  
––– –––  
––– ––– 300  
––– ––– 1.3  
76  
D
S
(Body Diode)  
showing the  
A
ISM  
Pulsed Source Current  
(Body Diode)  
integral reverse  
G
p-n junction diode.  
TJ = 25°C, IS = 44A, VGS = 0V  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
V
TJ = 25°C  
TJ = 125°C  
TJ = 25°C  
TJ = 125°C  
TJ = 25°C  
VR = 100V,  
IF = 44A  
di/dt = 100A/µs  
––– 136 –––  
––– 139 –––  
––– 458 –––  
––– 688 –––  
ns  
Qrr  
Reverse Recovery Charge  
nC  
A
IRRM  
ton  
Reverse Recovery Current  
Forward Turn-On Time  
–––  
8.3  
–––  
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)  
Notes:  
 Repetitive rating; pulse width limited by max. junction  
temperature.  
‚ Limited by TJmax, starting TJ = 25°C, L = 0.26mH  
RG = 25, IAS = 44A, VGS =10V. Part not recommended for use  
above this value .  
Coss eff. (TR) is a fixed capacitance that gives the same charging time  
as Coss while VDS is rising from 0 to 80% VDSS  
† Coss eff. (ER) is a fixed capacitance that gives the same energy as  
Coss while VDS is rising from 0 to 80% VDSS  
‡ When mounted on 1" square PCB (FR-4 or G-10 Material). For recom  
.
.
ƒ ISD 44A, di/dt 760A/µs, VDD V(BR)DSS, TJ 175°C.  
„ Pulse width 400µs; duty cycle 2%.  
mended footprint and soldering techniques refer to application note #AN-994.  
ˆ Rθ is measured at TJ approximately 90°C  
‰RθJC value shown is at time zero  
2
www.irf.com  
IRFS/SL4127PbF  
1000  
100  
10  
1000  
100  
10  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
VGS  
15V  
10V  
8.0V  
7.0V  
6.0V  
5.5V  
5.0V  
4.5V  
TOP  
TOP  
BOTTOM  
BOTTOM  
1
4.5V  
1
0.1  
0.01  
60µs PULSE WIDTH  
Tj = 175°C  
60µs PULSE WIDTH  
Tj = 25°C  
4.5V  
0.1  
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
3.5  
3.0  
2.5  
2.0  
1.5  
1.0  
0.5  
1000  
100  
10  
I
= 44A  
V
= 50V  
D
DS  
60µs PULSE WIDTH  
V
= 10V  
GS  
T
= 175°C  
J
T
= 25°C  
J
1
0.1  
3.0  
4.0  
5.0  
6.0  
7.0  
8.0  
-60 -40 -20  
0
20 40 60 80 100 120 140 160 180  
V
, Gate-to-Source Voltage (V)  
GS  
T
, Junction Temperature (°C)  
J
Fig 4. Normalized On-Resistance vs. Temperature  
Fig 3. Typical Transfer Characteristics  
8000  
6000  
4000  
2000  
0
16  
V
C
= 0V,  
f = 1 MHZ  
GS  
I = 44A  
D
= C + C , C SHORTED  
iss  
gs  
gd ds  
V
V
V
= 160V  
= 100V  
= 40V  
C
= C  
DS  
DS  
DS  
rss  
gd  
C
= C + C  
oss  
ds  
gd  
12  
8
C
iss  
4
C
oss  
C
rss  
0
0
20  
40  
60  
80  
100  
120  
1
10  
100  
Q
Total Gate Charge (nC)  
G
V
, Drain-to-Source Voltage (V)  
DS  
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage  
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage  
www.irf.com  
3
IRFS/SL4127PbF  
1000  
1000  
100  
10  
OPERATION IN THIS AREA  
LIMITED BY R  
(on)  
DS  
100µsec  
T
= 175°C  
100  
10  
1
J
1msec  
T
= 25°C  
J
10msec  
1
Tc = 25°C  
Tj = 175°C  
Single Pulse  
V
= 0V  
1.2  
GS  
DC  
0.1  
0.1  
0.0  
0.2  
V
0.4  
0.6  
0.8  
1.0  
1.4  
1
10  
100  
1000  
V
, Drain-toSource Voltage (V)  
, Source-to-Drain Voltage (V)  
DS  
SD  
Fig 8. Maximum Safe Operating Area  
Fig 7. Typical Source-Drain Diode  
Forward Voltage  
260  
80  
60  
40  
20  
0
Id = 5mA  
240  
220  
200  
180  
-60 -40 -20 0 20 40 60 80 100120140160180  
25  
50  
75  
100  
125  
150  
175  
T
, Temperature ( °C )  
T
, Case Temperature (°C)  
J
Fig 9. MaxiCmum Drain Current vs.  
Fig 10. Drain-to-Source Breakdown Voltage  
Case Temperature  
8.0  
6.0  
4.0  
2.0  
0.0  
1000  
I
D
TOP  
8.2A  
13A  
44A  
800  
600  
400  
200  
0
BOTTOM  
0
40  
80  
120  
160  
200  
25  
50  
75  
100  
125  
150  
175  
V
Drain-to-Source Voltage (V)  
Starting T , Junction Temperature (°C)  
J
DS,  
Fig 11. Typical COSS Stored Energy  
Fig 12. Maximum Avalanche Energy Vs. DrainCurrent  
4
www.irf.com  
IRFS/SL4127PbF  
1
D = 0.50  
0.20  
0.1  
R1  
R1  
R2  
R2  
R3  
R3  
R4  
R4  
τι  
(sec)  
Ri (°C/W)  
0.02  
0.10  
0.05  
τJ  
0.000019  
τC  
τJ  
τ1  
τ
0.083333 0.000078  
0.181667 0.001716  
0.113333 0.008764  
τ
τ
3 τ3  
τ4  
2 τ2  
τ1  
τ4  
0.02  
0.01  
0.01  
Ci= τi/Ri  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
SINGLE PULSE  
( THERMAL RESPONSE )  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
100  
10  
1
Allowed avalanche Current vs avalanche  
Duty Cycle = Single Pulse  
pulsewidth, tav, assuming Tj = 150°C and  
Tstart =25°C (Single Pulse)  
0.01  
0.05  
0.10  
Allowed avalanche Current vs avalanche  
pulsewidth, tav, assuming ∆Τ j = 25°C and  
Tstart = 150°C.  
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
1.0E-01  
tav (sec)  
Fig 14. Typical Avalanche Current vs.Pulsewidth  
250  
200  
150  
100  
50  
Notes on Repetitive Avalanche Curves , Figures 14, 15:  
(For further info, see AN-1005 at www.irf.com)  
1. Avalanche failures assumption:  
Purely a thermal phenomenon and failure occurs at a temperature far in  
excess of Tjmax. This is validated for every part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.  
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.  
4. PD (ave) = Average power dissipation per single avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase  
during avalanche).  
TOP  
BOTTOM 1% Duty Cycle  
= 44A  
Single Pulse  
I
D
6. Iav = Allowable avalanche current.  
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as  
25°C in Figure 14, 15).  
tav = Average time in avalanche.  
D = Duty cycle in avalanche = tav ·f  
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)  
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC  
25  
50  
75  
100  
125  
150  
175  
Iav = 2DT/ [1.3·BV·Zth]  
EAS (AR) = PD (ave)·tav  
Starting T , Junction Temperature (°C)  
J
Fig 15. Maximum Avalanche Energy vs. Temperature  
www.irf.com  
5
IRFS/SL4127PbF  
6.0  
50  
40  
30  
20  
10  
0
I
I
I
= 1.0A  
D
D
D
= 1.0mA  
= 250µA  
5.0  
4.0  
3.0  
2.0  
1.0  
I
= 29A  
F
V
T
= 100V  
R
= 125°C  
= 25°C  
J
T
J
-75 -50 -25  
0
J
25 50 75 100 125 150 175  
, Temperature ( °C )  
100 200 300 400 500 600 700 800 900 1000  
T
di / dt - (A / µs)  
f
Fig. 17 - Typical Recovery Current vs. dif/dt  
Fig 16. Threshold Voltage Vs. Temperature  
60  
3000  
50  
40  
30  
20  
2500  
2000  
1500  
1000  
500  
I
= 44A  
I
= 29A  
F
F
V
= 100V  
V
= 100V  
R
R
10  
0
T
= 125°C  
= 25°C  
T
= 125°C  
= 25°C  
J
J
T
T
J
J
0
100 200 300 400 500 600 700 800 900 1000  
100 200 300 400 500 600 700 800 900 1000  
di / dt - (A / µs)  
f
di / dt - (A / µs)  
f
Fig. 18 - Typical Recovery Current vs. dif/dt  
Fig. 19 - Typical Stored Charge vs. dif/dt  
3000  
2500  
2000  
1500  
1000  
500  
I
= 44A  
F
V
= 100V  
= 125°C  
= 25°C  
R
T
J
J
T
0
100 200 300 400 500 600 700 800 900 1000  
di / dt - (A / µs)  
f
Fig. 20 - Typical Stored Charge vs. dif/dt  
6
www.irf.com  
IRFS/SL4127PbF  
Driver Gate Drive  
P.W.  
P.W.  
Period  
D.U.T  
Period  
D =  
+
*
=10V  
V
GS  
ƒ
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
-
D.U.T. I Waveform  
SD  
+
‚
-
Reverse  
Recovery  
Current  
Body Diode Forward  
„
Current  
di/dt  
-
+
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  

V
DD  
VDD  
Re-Applied  
Voltage  
dv/dt controlled by RG  
RG  
+
-
Body Diode  
Forward Drop  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
Inductor Current  
I
SD  
Ripple 5%  
* VGS = 5V for Logic Level Devices  
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel  
HEXFET® Power MOSFETs  
V
(BR)DSS  
15V  
t
p
DRIVER  
+
L
V
DS  
D.U.T  
AS  
R
G
V
DD  
-
I
A
V
2
GS  
0.01  
t
p
I
AS  
Fig 22b. Unclamped Inductive Waveforms  
Fig 22a. Unclamped Inductive Test Circuit  
RD  
VDS  
V
DS  
90%  
VGS  
D.U.T.  
RG  
+
VDD  
-
VGS  
10%  
Pulse Width ≤ 1 µs  
Duty Factor ≤ 0.1 %  
V
GS  
t
t
r
t
t
f
d(on)  
d(off)  
Fig 23a. Switching Time Test Circuit  
Fig 23b. Switching Time Waveforms  
Id  
Current Regulator  
Same Type as D.U.T.  
Vds  
Vgs  
50KΩ  
.2µF  
12V  
.3µF  
+
V
DS  
D.U.T.  
-
Vgs(th)  
V
GS  
3mA  
I
I
D
G
Qgs1  
Qgs2  
Qgd  
Qgodr  
Current Sampling Resistors  
Fig 24a. Gate Charge Test Circuit  
Fig 24b. Gate Charge Waveform  
www.irf.com  
7
IRFS/SL4127PbF  
D2Pak (TO-263AB) Package Outline  
Dimensions are shown in millimeters (inches)  
D2Pak (TO-263AB) Part Marking Information  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
8
www.irf.com  
IRFS/SL4127PbF  
TO-262 Package Outline  
Dimensions are shown in millimeters (inches)  
TO-262 Part Marking Information  
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
www.irf.com  
9
IRFS/SL4127PbF  
D2Pak (TO-263AB) Tape & Reel Information  
Dimensions are shown in millimeters (inches)  
TRR  
1.60 (.063)  
1.50 (.059)  
1.60 (.063)  
1.50 (.059)  
4.10 (.161)  
3.90 (.153)  
0.368 (.0145)  
0.342 (.0135)  
FEED DIRECTION  
1.85 (.073)  
11.60 (.457)  
11.40 (.449)  
1.65 (.065)  
24.30 (.957)  
23.90 (.941)  
15.42 (.609)  
15.22 (.601)  
TRL  
1.75 (.069)  
1.25 (.049)  
10.90 (.429)  
10.70 (.421)  
4.72 (.136)  
4.52 (.178)  
16.10 (.634)  
15.90 (.626)  
FEED DIRECTION  
13.50 (.532)  
12.80 (.504)  
27.40 (1.079)  
23.90 (.941)  
4
330.00  
(14.173)  
MAX.  
60.00 (2.362)  
MIN.  
30.40 (1.197)  
MAX.  
NOTES :  
1. COMFORMS TO EIA-418.  
2. CONTROLLING DIMENSION: MILLIMETER.  
3. DIMENSION MEASURED @ HUB.  
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.  
26.40 (1.039)  
24.40 (.961)  
4
3
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/  
Data and specifications subject to change without notice.  
This product has been designed and qualified for the Industrial market.  
Qualification Standards can be found on IR’s Web site.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information. 09/2008  
10  
www.irf.com  

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Power Field-Effect Transistor, 41A I(D), 150V, 0.045ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, PLASTIC, D2PAK-3
INFINEON

IRFS4227

N-Channel MOSFET Transistor
ISC