IRFS41N15DTRLPBF [INFINEON]
Power Field-Effect Transistor, 41A I(D), 150V, 0.045ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, PLASTIC, D2PAK-3;
| 型号： | IRFS41N15DTRLPBF |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 41A I(D), 150V, 0.045ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, LEAD FREE, PLASTIC, D2PAK-3 |
| 文件： | 总12页 (文件大小：720K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-95145
IRFB41N15DPbF
IRFIB41N15DPbF
IRFS41N15DPbF
IRFSL41N15DPbF
Applications
HEXFET® Power MOSFET
l HighfrequencyDC-DCconverters
l Lead-Free
VDSS RDS(on) max
ID
Benefits
0.045Ω
150V
41A
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
TO-220AB
IRFB41N15D
D2Pak
TO-262
TO-220 FullPak
IRFIB41N15D
IRFS41N15D IRFSL41N15D
Absolute Maximum Ratings
Parameter
Continuous Drain Current, VGS @ 10V
Max.
41
Units
A
I
I
I
@ T = 25°C
C
D
D
@ T = 100°C
C
29
Continuous Drain Current, VGS @ 10V
164
3.1
200
48
Pulsed Drain Current
DM
Power Dissipation, D2Pak
Power Dissipation, TO-220
Power Dissipation, Fullpak
Linear Derating Factor, TO-220
Linear Derating Factor, Fullpak
Gate-to-Source Voltage
P
P
P
@T = 25°C
A
W
D
D
D
@T = 25°C
C
@T = 25°C
C
1.3
W/°C
0.32
± 30
V
V
GS
Peak Diode Recovery dv/dt
dv/dt
2.7
V/ns
T
J
-55 to + 175
Operating Junction and
T
°C
Storage Temperature Range
STG
Soldering Temperature, for 10 seconds
Mounting torque, 6-32 or M3 screw
300 (1.6mm from case )
1.1(10)
N•m (lbf•in)
Thermal Resistance
Parameter
Typ.
–––
–––
0.50
–––
–––
–––
Max.
0.75
3.14
–––
62
Units
°C/W
RθJC
Junction-to-Case
RθJC
Rθcs
RθJA
RθJA
RθJA
Junction-to-Case, Fullpak
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient, TO-220
Junction-to-Ambient, D2Pak
40
65
Junction-to-Ambient, Fullpak
Notes through are on page 12
www.irf.com
1
04/22/04
IRFB/IRFIB/IRFS/IRFSL41N15DPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
V(BR)DSS
VGS = 0V, ID = 250µA
Drain-to-Source Breakdown Voltage
150
–––
–––
V
∆
∆
V(BR)DSS/ TJ
Reference to 25°C, ID = 1mA
VGS = 10V, ID = 25A
VDS = VGS, ID = 250µA
VDS = 150V, VGS = 0V
VDS = 120V, VGS = 0V, TJ = 150°C
VGS = 30V
Breakdown Voltage Temp. Coefficient –––
Static Drain-to-Source On-Resistance –––
0.17
––– V/°C
RDS(on)
VGS(th)
IDSS
––– 0.045
Ω
V
Gate Threshold Voltage
3.0
–––
–––
–––
–––
–––
–––
–––
–––
–––
5.5
25
Drain-to-Source Leakage Current
µA
250
100
-100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
nA
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 25A
gfs
Forward Transconductance
18
–––
72
21
35
16
63
25
14
–––
110
31
S
Qg
ID = 25A
Total Gate Charge
–––
–––
–––
–––
–––
–––
–––
Qgs
Qgd
td(on)
tr
VDS = 120V
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC
VGS = 10V
52
VDD = 75V
ID = 25A
–––
–––
–––
–––
td(off)
tf
RG = 2.5Ω
Turn-Off Delay Time
Fall Time
ns
VGS = 10V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
VGS = 0V
Input Capacitance
––– 2520 –––
VDS = 25V
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
–––
–––
510
110
–––
–––
pF ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
––– 3090 –––
VGS = 0V, VDS = 120V, ƒ = 1.0MHz
–––
–––
230
250
–––
–––
ꢀ
VGS = 0V, VDS = 0V to 120V
Avalanche Characteristics
Parameter
Typ.
Max.
Units
EAS
–––
470
mJ
Single Pulse Avalanche Energy
IAR
–––
–––
25
20
A
Avalanche Current
EAR
mJ
Repetitive Avalanche Energy
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
S
I
I
Continuous Source Current
–––
–––
41
MOSFET symbol
S
(Body Diode)
Pulsed Source Current
A
showing the
integral reverse
G
–––
–––
164
SM
(Body Diode)
p-n junction diode.
V
t
T = 25°C, I = 25A, V
= 0V
Diode Forward Voltage
–––
–––
–––
–––
170
1.3
1.3
260
1.9
V
SD
J
S
GS
T = 25°C, I = 25A
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
ns
µC
rr
J
F
Q
t
di/dt = 100A/µs
rr
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
on
2
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IRFB/IRFIB/IRFS/IRFSL41N15DPbF
1000
1000
100
10
VGS
VGS
15V
TOP
15V
TOP
10V
10V
9.0V
8.0V
7.5V
7.0V
6.5V
9.0V
8.0V
7.5V
7.0V
6.5V
BOTTOM 6.0V
BOTTOM 6.0V
100
10
1
6.0V
20µs PULSE WIDTH
20µs PULSE WIDTH
6.0V
1
°
T = 25 C
J
°
T = 175 C
J
1
0.1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.0
41A
=
I
D
2.5
2.0
1.5
1.0
0.5
0.0
100
10
1
°
T = 175 C
J
°
T = 25 C
J
V
= 25V
DS
20µs PULSE WIDTH
V
= 10V
GS
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
6
7
8
9
10
11
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
vs. Temperature
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3
IRFB/IRFIB/IRFS/IRFSL41N15DPbF
100000
20
I
D
= 25A
V
= 0V,
f = 1 MHZ
+ C
GS
C
C
C
= C
,
C
SHORTED
iss
rss
oss
gs
gd
ds
V
V
V
= 120V
= 75V
= 30V
DS
DS
DS
= C
gd
16
12
8
= C + C
10000
1000
100
ds gd
Ciss
Coss
Crss
4
FOR TEST CIRCUIT
SEE FIGURE 13
10
0
0
20
40
60
80 100
120
1
10
100
1000
Q , Total Gate Charge (nC)
G
V
DS
, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
100
10
1
°
T = 175 C
10us
J
100us
1ms
°
T = 25 C
J
10ms
°
T = 25 C
C
°
T = 175 C
Single Pulse
J
V
= 0 V
GS
0.1
0.2
1
0.6
1.0
1.4
1.8
1
10
100
1000
V
,Source-to-Drain Voltage (V)
V
, Drain-to-Source Voltage (V)
SD
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFB/IRFIB/IRFS/IRFSL41N15DPbF
RD
50
40
30
20
10
0
VDS
VGS
D.U.T.
RG
+VDD
-
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
D = 0.50
0.20
P
2
DM
0.1
0.10
0.05
t
1
t
2
0.02
0.01
Notes:
1. Duty factor D = t / t
SINGLE PULSE
(THERMAL RESPONSE)
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/IRFIB/IRFS/IRFSL41N15DPbF
1200
15V
I
D
TOP
10A
21A
1000
BOTTOM 25A
DR IVER
L
V
D S
800
600
400
200
0
D .U .T
A S
R
G
+
-
V
D D
I
A
V
GS
0.0 1
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
VGS
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRFB/IRFIB/IRFS/IRFSL41N15DPbF
Peak Diode Recovery dv/dt Test Circuit
+
-
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB/IRFIB/IRFS/IRFSL41N15DPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.7
- B
-
10.2.4
2.87 (.113)
2.62 (.103)
4.20 (.165)
3.54 (.139)
1.32 (.052)
.0
- A
-
6.10 (.240)
4
15.24 (.600)
14.
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFETIGBTs, CoPACK
1
2
3
1- GATE
1- GATE
2- DRAIN
2- COLLECTOR
3- EMITTER
4- COLLECTOR
3- SOURCE
4- DRAIN
14.09 (.555)
13.47 (.530)
3.55 (.140)
0.93 (.037)
0.46 (.018)
3X
3X
3X
1.15 (.045)
0.36 (.014)
M
B
A
M
2.92 (.115)
2.54 .1
2X
N O TE S:
1
2
D IM EN S IO N IN G
&
TO LE R AN C IN G P ER A N SI Y 14.5M , 1982.
3
4
O U TLIN E C O N FO R M S TO JE D E C O U TLIN E TO -220AB .
HE A TSIN K LE AD M EA SU R E M E N TS D O NO T IN CLU D E B U R R S.
C O N TR OLLIN G D IM E N SIO N : IN C H
&
TO-220AB Part Marking Information
EXAMPLE: THIS IS ANIRF1010
LOT CODE 1789
PART NUMBER
ASSEMBLED ON WW 19, 1997
INTHE ASSEMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" inassembly line
position indicates "Lead-Free"
DAT E CODE
YEAR 7 = 1997
WEEK 19
AS S E MBLY
LOT CODE
LINE C
8
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IRFB/IRFIB/IRFS/IRFSL41N15DPbF
TO-220 Full-Pak Package Outline
Dimensions are shown in millimeters (inches)
TO-220 Full-Pak Part Marking Information
EXAMPLE: T HIS IS AN IRF I840G
WIT H AS S EMBLY
PART NUMBER
LOT CODE 3432
AS S EMBLE D ON WW 24 1999
IN T HE AS S EMBLY LINE "K"
INT ERNAT IONAL
RECT IFIER
LOGO
IRFI840G
924K
34
32
DAT E CODE
YEAR 9 = 1999
WEEK 24
Note: "P" in assembly line
position indicates "Lead-Free"
AS S EMBLY
LOT CODE
LINE K
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9
IRFB/IRFIB/IRFS/IRFSL41N15DPbF
D2Pak Package Outline
D2Pak Part Marking Information (Lead-Free)
T HIS IS AN IRF 530S WIT H
PAR T NU MB E R
LOT CODE 8024
INT E R NAT IONAL
R E CT IF IE R
LOGO
AS S E MB LE D ON WW 02, 2000
IN T H E AS S E MB LY LINE "L"
F 530S
DAT E CODE
YE AR 0 = 2000
WE E K 02
Note: "P " in as s embly line
pos ition indicates "Lead-F ree"
AS S E MB LY
LOT CODE
LINE
L
OR
PAR T NU MB E R
INT E R NAT IONAL
R E CT IF IE R
L OGO
F 530S
DAT E CODE
P
=
DE S IGNAT E S L E AD-F R E E
PR ODU CT (OPT IONAL )
AS S E MB L Y
L OT CODE
YE AR 0 = 2000
WE E K 02
A = AS S E MB L Y S IT E CODE
10
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IRFB/IRFIB/IRFS/IRFSL41N15DPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: T H IS IS AN IRL 3103L
LOT CODE 1789
PAR T NU MBER
INT ER NAT IONAL
R ECT IF IER
LOGO
AS S EMB LE D ON WW 19, 1997
IN T HE AS S E MBL Y LINE "C"
DAT E CODE
YE AR 7 = 1997
WE EK 19
Note: "P" in as s embly line
pos ition indicates "L ead-F ree"
AS S EMB LY
LOT CODE
LINE C
OR
PAR T NU MBER
INT ER NAT IONAL
R ECT IF IER
LOGO
DAT E CODE
P = DES IGNAT E S LEAD-F RE E
PR ODU CT (OPT IONAL)
YE AR 7 = 1997
AS S EMB LY
LOT CODE
WE EK 19
A = AS S E MBL Y S IT E CODE
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11
IRFB/IRFIB/IRFS/IRFSL41N15DPbF
D2Pak Tape & Reel Information
TR R
1.60 (.063)
1.50 (.059)
1.60 (.063)
4.10 (.161)
1.50 (.059)
0.368 (.0145)
0.342 (.0135)
3.90 (.153)
F EE D D IR E CTIO N
TR L
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.1 36)
4.52 (.1 78)
16.10 (.63 4)
15.90 (.62 6)
FE ED D IR E C TIO N
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NO TES
:
1. CO M FO RM S TO EIA-418.
2. CO NTRO LLING DIMENSION : M ILLIMETER.
3. DIM ENSIO N M EASUR ED
4. INC LU DES FLANG E DISTO RTION
26.40 (1.039)
24.40 (.961)
4
@ HU B.
3
@
O UTER EDG E.
Notes:
Repetitive rating; pulse width limited by
max. junction temperature.
Starting TJ = 25°C, L = 1.5mH, RG = 25Ω,
IAS = 25A.
ISD ≤ 25A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C.
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀCoss eff. is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
This is only applied to TO-220AB package.
This is applied to D2Pak, when mounted on 1" square PCB
( FR-4 or G-10 Material ). For recommended footprint and
soldering techniques refer to application note #AN-994.
,
TO-220AB & TO-220 FullPak packages are not recommended for Surface Mount Application.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information04/04
12
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