IRFS59N10DPBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRFS59N10DPBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总11页 (文件大小：224K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95378
IRFB59N10DPbF
IRFS59N10DPbF
SMPS MOSFET
IRFSL59N10DPbF
HEXFET® Power MOSFET
Applications
l High frequency DC-DC converters
l UPS / Motor Control Inverters
l Lead-Free
VDSS
100V
RDS(on) max
ID
59A
0.025Ω
Benefits
l Low Gate-to-Drain Charge to Reduce
Switching Losses
l Fully Characterized Capacitance Including
Effective COSS to Simplify Design, (See
App. Note AN1001)
l Fully Characterized Avalanche Voltage
and Current
D2Pak
IRFS59N10D
TO-262
IRFSL59N10D
TO-220AB
IRFB59N10D
Absolute Maximum Ratings
Parameter
Max.
59
Units
A
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
42
236
PD @TA = 25°C
PD @TC = 25°C
Power Dissipation
3.8
W
Power Dissipation
200
Linear Derating Factor
1.3
W/°C
V
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 30
Peak Diode Recovery dv/dt
Operating Junction and
3.3
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
Mounting torqe, 6-32 or M3 screw
°C
300 (1.6mm from case )
10 lbf•in (1.1N•m)
Typical SMPS Topologies
l Half-bridge and Full-bridge DC-DC Converters
l Full-bridge Inverters
Notes through are on page 11
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1
06/07/04
IRFB/IRFS/IRFSL59N10DPbF
Static @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
100 ––– –––
––– 0.11 ––– V/°C Reference to 25°C, ID = 1mA
Conditions
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
VGS = 0V, ID = 250µA
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient
RDS(on) Static Drain-to-Source On-Resistance ––– ––– 0.025
VGS(th)
Ω
V
VGS = 10V, ID = 35.4A
VDS = VGS, ID = 250µA
VDS = 100V, VGS = 0V
VDS = 80V, VGS = 0V, TJ = 150°C
VGS = 30V
Gate Threshold Voltage
3.0
––– 5.5
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
IDSS
Drain-to-Source Leakage Current
µA
nA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
IGSS
VGS = -30V
Dynamic @ TJ = 25°C (unless otherwise specified)
Parameter
Forward Transconductance
Total Gate Charge
Min. Typ. Max. Units
Conditions
VDS = 50V, ID = 35.4A
ID = 35.4A
gfs
18
––– –––
76 114
S
Qg
–––
–––
–––
–––
–––
–––
–––
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
24
36
36
54
nC VDS = 80V
VGS = 10V,
16 –––
90 –––
20 –––
12 –––
VDD = 50V
ID = 35.4A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 2.5Ω
VGS = 10V
Ciss
Coss
Crss
Coss
Coss
Coss eff.
Input Capacitance
––– 2450 –––
––– 740 –––
––– 190 –––
––– 3370 –––
––– 390 –––
––– 690 –––
VGS = 0V
Output Capacitance
Reverse Transfer Capacitance
Output Capacitance
Output Capacitance
Effective Output Capacitance
VDS = 25V
pF
ƒ = 1.0MHz
VGS = 0V, VDS = 1.0V, ƒ = 1.0MHz
VGS = 0V, VDS = 80V, ƒ = 1.0MHz
VGS = 0V, VDS = 0V to 80V ꢀ
Avalanche Characteristics
Parameter
Single Pulse Avalanche Energy
Avalanche Current
Typ.
Max.
510
35.4
20
Units
mJ
EAS
IAR
–––
–––
–––
A
EAR
Repetitive Avalanche Energy
mJ
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
Max.
0.75
–––
62
Units
RθJC
RθCS
RθJA
RθJA
Case-to-Sink, Flat, Greased Surface
Junction-to-Ambient
0.50
–––
°C/W
Junction-to-Ambient
–––
40
Diode Characteristics
Parameter
Min. Typ. Max. Units
Conditions
D
IS
Continuous Source Current
(Body Diode)
MOSFET symbol
59
––– –––
––– –––
showing the
A
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
p-n junction diode.
236
S
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse RecoveryCharge
Forward Turn-On Time
––– ––– 1.3
––– 130 200
––– 0.75 1.1
V
TJ = 25°C, IS = 35.4A, VGS = 0V
ns
TJ = 25°C, IF = 35.4A
Qrr
ton
µC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
2
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IRFB/IRFS/IRFSL59N10DPbF
1000
1000
100
10
VGS
VGS
15V
TOP
15V
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
100
10
1
BOTTOM 4.5V
BOTTOM 4.5V
5.0V
1
5.0V
0.1
0.01
20µs PULSE WIDTH
20µs PULSE WIDTH
T = 25 C
J
°
T = 175 C
J
°
0.1
0.1
1
10
100
0.1
1
10
100
V , Drain-to-Source Voltage (V)
DS
V
, Drain-to-Source Voltage (V)
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
2.5
2.0
1.5
1.0
0.5
0.0
1000
59A
=
I
D
100
10
1
°
T = 175 C
J
°
T = 25 C
J
V
= 50V
DS
20µs PULSE WIDTH
V
=10V
GS
0.1
4
6
8
10 12
14
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
V
, Gate-to-Source Voltage (V)
T , Junction Temperature( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
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3
IRFB/IRFS/IRFSL59N10DPbF
100000
10000
1000
20
16
12
8
V
= 0V,
f = 1 MHZ
I
D
= 35.4A
GS
V
V
V
= 80V
= 50V
= 20V
DS
DS
DS
C
= C + C
,
C
SHORTED
iss
gs
gd
ds
C
= C
rss
gd
C
= C + C
oss
ds
gd
Ciss
Coss
4
Crss
FOR TEST CIRCUIT
SEE FIGURE 13
100
0
0
20
40
60
80
100
120
1
10
100
Q , Total Gate Charge (nC)
G
V
, Drain-to-Source Voltage (V)
DS
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA LIMITED
BY R
DS(on)
10us
°
T = 175 C
J
100us
°
T = 25 C
J
1ms
1
10ms
°
T = 25 C
C
°
T = 175 C
Single Pulse
J
V
= 0 V
GS
1.8
1
0.1
0.2
1
10
100
1000
0.6
1.0
1.4
2.2
V
, Drain-to-Source Voltage (V)
V
,Source-to-Drain Voltage (V)
DS
SD
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
Forward Voltage
4
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IRFB/IRFS/IRFSL59N10DPbF
RD
60
50
40
30
20
10
0
VDS
VGS
D.U.T.
RG
+VDD
-
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
75
100
125
150
175
°
T , Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 9. Maximum Drain Current Vs.
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
P
2
DM
t
1
0.02
0.01
t
SINGLE PULSE
(THERMAL RESPONSE)
2
Notes:
1. Duty factor D =
t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFB/IRFS/IRFSL59N10DPbF
1200
I
D
TOP
14.5A
25.0A
15V
BOTTOM 35.4A
900
600
300
0
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
0.01Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
V
(BR)DSS
t
p
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
Q
G
50KΩ
VGS
.2µF
12V
.3µF
Q
Q
GD
GS
+
V
DS
D.U.T.
-
V
V
GS
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRFB/IRFS/IRFSL59N10DPbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
P.W.
Period
Period
D =
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 14. For N-Channel HEXFET® Power MOSFETs
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7
IRFB/IRFS/IRFSL59N10DPbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
3.78 (.149)
- B -
10.29 (.405)
2.87 (.113)
2.62 (.103)
4.69 (.185)
4.20 (.165)
3.54 (.139)
1.32 (.052)
1.22 (.048)
- A -
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
LEAD ASSIGNMENTS
1.15 (.045)
MIN
HEXFET
IGBTs, CoPACK
1
2
3
1- GATE
1- GATE
2- DRAIN
2- COLLECTOR
3- EMITTER
4- COLLECTOR
3- SOURCE
4- DRAIN
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
0.93 (.037)
0.69 (.027)
0.55 (.022)
0.46 (.018)
3X
3X
1.40 (.055)
3X
1.15 (.045)
0.36 (.014)
M
B A M
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
PART NUMBER
ASS EMBLED ON WW 19, 1997
IN T HE AS S EMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
Note: "P" in assembly line
position indicates "Lead-Free"
DATE CODE
YEAR 7 = 1997
WEEK 19
ASSEMBLY
LOT CODE
LINE C
8
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IRFB/IRFS/IRFSL59N10DPbF
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
THIS IS AN IRF530S WITH
LOT CODE 8024
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
ASS EMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
F530S
DAT E CODE
YEAR 0 = 2000
WE E K 02
Note: "P" in assembly line
position indicates "Lead-Free"
ASSEMBLY
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
F530S
DATE CODE
P = DE S I GNAT E S L E AD- F R E E
PRODUCT (OPTIONAL)
YEAR 0 = 2000
ASSEMBLY
LOT CODE
WEEK 02
A= ASSEMBLY SITE CODE
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9
IRFB/IRFS/IRFSL59N10DPbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
PART NUMBER
INTERNATIONAL
AS SEMB LED ON WW 19, 1997
RECT IFIER
IN THE ASSEMBLY LINE "C"
LOGO
DATE CODE
YEAR 7 = 1997
WE E K 19
Note: "P" in ass embly line
pos ition indicates "L ead-F ree"
ASSEMBLY
LOT CODE
LINE C
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
DATE CODE
P = DE S I GNAT E S L E AD-F R E E
PRODUCT (OPTIONAL)
YEAR 7 = 1997
ASSEMBLY
LOT CODE
WEEK 19
A = AS S E MB L Y S IT E CODE
10
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IRFB/IRFS/IRFSL59N10DPbF
D2Pak Tape & Reel Information
Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
24.30 (.957)
15.42 (.609)
23.90 (.941)
15.22 (.601)
TRL
1.75 (.069)
10.90 (.429)
10.70 (.421)
1.25 (.049)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Notes:
Repetitive rating; pulse width limited by
Pulse width ≤ 300µs; duty cycle ≤ 2%.
max. junction temperature.
ꢀ Coss eff. is a fixed capacitance that gives the same charging time
Starting TJ = 25°C, L = 0.8mH
as Coss while VDS is rising from 0 to 80% VDSS
RG = 25Ω, IAS = 35.4A.
This is only applied to TO-220AB package
ISD ≤ 35.4A, di/dt ≤ 350A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C
,
This is applied to D2Pak, when mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
Data and specifications subject to change without notice.
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TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 06/04
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11
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