IRFS7434 [INFINEON]
40V 单个 N 通道 HEXFET Power MOSFET, 采用无铅 D2-Pak 封装;
| 型号： | IRFS7434 |
| 厂家： | 
Infineon |
| 描述： | 40V 单个 N 通道 HEXFET Power MOSFET, 采用无铅 D2-Pak 封装 |
| 文件： | 总13页 (文件大小：310K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
StrongIRFET
IRFS7434PbF
IRFSL7434PbF
Applications
HEXFET® Power MOSFET
l Brushed Motor drive applications
l BLDC Motor drive applications
l Battery powered circuits
l Half-bridge and full-bridge topologies
l Synchronous rectifier applications
l Resonant mode power supplies
l OR-ing and redundant power switches
l DC/DC and AC/DC converters
l DC/AC Inverters
VDSS
40V
D
RDS(on) typ.
max.
1.25m
Ω
1.6m
320A
Ω
G
ID
(Silicon Limited)
S
195A
ID
(Package Limited)
D
D
S
Benefits
S
D
G
G
l Improved Gate, Avalanche and Dynamic dV/dt
D2Pak
TO-262
IRFSL7434PbF
Ruggedness
IRFS7434PbF
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
G
Gate
D
Drain
S
Source
Ordering Information
Standard Pack
Form
Base part number
Package Type
Complete Part Number
Quantity
IRFSL7434PbF
IRFS7434PbF
TO-262
D2Pak
Tube
Tube
Tape and Reel Left
50
50
800
IRFSL7434PbF
IRFS7434PbF
IRFS7434TRLPbF
5
4
3
2
1
0
350
300
250
200
150
100
50
I
= 100A
D
Limited By Package
T
= 125°C
J
T = 25°C
J
0
2
4
6
8
10 12 14 16 18 20
25
50
75
100
125
150
175
T
, Case Temperature (°C)
V
Gate -to -Source Voltage (V)
C
GS,
Fig 2. Maximum Drain Current vs. Case Temperature
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Fig 1. Typical On-Resistance vs. Gate Voltage
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1
IRFS/SL7434PbF
Absolute Maximum Ratings
Symbol
Parameter
Max.
320
Units
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Silicon Limited)
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
226
A
195
1270 *
294
PD @TC = 25°C
Maximum Power Dissipation
W
W/°C
V
Linear Derating Factor
1.96
VGS
dv/dt
TJ
Gate-to-Source Voltage
± 20
Peak Diode Recovery
5.0
V/ns
Operating Junction and
-55 to + 175
TSTG
Storage Temperature Range
°C
mJ
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Avalanche Characteristics
EAS (Thermally limited)
EAS (Thermally limited)
IAR
490
Single Pulse Avalanche Energy
Single Pulse Avalanche Energy
Avalanche Current
1098
A
See Fig. 14, 15 , 22a, 22b
EAR
Repetitive Avalanche Energy
mJ
Thermal Resistance
Symbol
Parameter
Junction-to-Case
Junction-to-Ambient (PCB Mount) , D2Pak
Typ.
Max.
0.5
Units
Rθ
JC
–––
–––
°C/W
RθJA
40
Static @ TJ = 25°C (unless otherwise specified)
Conditions
VGS = 0V, ID = 250μA
Symbol
Parameter
Min.
40
Typ.
–––
32
Max.
–––
–––
1.6
Units
V
V(BR)DSS
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
ΔV(BR)DSS/ΔTJ
–––
–––
mV/°C Reference to 25°C, ID = 5mA
RDS(on)
1.25
1.8
mΩ
mΩ
V
VGS = 10V, ID = 100A
VGS = 6.0V, ID = 50A
VDS = VGS, ID = 250μA
VDS = 40V, VGS = 0V
–––
3.9
VGS(th)
IDSS
Gate Threshold Voltage
2.2
–––
–––
–––
–––
–––
3.0
Drain-to-Source Leakage Current
–––
–––
–––
–––
2.1
1.0
μA
150
100
-100
–––
V
DS = 40V, VGS = 0V, TJ = 125°C
GS = 20V
VGS = -20V
IGSS
RG
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
V
nA
Ω
Notes:
ꢀ Pulse width ≤ 400μs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A by source
.
bonding technology . Note that current limitations arising from
heating of the device leads may occur with some lead mounting
Coss while VDS is rising from 0 to 80% VDSS
.
arrangements. (Refer to AN-1140)
Rθ is measured at TJ approximately 90°C.
Limited by TJmax starting TJ = 25°C, L= 1mH, RG = 50Ω, IAS = 47A, VGS =10V.
Repetitive rating; pulse width limited by max. junction
temperature.
When mounted on 1" square PCB (FR-4 or G-10 Material).
Please refer to AN-994 for more details:
http://www.irf.com/technical-info/appnotes/an-994.pdf
Limited by TJmax, starting TJ = 25°C, L = 0.099mH
RG = 50Ω, IAS = 100A, VGS =10V.
ISD ≤ 100A, di/dt ≤ 1307A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
∗ Pulse drain current is limited at 780A by source bonding technology.
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November 19, 2014
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IRFS/SL7434PbF
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol Parameter
Forward Transconductance
Min.
211
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
216
51
Max.
–––
324
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Units
S
Conditions
VDS = 10V, ID = 100A
ID = 100A
gfs
Qg
Total Gate Charge
Qgs
Qgd
Qsync
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
V
DS =20V
nC
ns
77
VGS = 10V
139
24
ID = 100A, VDS =0V, VGS = 10V
VDD = 20V
Rise Time
68
ID = 30A
td(off)
tf
Turn-Off Delay Time
115
68
R
G = 2.7Ω
GS = 10V
VGS = 0V
DS = 25V
ƒ = 1.0 MHz, See Fig. 5
Fall Time
V
Ciss
Coss
Crss
Input Capacitance
10820
1540
1140
1880
2208
Output Capacitance
V
pF
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Coss eff. (ER)
Coss eff. (TR)
V
GS = 0V, VDS = 0V to 32V , See Fig. 12
GS = 0V, VDS = 0V to 32V
V
Diode Characteristics
Symbol
Parameter
Min.
Typ.
Max.
Units
Conditions
D
IS
Continuous Source Current
MOSFET symbol
–––
–––
320
(Body Diode)
showing the
A
G
ISM
Pulsed Source Current
integral reverse
–––
–––
1270*
S
(Body Diode)
p-n junction diode.
VSD
dv/dt
trr
Diode Forward Voltage
Peak Diode Recovery
–––
–––
–––
–––
–––
–––
–––
0.9
5.0
38
1.3
–––
–––
–––
–––
–––
–––
V
TJ = 25°C, IS = 100A, VGS = 0V
TJ = 175°C, IS = 100A, VDS = 40V
V/ns
Reverse Recovery Time
Reverse Recovery Charge
Reverse Recovery Current
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 34V,
ns
37
IF = 100A
di/dt = 100A/μs
Qrr
50
nC
A
50
IRRM
1.9
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IRFS/SL7434PbF
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
TOP
TOP
BOTTOM
BOTTOM
4.5V
1
4.5V
60μs
≤
60μs
Tj = 25°C
PULSE WIDTH
Tj = 175°C
PULSE WIDTH
≤
1
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 3. Typical Output Characteristics
Fig 4. Typical Output Characteristics
1000
100
10
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
I
= 100A
= 10V
D
V
GS
T
= 175°C
J
T = 25°C
J
1
V
= 10V
DS
≤
60μs PULSE WIDTH
0.1
2
4
6
8
10
-60
-20
20
60
100
140
180
T
, Junction Temperature (°C)
V
, Gate-to-Source Voltage (V)
J
GS
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
14.0
1000000
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I = 100A
D
C
C
C
+ C , C
SHORTED
ds
iss
gs
gd
12.0
10.0
8.0
= C
rss
oss
gd
V
= 32V
= 20V
DS
= C + C
ds
gd
V
DS
C
iss
6.0
C
C
oss
rss
4.0
2.0
0.0
100
0
50
100
150
200
250
300
0.1
1
10
100
Q
, Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
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Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFS/SL7434PbF
1000
100
10
10000
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R
(on)
DS
T
= 175°C
J
100μsec
1msec
Limited By Package
T
= 25°C
J
10msec
DC
1
1
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
GS
0.1
0.1
0.1
1
10
100
0.0
0.5
1.0
1.5
2.0
2.5
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode
Forward Voltage
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
50
Id = 5.0mA
V
= 0V to 32V
DS
49
48
47
46
45
44
43
42
41
40
0
5
10 15 20 25 30 35 40 45
-60
-20
20
60
100
140
180
T
, Temperature ( °C )
V
Drain-to-Source Voltage (V)
J
DS,
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical COSS Stored Energy
20.0
V
= 6.0V
GS
V
= 5.5V
GS
15.0
10.0
5.0
VGS = 7.0V
VGS = 8.0V
VGS = 10V
0.0
0
100
200
300
400
500
I , Drain Current (A)
D
Fig 13. Typical On-Resistance vs. Drain Current
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IRFS/SL7434PbF
1
0.1
D = 0.50
0.20
0.10
0.05
0.02
0.01
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤj = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Avalanche Current vs.Pulse width
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
600
500
400
300
200
100
0
TOP
BOTTOM 1.0% Duty Cycle
= 100A
Single Pulse
I
D
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
25
50
75
100
125
150
175
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
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IRFS/SL7434PbF
10
8
4.5
3.5
2.5
1.5
0.5
I = 60A
F
V
= 34V
R
T = 25°C
J
T = 125°C
J
6
4
ID = 250μA
ID = 1.0mA
ID = 1.0A
2
0
0
200
400
600
800
1000
-75
-25
T
25
75
125
175
225
di /dt (A/μs)
, Temperature ( °C )
F
J
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
10
240
220
200
180
160
140
120
100
80
I = 100A
F
I = 60A
F
V
= 34V
V
= 34V
R
R
8
6
4
2
0
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
60
40
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/μs)
di /dt (A/μs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
200
I = 100A
F
V
= 34V
R
160
120
80
T = 25°C
J
T = 125°C
J
40
0
0
200
400
600
800
1000
di /dt (A/μs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
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IRFS/SL7434PbF
Driver Gate Drive
P.W.
P.W.
D =
D.U.T
Period
Period
+
-
*
=10V
V
GS
CircuitLayoutConsiderations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dtcontrolledbyRG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
InductorCurrent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
VGS
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
PulseWidth ≤ 1 µs
Duty Factor≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2μF
12V
.3μF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
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Fig 24b. Gate Charge Waveform
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8
IRFS/SL7434PbF
D2Pak(TO-263AB)PackageOutline
Dimensions are shown in millimeters (inches)
D2Pak (TO-263AB) Part Marking Information
THIS IS AN IRF530S WITH
PART NUMBER
LOT CODE 8024
INTERNATIONAL
RECTIFIER
LOGO
ASSEMBLED ON WW 02, 2000
IN THE ASSEMBLY LINE "L"
F530S
DATE CODE
YEAR 0 = 2000
WEEK 02
ASSEMBLY
LOT CODE
LINE L
OR
PART NUMBER
INTERNATIONAL
RECTIFIER
LOGO
F530S
DATE CODE
P = DES IGNATES LEAD - FREE
PRODUCT (OPTIONAL)
YEAR 0 = 2000
AS S E MB L Y
LOT CODE
WEEK 02
A = ASSEMBLY SITE CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFS/SL7434PbF
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
TO-262 Part Marking Information
E XAMPLE : T HIS IS AN IR L3103L
L OT CODE 1789
PAR T NUMB E R
INT E R NAT IONAL
R E CT IF IE R
L OGO
AS S E MB LE D ON WW 19, 1997
IN T H E AS S E MB LY L INE "C"
DAT E CODE
YEAR 7 = 1997
WEE K 19
AS S E MBLY
LOT CODE
LINE C
OR
PAR T NUMB E R
INT E RNAT IONAL
R ECT IF IE R
L OGO
DAT E CODE
P = DES IGNAT E S L EAD-F R E E
PR ODU CT (OPT IONAL)
YE AR 7 = 1997
AS S E MB LY
LOT CODE
WEE K 19
A = AS S E MB LY S IT E CODE
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
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IRFS/SL7434PbF
D2Pak (TO-263AB) Tape & Reel Information Dimensions are shown in millimeters (inches)
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
0.368 (.0145)
0.342 (.0135)
FEED DIRECTION
TRL
11.60 (.457)
11.40 (.449)
1.85 (.073)
1.65 (.065)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
30.40 (1.197)
MAX.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
26.40 (1.039)
24.40 (.961)
4
3
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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IRFS/SL7434PbF
Qualification information
†
Industrial
(per JEDEC JESD47F )††
Qualification level
D2Pak
MS L 1
N/A
Moisture Sensitivity Level
RoHS compliant
TO-262
Yes
Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability
Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comment
•
•
•
Updated EAS (L =1mH) = 1098mJ on page 2
11/19/2014
Ω
Updated note 9 “Limited by TJmax, starting T = 25°C, L = 1mH, RG = 50 , IAS = 47A, VGS =10V”. on page 2
J
Updated package outline on page 9 and 10.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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12
IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) .
contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
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Power Field-Effect Transistor, 195A I(D), 40V, 0.0016ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-263AB, LEAD FREE, PLASTIC, D2PAK-3/2
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