IRFS7437_技术文档

StrongIRFET

IRFS7437PbF

IRFSL7437PbF

Applications

l Brushed Motor drive applications

l BLDC Motor drive applications

l Battery powered circuits

l Half-bridge and full-bridge topologies

l Synchronous rectifier applications

l Resonant mode power supplies

l OR-ing and redundant power switches

l DC/DC and AC/DC converters

l DC/AC Inverters

HEXFET^®Power MOSFET

V_DSS

40V

D

R_DS(on)typ.

max.

1.4mΩ

1.8mΩ

G

I_D

250A

(Silicon Limited)

I_D

195A

(Package Limited)

S

D

Benefits

l Improved Gate, Avalanche and Dynamic dV/dt

Ruggedness

S

D

l Fully Characterized Capacitance and Avalanche

G

SOA

D²Pak

TO-262

l Enhanced body diode dV/dt and dI/dt Capability

l Lead-Free

IRFSL7437PbF

IRFS7437PbF

l Halogen-Free

G

D

S

Gate

Drain

Source

Standard Pack

Form

Tube

Base Part Number

Package Type

Orderable Part Number

Quantity

50

800

IRFSL7437PbF

IRFS7437PbF

TO-262

D2Pak

IRFSL7437PbF

IRFS7437PbF

IRFS7437TRLPbF

Tape and Reel Left

6

5

4

3

2

1

0

250

200

150

100

50

LIMITED BY PACKAGE

I

= 100A

D

T

= 125°C

= 25°C

J

T

J

0

4.0

6.0

8.0 10.0 12.0 14.0 16.0 18.0 20.0

, Gate-to-Source Voltage (V)

25

50

75

100

125

150

175

V

T

, Case Temperature (°C)

GS

C

Fig 2. Maximum Drain Current vs. Case Temperature

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Fig 1. Typical On-Resistance vs. Gate Voltage

1

January 6, 2015

IRFS7437PbF/IRFSL7437PbF

Absolute Maximum Ratings

Symbol

Parameter

Max.

Units

250

I_D@ T_C= 25°C

I_D@ T_C= 100°C

I_D@ T_C= 25°C

I_DM

Continuous Drain Current, V_GS@ 10V (Silicon Limited)

180

195

A

Continuous Drain Current, V_GS@ 10V (Wire Bond Limited)

Pulsed Drain Current

1000

230

Maximum Power Dissipation

Linear Derating Factor

P_D@T_C= 25°C

W

W/°C

V

1.5

± 20

Gate-to-Source Voltage

V_GS

dv/dt

T_J

3.0

Peak Diode Recovery

V/ns

-55 to + 175

Operating Junction and

°C

Storage Temperature Range

Soldering Temperature, for 10 seconds (1.6mm from case)

Mounting torque, 6-32 or M3 screw

T_STG

300

10lbf in (1.1N m)

Avalanche Characteristics

Single Pulse Avalanche Energy

E_{AS (Thermally limited)}

I_AR

350

802

mJ

Single Pulse Avalanche Energy

Avalanche Current

See Fig. 14, 15, 22a, 22b

A

Repetitive Avalanche Energy

E_AR

mJ

Thermal Resistance

Symbol

Parameter

Typ.

Max.

Units

Junction-to-Case

Junction-to-Ambient (PCB Mount) , D²Pak

0.65

R_θJC

R_θJA

–––

°C/W

40

Static @ T_J= 25°C (unless otherwise specified)

Conditions

Symbol

V_(BR)DSS

Parameter

Min.

40

Typ.

–––

0.029

1.4

Max.

–––

1.8

Units

V

V_GS= 0V, I_D= 250μA

Drain-to-Source Breakdown Voltage

Breakdown Voltage Temp. Coefficient

Static Drain-to-Source On-Resistance

Reference to 25°C, I_D= 1mA

V_GS= 10V, I_D= 100A

ΔV_(BR)DSS/ΔT_J

–––

2.2

V/°C

R_DS(on)

mΩ

V

_GS= 6.0V, I_D= 50A

_DS= V_GS, I_D= 150μA

_DS= 40V, V_GS= 0V

2.0

–––

3.9

V_GS(th)

I_DSS

Gate Threshold Voltage

3.0

V

Drain-to-Source Leakage Current

–––

2.2

1.0

μA

V_DS= 40V, V_GS= 0V, T_J= 125°C

150

100

-100

–––

V

_GS= 20V

_GS= -20V

I_GSS

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Internal Gate Resistance

nA

V

R_G

Ω

Notes:

ꢀ Pulse width ≤ 400μs; duty cycle ≤ 2%.

Calculated continuous current based on maximum allowable junction

temperature. Bond wire current limit is 195A. Note that current

limitations arising from heating of the device leads may occur with

someleadmountingarrangements.(RefertoAN-1140)

Repetitive rating; pulse width limited by max. junction

temperature.

C_osseff. (TR) is a fixed capacitance that gives the same charging time

as C_osswhile V_DSis rising from 0 to 80% V_DSS

C_osseff. (ER) is a fixed capacitance that gives the same energy as

C_osswhile V_DSis rising from 0 to 80% V_DSS

R_θis measured at T_Japproximately 90°C.

.

Limited by T_Jmax, starting T_J= 25°C, L = 0.069mH

R_G= 50Ω, I_AS= 100A, V_GS=10V.

Limited by T_Jmaxstarting T_J= 25°C, L= 1mH, R_G= 50Ω, I_AS= 40A, V_GS=10V.

I_SD≤ 100A, di/dt ≤ 1166A/μs, V_DD≤ V_(BR)DSS, T_J≤ 175°C.

2

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January 6, 2015

IRFS7437PbF/IRFSL7437PbF

Dynamic @ T_J= 25°C (unless otherwise specified)

Symbol

gfs

Parameter

Forward Transconductance

Min. Typ. Max. Units

Conditions

V_DS= 10V, I_D= 100A

nC I_D= 100A

_DS=20V

V_GS= 10V

I_D= 100A, V_DS=20V, V_GS= 10V

ns V_DD= 20V

160 ––– –––

S

Q_g

Total Gate Charge

––– 150 225

Q_gs

Q_gd

Q_sync

t_d(on)

t_r

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Total Gate Charge Sync. (Q_g- Q_gd)

Turn-On Delay Time

Rise Time

–––

41

51

99

19

70

78

53

–––

V

I_D= 30A

R_G= 2.7Ω

V_GS= 10V

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

C_iss

C_oss

C_rss

Input Capacitance

––– 7330 –––

––– 1095 –––

––– 745 –––

––– 1310 –––

––– 1735 –––

pF V_GS= 0V

Output Capacitance

Reverse Transfer Capacitance

V

_DS= 25V

ƒ = 1.0 MHz, See Fig. 5

C

_osseff. (ER) Effective Output Capacitance (Energy Related)

V

_GS= 0V, V_DS= 0V to 32V , See Fig. 11

_GS= 0V, V_DS= 0V to 32V

C_osseff. (TR) Effective Output Capacitance (Time Related)

Diode Characteristics

Symbol

Parameter

Min. Typ. Max. Units

Conditions

D

S

I_S

Continuous Source Current

––– ––– 250

A

V

MOSFET symbol

(Body Diode)

Pulsed Source Current

showing the

integral reverse

G

I_SM

––– ––– 1000

(Body Diode)

Diode Forward Voltage

Reverse Recovery Time

p-n junction diode.

T_J= 25°C, I_S= 100A, V_GS= 0V

V_SD

t_rr

–––

1.0

30

24

25

1.3

–––

ns T_J= 25°C

T_J= 125°C

V_R= 34V,

I_F= 100A

di/dt = 100A/μs

Q_rr

Reverse Recovery Charge

nC T_J= 25°C

T_J= 125°C

I_RRM

t_on

Reverse Recovery Current

Forward Turn-On Time

A

T_J= 25°C

Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)

3

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IRFS7437PbF/IRFSL7437PbF

1000

100

10

1000

VGS

15V

VGS

15V

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

TOP

10V

8.0V

7.0V

6.0V

5.5V

5.0V

4.5V

BOTTOM

100

4.5V

≤60μs PULSE WIDTH

60μs PULSE WIDTH

≤

Tj = 25°C

Tj = 175°C

10

, Drain-to-Source Voltage (V)

1

10

0.1

1

10

100

0.1

1

100

V

, Drain-to-Source Voltage (V)

DS

V

DS

Fig 3. Typical Output Characteristics

Fig 4. Typical Output Characteristics

2.0

1.8

1.6

1.4

1.2

1.0

0.8

0.6

1000

100

10

I

= 100A

= 10V

D

V

GS

T

= 175°C

J

T

= 25°C

J

V

= 10V

DS

≤60μs PULSE WIDTH

1.0

-60 -40 -20 0 20 40 60 80 100120140160180

, Junction Temperature (°C)

3

4

5

6

7

8

T

J

V

, Gate-to-Source Voltage (V)

GS

Fig 6. Normalized On-Resistance vs. Temperature

Fig 5. Typical Transfer Characteristics

14

100000

10000

1000

V

C

= 0V,

f = 1 MHZ

GS

I

= 100A

V

= 32V

= 20V

D

= C + C , C SHORTED

DS

iss

gs

gd ds

12

10

8

C

= C

rss

gd

C

= C + C

oss

ds

gd

C

iss

6

C

oss

C

rss

4

2

0

100

0

40

Q

80

120

160

200

1

10

, Drain-to-Source Voltage (V)

100

Total Gate Charge (nC)

G

V

DS

Fig 7. Typical Capacitance vs. Drain-to-Source Voltage

Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage

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4

January 6, 2015

IRFS7437PbF/IRFSL7437PbF

1000

100

10

1000

100μsec

T

= 175°C

J

100

10

1

1msec

Limited by Package

T

= 25°C

J

10msec

OPERATION IN THIS AREA

LIMITED BY R (on)

DS

DC

1

Tc = 25°C

Tj = 175°C

Single Pulse

V

= 0V

GS

0.1

1

10

0.0

0.5

1.0

1.5

2.0

2.5

V

, Drain-toSource Voltage (V)

DS

V

, Source-to-Drain Voltage (V)

SD

Fig 10. Maximum Safe Operating Area

Fig 9. Typical Source-Drain Diode

Forward Voltage

1.2

50

48

46

44

42

40

Id = 1.0mA

1.0

0.8

0.6

0.4

0.2

0.0

0

10

20

30

40

50

-60 -40 -20 0 20 40 60 80 100120140160180

, Temperature ( °C )

V

Drain-to-Source Voltage (V)

DS,

T

J

Fig 11. Drain-to-Source Breakdown Voltage

Fig 12. Typical C_OSSStored Energy

8

7

6

V

= 5.5V

= 6.0V

GS

V

GS

5

V

= 7.0V

GS

VGS = 8.0V

VGS = 10V

4

3

2

1

0

100

200

300

400

500

I

, Drain Current (A)

D

Fig 13. Typical On-Resistance vs. Drain Current

5

January 6, 2015

IRFS7437PbF/IRFSL7437PbF

1

0.1

D = 0.50

0.20

0.10

0.05

0.02

0.01

0.001

SINGLE PULSE

( THERMAL RESPONSE )

Notes:

1. Duty Factor D = t1/t2

2. Peak Tj = P dm x Zthjc + Tc

0.0001

1E-006

1E-005

0.0001

0.001

0.01

0.1

t

, Rectangular Pulse Duration (sec)

1

Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case

1000

100

10

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming Tj = 150°C and

Δ

Tstart =25°C (Single Pulse)

Allowed avalanche Current vs avalanche

pulsewidth, tav, assuming j = 25°C and

ΔΤ

Tstart = 150°C. (Single Pulse)

1

1.0E-06

1.0E-05

1.0E-04

1.0E-03

1.0E-02

1.0E-01

tav (sec)

Fig 15. Typical Avalanche Current vs.Pulsewidth

Notes on Repetitive Avalanche Curves , Figures 14, 15:

(For further info, see AN-1005 at www.irf.com)

1. Avalanche failures assumption:

Purely a thermal phenomenon and failure occurs at a temperature far in

excess of T_jmax. This is validated for every part type.

2. Safe operation in Avalanche is allowed as long asT_jmaxis not exceeded.

3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.

4. P_{D (ave)}= Average power dissipation per single avalanche pulse.

5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase

during avalanche).

6. I_av= Allowable avalanche current.

7. ΔT = Allowable rise in junction temperature, not to exceed T_jmax(assumed as

25°C in Figure 14, 15).

t_{av =}Average time in avalanche.

D = Duty cycle in avalanche = t_av·f

350

300

250

200

150

100

50

TOP

BOTTOM 1% Duty Cycle

= 100A

Single Pulse

I

D

Z_thJC(D, t_av) = Transient thermal resistance, see Figures 13)

0

P_{D (ave)}= 1/2 ( 1.3·BV·I_av) = DT/ Z_thJC

I_av= 2DT/ [1.3·BV·Z_th]

25

50

75

100

125

150

175

E_{AS (AR)}= P_{D (ave)}·t_av

Starting T , Junction Temperature (°C)

J

Fig 16. Maximum Avalanche Energy vs. Temperature

6

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IRFS7437PbF/IRFSL7437PbF

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

10

I

= 60A

= 34V

F

V

R

8

6

4

2

0

T = 25°C

J

T = 125°C

J

I

= 150μA

= 1.0mA

= 1.0A

D

-75 -50 -25

0

25 50 75 100 125 150 175

0

200

400

600

800

1000

T , Temperature ( °C )

di /dt (A/μs)

J

F

Fig. 18 - Typical Recovery Current vs. di_f/dt

Fig 17. Threshold Voltage vs. Temperature

140

120

100

80

10

I

= 60A

= 34V

I

= 100A

= 34V

F

V

R

8

T = 25°C

J

T = 125°C

J

T = 125°C

J

6

60

4

40

2

20

0

200

400

600

800

1000

0

200

400

600

800

1000

di /dt (A/μs)

F

Fig. 19 - Typical Recovery Current vs. di_f/dt

Fig. 20 - Typical Stored Charge vs. di_f/dt

140

I

= 100A

F

120

100

80

60

40

20

0

V

= 34V

R

T = 25°C

J

T = 125°C

J

0

200

400

600

800

1000

di /dt (A/μs)

F

Fig. 21 - Typical Stored Charge vs. di_f/dt

7

January 6, 2015

IRFS7437PbF/IRFSL7437PbF

Driver Gate Drive

P.W.

D.U.T

Period

D =

Period

P.W.

+

-

*

=10V

V

GS

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

D.U.T. I Waveform

SD

+

-

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

-

+

D.U.T. V Waveform

DS

Diode Recovery

dv/dt

V

DD

V_DD

Re-Applied

Voltage

• dv/dt controlled by R_G

R_G

+

-

Body Diode

Forward Drop

• Driver same type as D.U.T.

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

Inductor Current

Inductor Curent

I

SD

Ripple

≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel

HEXFET^®Power MOSFETs

V

(BR)DSS

15V

t

p

DRIVER

+

L

V

DS

D.U.T

AS

R

G

V

DD

-

I

A

2V0_GV_S

Ω

0.01

t

p

I

AS

Fig 23b. Unclamped Inductive Waveforms

Fig 23a. Unclamped Inductive Test Circuit

R_D

V_DS

V

DS

90%

V_GS

D.U.T.

R_G

+

V_DD

-

10V

V_GS

10%

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

V

GS

t

r

t

f

d(on)

d(off)

Fig 24a. Switching Time Test Circuit

Fig 24b. Switching Time Waveforms

Id

Current Regulator

Same Type as D.U.T.

Vds

Vgs

50KΩ

.2μF

12V

.3μF

+

V

DS

D.U.T.

-

Vgs(th)

V

GS

3mA

I

D

G

Qgs1

Qgs2

Qgd

Qgodr

Current Sampling Resistors

Fig 25a. Gate Charge Test Circuit

Fig 25b. Gate Charge Waveform

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8

January 6, 2015

IRFS7437PbF/IRFSL7437PbF

D²Pak (TO-263AB) Package Outline

Dimensions are shown in millimeters (inches)

D²Pak (TO-263AB) Part Marking Information

INTERNATIONAL

RECTIFIER LOGO

INTERNATIONAL

RECTIFIER LOGO

PART NUMBER

IRFS7437

OR

PYWW?

YWWP

ASSEMBLY

LOT CODE

ASSEMBLY

LOT CODE

DATE CODE

P = LEAD-FREE

LC

Y = LAST DIGIT OF YEAR

WW = WORK WEEK

P = LEAD-FREE

Y = LAST DIGIT OF YEAR

WW = WORK WEEK

? = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

9

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IRFS7437PbF/IRFSL7437PbF

TO-262 Package Outline

Dimensions are shown in millimeters (inches)

TO-262 Part Marking Information

PART NUMBER

INTERNATIONAL

RECTIFIER LOGO

INTERNATIONAL

RECTIFIER LOGO

IRFSL7437

OR

PYWW?

YWWP

ASSEMBLY

LOT CODE

ASSEMBLY

LOT CODE

DATE CODE

P = LEAD-FREE

Y = LAST DIGIT OF YEAR

WW = WORK WEEK

Y = LAST DIGIT OF YEAR

WW = WORK WEEK

P = LEAD-FREE

LC LC

? = ASSEMBLY SITE CODE

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

10

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January 6, 2015

IRFS7437PbF/IRFSL7437PbF

D²PakTape & Reel Information

TRR

1.60 (.063)

1.50 (.059)

1.60 (.063)

1.50 (.059)

4.10 (.161)

3.90 (.153)

0.368 (.0145)

0.342 (.0135)

FEED DIRECTION

1.85 (.073)

11.60 (.457)

11.40 (.449)

1.65 (.065)

24.30 (.957)

23.90 (.941)

15.42 (.609)

15.22 (.601)

TRL

1.75 (.069)

1.25 (.049)

10.90 (.429)

10.70 (.421)

4.72 (.136)

4.52 (.178)

16.10 (.634)

15.90 (.626)

FEED DIRECTION

13.50 (.532)

12.80 (.504)

27.40 (1.079)

23.90 (.941)

4

330.00

(14.173)

MAX.

60.00 (2.362)

MIN.

30.40 (1.197)

MAX.

NOTES :

1. COMFORMS TO EIA-418.

2. CONTROLLING DIMENSION: MILLIMETER.

3. DIMENSION MEASURED @ HUB.

26.40 (1.039)

24.40 (.961)

4

3

4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.

Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/

11

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IRFS7437PbF/IRFSL7437PbF

Qualification information^†

Industrial^††

(per JEDEC JESD47F^†††guidelines)

Qualification level

D2Pak

MSL1

(per JEDEC J-STD-020D^†††

Moisture Sensitivity Level

RoHS compliant

)

TO-262

Yes

Qualification standards can be found at International Rectifiers web site: http://www.irf.com/product-info/reliability/

Higher qualification ratings may be available should the user have such requirements. Please contact your

International Rectifier sales representative for further information: http:www.irf.com/whoto-call/salesrep/

Applicable version of JEDEC standard at the time of product release.

Revision History

Date

Comment

•

Updated data sheet based on corporate template.

4/30/2014

Updated typo on the fig.19 and fig.21, unit of y-axis from "A" to "nC" on page7.

Updated package outline and part marking on page 9 & 10.

Updated E_{AS (L =1mH)}= 802mJ on page 2

1/6/2015

•

Ω

Updated note 9 “Limited by T_Jmax, starting T = 25°C, L = 1mH, R_G= 50 , I_AS= 40A, V_GS=10V”. on page 2

J

IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA

TocontactInternationalRectifier, pleasevisithttp://www.irf.com/whoto-call/

12

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IMPORTANT NOTICE

The information given in this document shall in no For further information on the product, technology,

event be regarded as a guarantee of conditions or delivery terms and conditions and prices please

characteristics (“Beschaffenheitsgarantie”) .

contact your nearest Infineon Technologies office

(www.infineon.com).

With respect to any examples, hints or any typical

values stated herein and/or any information

regarding the application of the product, Infineon

Technologies hereby disclaims any and all

warranties and liabilities of any kind, including

without limitation warranties of non-infringement

of intellectual property rights of any third party.

WARNINGS

Due to technical requirements products may

contain dangerous substances. For information on

the types in question please contact your nearest

Infineon Technologies office.

In addition, any information given in this document

is subject to customer’s compliance with its

obligations stated in this document and any

applicable legal requirements, norms and

standards concerning customer’s products and any

use of the product of Infineon Technologies in

customer’s applications.

Except as otherwise explicitly approved by Infineon

Technologies in a written document signed by

authorized

representatives

of

Infineon

Technologies, Infineon Technologies’ products may

not be used in any applications where a failure of

the product or any consequences of the use thereof

can reasonably be expected to result in personal

injury.

The data contained in this document is exclusively

intended for technically trained staff. It is the

responsibility of customer’s technical departments

to evaluate the suitability of the product for the

intended application and the completeness of the

product information given in this document with

respect to such application.


型号：	IRFS7437
厂家：	Infineon
描述：	The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters.
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中文：	中文翻译
下载：	下载PDF数据表文档文件

IRFS7437 [INFINEON]

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IRFS7440

IRFS7440PBF

IRFS7440TRLPBF

IRFS750

IRFS750A

IRFS7530

IRFS7530

IRFS7530-7P