IRFU3411PBF [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRFU3411PBF |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总10页 (文件大小：227K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 95371A
IRFR3411PbF
l Advanced Process Technology
l Ultra Low On-Resistance
l Dynamic dv/dt Rating
l 175°C Operating Temperature
l Fast Switching
IRFU3411PbF
HEXFET® Power MOSFET
D
VDSS = 100V
l Fully Avalanche Rated
l Lead-Free
RDS(on) = 44mΩ
G
Description
AdvancedHEXFET® PowerMOSFETsfromInternational
Rectifier utilize advanced processing techniques to
achieve extremely low on-resistance per silicon area.
This benefit, combined with the fast switching speed and
ruggedizeddevicedesignthatHEXFETpowerMOSFETs
are well known for, provides the designer with an
extremely efficient and reliable device for use in a wide
variety of applications.
ID = 32A
S
The D-Pak is designed for surface mounting using vapor
phase, infrared, or wave soldering techniques. The
straight lead, I-Pak, version (IRFU series) is for through-
hole mounting applications. Power dissipation levels up
to 1.5 watts are possible in typical surface mount
applications.
D-Pak
IRFR3411
I-Pak
IRFU3411
Absolute Maximum Ratings
Parameter
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
32
23
A
110
PD @TC = 25°C
Power Dissipation
130
W
W/°C
V
Linear Derating Factor
0.83
± 20
16
VGS
IAR
Gate-to-Source Voltage
Avalanche Current
A
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt
Operating Junction and
13
mJ
V/ns
7.0
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Typ.
–––
–––
–––
Max.
1.2
50
Units
RθJC
RθJA
RθJA
Junction-to-Ambient (PCB mount)*
Junction-to-Ambient
°C/W
110
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1
12/03/04
IRFR/U3411PbF
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
100 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.12 ––– V/°C Reference to 25°C, ID = 1mA
RDS(on)
VGS(th)
gfs
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
–––
2.0
21
36
44
mΩ VGS = 10V, ID = 16A
––– 4.0
––– –––
V
VDS = VGS, ID = 250µA
VDS = 50V, ID = 16A
VDS = 100V, VGS = 0V
Forward Transconductance
S
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
IDSS
Drain-to-Source Leakage Current
µA
nA
VDS = 80V, VGS = 0V, TJ = 150°C
VGS = 20V
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
IGSS
VGS = -20V
Qg
–––
–––
–––
–––
–––
–––
–––
48
9.0
14
71
14
21
ID = 16A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
Rise Time
nC VDS = 80V
VGS = 10V, See Fig. 6 and 13
11 –––
35 –––
39 –––
35 –––
VDD = 50V
ID = 16A
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
RG = 5.1Ω
VGS = 10V, See Fig. 10
Between lead,
6mm (0.25in.)
from package
and center of die contact
VGS = 0V
D
4.5
LD
LS
Internal Drain Inductance
Internal Source Inductance
–––
–––
–––
–––
nH
G
7.5
S
Ciss
Coss
Crss
EAS
Input Capacitance
––– 1960 –––
––– 250 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
Single Pulse Avalanche Energy
–––
40 –––
pF
ƒ = 1.0MHz, See Fig. 5
––– 700ꢀ185 mJ IAS = 16A, L = 1.5mH
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
33
––– –––
––– –––
showing the
A
G
ISM
Pulsed Source Current
integral reverse
p-n junction diode.
110
S
(Body Diode)
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
––– ––– 1.2
––– 115 170
––– 505 760
V
TJ = 25°C, IS = 16A, VGS = 0V
TJ = 25°C, IF = 16A
ns
Qrr
ton
nC di/dt = 100A/µs
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ꢀ This is a typical value at device destruction and represents
operation outside rated limits.
This is a calculated value limited to TJ = 175°C .
Repetitive rating; pulse width limited by
max. junction temperature. (See fig. 11)
Starting TJ = 25°C, L =1.5mH
RG = 25Ω, IAS = 16A. (See Figure 12)
ISD ≤ 16A, di/dt ≤ 340A/µs, VDD ≤ V(BR)DSS
TJ ≤ 175°C.
* When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint dering techniques refer to application note
#AN-994.
,
Pulse width ≤ 400µs; duty cycle ≤ 2%.
2
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IRFR/U3411PbF
1000
100
10
1000
100
10
VGS
15V
VGS
15V
TOP
TOP
10V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
8.0V
7.0V
6.0V
5.5V
5.0V
BOTTOM 4.5V
BOTTOM 4.5V
4.5V
4.5V
20µs PULSE WIDTH
20µs PULSE WIDTH
°
T = 175 C
J
°
T = 25 C
J
1
0.1
1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
3.5
33A
=
I
D
3.0
2.5
2.0
1.5
1.0
0.5
0.0
°
T = 25 C
J
100
°
T = 175 C
J
V
= 50V
DS
20µs PULSE WIDTH
V
= 10V
GS
10
4.0
-60 -40 -20
0
20 40 60 80 100 120 140 160 180
°
5.0
6.0
7.0 8.0
9.0
T , Junction Temperature ( C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs. Temperature
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3
IRFR/U3411PbF
3000
20
16
12
8
V
= 0V,
f = 1MHz
C SHORTED
ds
I
D
= 16A
GS
C
= C + C
iss
gs
gd ,
V
V
V
= 80V
= 50V
= 20V
DS
DS
DS
C
= C
rss
gd
2500
2000
1500
1000
500
C
= C + C
gd
oss
ds
C
iss
C
C
oss
4
FOR TEST CIRCUIT
SEE FIGURE 13
rss
0
0
0
20
40
60
80
1
10
100
Q
, Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
1000
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
100
10
1
100
10
1
°
T = 175 C
J
100µsec
1msec
°
T = 25 C
J
T
= 25°C
10msec
A
T = 175°C
J
V
= 0 V
GS
Single Pulse
0.1
0.2
0.1
0.6
1.0
1.4
1.8
1
10
100
1000
V
,Source-to-Drain Voltage (V)
SD
V
, Drain-toSource Voltage (V)
DS
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
4
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IRFR/U3411PbF
35
30
25
20
15
10
5
RD
VDS
VGS
D.U.T.
RG
+VDD
-
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
25
50
75
100
125
150
C)
175
°
(
T
, Case Temperature
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
10
1
D = 0.50
0.20
0.10
P
DM
0.1
0.05
t
1
SINGLE PULSE
0.02
(THERMAL RESPONSE)
0.01
t
2
Notes:
1. Duty factor D =
t / t
1
2
2. Peak T
= P
x Z
+ T
J
DM
thJC
C
0.01
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
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5
IRFR/U3411PbF
400
300
200
100
0
I
15V
D
TOP
6.5A
11.3A
BOTTOM 16A
DRIVER
+
L
V
DS
D.U.T
R
G
V
DD
-
I
A
AS
20V
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
V
(BR)DSS
t
p
25
50
75
100
125
150
175
°
Starting T , Junction Temperature ( C)
J
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
.2µF
12V
.3µF
Q
G
+
VGS
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Current Sampling Resistors
Charge
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
6
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IRFR/U3411PbF
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T*
-
+
-
-
+
RG
• dv/dt controlled by RG
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
+
-
VDD
VGS
* Reverse Polarity of D.U.T for P-Channel
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
[
=10V
] ***
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
]
[
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
[
]
SD
Ripple ≤ 5%
*** VGS = 5.0V for Logic Level and 3V Drive Devices
Fig 14. For N-channel HEXFET® power MOSFETs
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7
IRFR/U3411PbF
D-Pak (TO-252AA) Package Outline
D-Pak (TO-252AA) Part Marking Information
EXAMPLE: THIS IS AN IRFR120
PART NUMBER
WITH ASSEMBLY
LOT CODE 1234
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 9 = 1999
WE E K 16
IRFU120
916A
ASSEMBLED ON WW 16, 1999
IN THE ASSEMBLY LINE "A"
12
34
LINE A
Note: "P" in ass embly line pos ition
ASSEMBLY
LOT CODE
indicates "L ead-F r ee"
OR
PART NUMBER
DATE CODE
P = DESIGNATES LEAD-FREE
PRODUCT (OPTIONAL)
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
12 34
YEAR 9 = 1999
ASSEMBLY
LOT CODE
WEEK 16
A= ASSEMBLYSITE CODE
8
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IRFR/U3411PbF
I-Pak (TO-251AA) Package Outline ( Dimensions are shown in millimeters (inches) )
I-Pak (TO-251AA) Part Marking Information
PART NUMBER
EXAMPLE: THIS IS AN IRFU120
WIT H AS S E MBL Y
INTERNATIONAL
RECTIFIER
LOGO
DAT E CODE
YEAR 9 = 1999
WE EK 19
IRFU120
919A
78
LOT CODE 5678
AS S EMBLED ON WW 19, 1999
56
IN THE ASSEMBLY LINE "A"
LINE A
ASSEMBLY
LOT CODE
Note: "P" in ass embly line
pos ition i ndi cates "Lead-F r ee"
OR
PART NUMBER
DATE CODE
INTERNATIONAL
RECTIFIER
LOGO
IRFU120
P = DE S IGNAT E S L E AD-F R E E
PRODUCT (OPTIONAL)
56
78
YEAR 9 = 1999
ASSEMBLY
LOT CODE
WE E K 19
A = ASSEMBLYSITE CODE
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9
IRFR/U3411PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Automotive [Q101] market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.12/04
10
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