IRHLNA77064 [INFINEON]
RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-2); 抗辐射的逻辑电平功率MOSFET表面贴装（ SMD - 2 ）
| 型号： | IRHLNA77064 |
| 厂家： | 
Infineon |
| 描述： | RADIATION HARDENED LOGIC LEVEL POWER MOSFET SURFACE MOUNT (SMD-2) |
| 文件： | 总9页 (文件大小：200K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD-97177A
RADIATION HARDENED
IRHLNA77064
LOGIC LEVEL POWER MOSFET
SURFACE MOUNT (SMD-2)
60V, N-CHANNEL
TECHNOLOGY
Product Summary
Part Number
IRHLNA77064
IRHLNA73064
Radiation Level RDS(on)
ID
56A*
56A*
100K Rads (Si)
300K Rads (Si)
0.012Ω
0.012Ω
SMD-2
Features:
International Rectifier’s R7TM Logic Level Power
MOSFETs provide simple solution to interfacing CMOS
and TTL control circuits to power devices in space and
other radiation environments. The threshold voltage
remains within acceptable operating limits over the
full operating temperature and post radiation. This is
achieved while maintaining single event gate rupture
and single event burnout immunity.
n
n
n
n
n
n
n
n
n
n
5V CMOS and TTL Compatible
Fast Switching
Single Event Effect (SEE) Hardened
Low Total Gate Charge
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Ceramic Package
Surface Mount
These devices are used in applications such as current
boost low signal source in PWM, voltage comparator
and operational amplifiers.
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
Units
I
@V
@V
= 4.5V,T = 25°C
Continuous Drain Current
56*
56*
D
D
GS
GS
C
A
I
= 4.5V,T = 100°C Continuous Drain Current
C
I
Pulsed Drain Current À
Max. Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Single Pulse Avalanche Energy Á
Avalanche Current À
224
DM
@ T = 25°C
P
D
250
W
W/°C
V
C
2.0
V
±10
GS
E
402
mJ
A
AS
I
56
AR
E
Repetitive Avalanche Energy À
Peak Diode Recovery dv/dt Â
Operating Junction
25
mJ
V/ns
AR
dv/dt
6.9
T
-55 to 150
J
°
T
Storage Temperature Range
Pckg. Mounting Surface Temp.
Weight
C
STG
300 (for 5s)
3.3 (Typical)
g
* Current is limited by package
For footnotes refer to the last page
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1
04/06/07
IRHLNA77064
Pre-Irradiation
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min Typ Max Units
Test Conditions
BV
Drain-to-Source Breakdown Voltage
60
—
—
V
V
= 0V, I = 250µA
D
DSS
GS
Reference to 25°C, I = 1.0mA
∆BV
/∆T Temperature Coefficient of Breakdown
—
0.07
—
V/°C
DSS
J
D
Voltage
R
V
Static Drain-to-Source On-State
Resistance
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
Forward Transconductance
Zero Gate Voltage Drain Current
—
—
0.012
Ω
V
= 4.5V, I = 56A
GS D
Ã
DS(on)
1.0
—
32
—
—
-6.6
—
—
—
2.0
—
—
1.0
10
V
mV/°C
S
V
= V , I = 250µA
GS(th)
DS
GS
D
∆V
g
/∆T
J
GS(th)
fs
V
= 10V, I
= 56A Ã
DS
DS
I
V
= 48V ,V =0V
DSS
DS GS
µA
nA
nC
—
V
= 48V,
DS
= 0V, T = 125°C
V
GS
J
I
I
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
100
-100
151
30
70
51
170
110
17
V
= 10V
GSS
GSS
GS
V
GS
= -10V
Q
Q
Q
V
= 4.5V, I = 56A
g
gs
gd
d(on)
r
GS D
V
= 30V
DS
t
t
t
t
V
= 30V, I = 56A,
D
DD
V = 4.5V, R = 2.35Ω
GS
G
ns
d(off)
f
L
S
+ L
—
Measured from the center of
drain pad to center of source pad
= 0V, V = 25V
D
nH
Ciss
C
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
10220
2343
40
—
—
—
V
GS
DS
f = 100KHz
pF
oss
rss
f = 1.0MHz, open drain
Ω
R
Gate Resistance
0.56
g
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
Test Conditions
I
I
V
t
Q
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
—
—
—
—
56*
224
1.2
214
1.16 µC
S
SM
SD
rr
A
V
ns
T = 25°C, I = 56A, V
= 0V Ã
j
S
GS
T = 25°C, I =56A, di/dt ≤ 100A/µs
j
F
V
DD
≤ 30V Ã
RR
t
on
Forward Turn-On Time
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L + L .
S D
* Current is limited by package
Thermal Resistance
Parameter
Min Typ Max Units
Test Conditions
R
R
Junction-to-Case
Junction-to-PC board
—
—
—
1.6
0.5
—
thJC
thJ-PCB
°C/W
soldered to a 2 square copper-cladboard
Note: Corresponding Spice and Saber models are available on International Rectifier Web site.
For footnotes refer to the last page
2
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Radiation Characteristics
IRHLNA77064
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation ÄÅ
Parameter
Upto 300K Rads (Si)1 Units
Test Conditions
Min
Max
BV
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
Static Drain-to-Source
60
1.0
—
—
—
—
2.0
100
-100
10
V
= 0V, I = 250µA
DSS
GS D
V
V
V
= V , I = 250µA
GS(th)
GS
DS
D
I
I
I
V
GS
= 10V
GSS
GSS
DSS
nA
µA
V
GS
= -10V
V
= 48V, V =0V
GS
DS
R
DS(on)
On-State Resistance (TO-3)
—
0.01
Ω
V
GS
= 4.5V, I = 56A
D
R
DS(on)
Static Drain-to-Source On-state
Resistance (SMD-2)
—
—
0.012
1.2
Ω
V
V
= 4.5V, I = 56A
D
GS
V
Diode Forward Voltage
V
= 0V, I = 56A
D
GS
SD
1. Part numbers IRHLNA77064, IRHLNA73064
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
Ion
LET
Energy Range
VDS (V)
(MeV/(mg/cm2)) (MeV)
(µm)
@VGS= @VGS= @VGS= @VGS= @VGS= @VGS= @VGS= @VGS= @VGS=
0V
-3V
-4V
-5V
-6V
-7V
-8V
-9V
-10V
Br
I
37
60
84
305
370
390
39
34
30
60
60
60
60
60
60
50
60
60
45
60
50
40
30
25
30
20
-
25
10
20
10
-
15
-
Au
-
80
60
40
20
0
Br
I
Au
0
-1 -2 -3 -4 -5 -6 -7 -8 -9 -10
VGS
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHLNA77064
Pre-Irradiation
1000
1000
100
10
VGS
VGS
TOP
10V
5.5V
5.0V
4.5V
4.0V
3.5V
3.0V
TOP
10V
5.5V
5.0V
4.5V
4.0V
3.5V
3.0V
100
10
BOTTOM 2.5V
BOTTOM 2.5V
2.5V
2.5V
60µs PULSE WIDTH
Tj = 150°C
µ
60 s PULSE WIDTH
Tj = 25°C
1
1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000
100
10
2.0
1.6
1.2
0.8
0.4
0.0
I
= 56A
D
T
= 150°C
J
T
= 25°C
J
V
= 25V
DS
V
= 4.5V
GS
60µs PULSE WIDTH
2.5
3
3.5
4
4.5
5
-60 -40 -20
0
20 40 60 80 100 120 140 160
V
, Gate-to-Source Voltage (V)
GS
T
J
, Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs.Temperature
4
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Pre-Irradiation
IRHLNA77064
30
25
20
15
10
5
13
12
11
10
9
I
= 56A
D
T
= 150°C
J
T
= 150°C
= 25°C
J
T
= 25°C
J
8
7
T
J
Vgs = 4.5V
0
6
2
3
4
5
6
7
8
9
10 11 12
0
20
40
60
80
100
I
, Drain Current (A)
D
V
Gate -to -Source Voltage (V)
GS,
Fig 5. Typical On-Resistance Vs
Fig 6. Typical On-Resistance Vs
GateVoltage
DrainCurrent
85
75
65
2.5
I
= 1.0mA
D
2.0
1.5
1.0
0.5
0.0
I
= 50µA
D
D
D
D
I
I
I
= 250µA
= 1.0mA
= 150mA
-60 -40 -20
0
20 40 60 80 100 120 140 160
-60 -40 -20
0
20 40 60 80 100 120 140 160
, Temperature ( °C )
T , Temperature ( °C )
T
J
J
Fig 7. Typical Drain-to-Source
BreakdownVoltageVsTemperature
Fig 8. Typical Threshold Voltage Vs
Temperature
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5
IRHLNA77064
Pre-Irradiation
20000
V
12
10
8
= 0V,
= C
f = 100 KHz
GS
I
= 56A
V
= 48V
D
DS
C
+ C , C
SHORTED
18000
16000
14000
12000
10000
8000
6000
4000
2000
0
iss
gs
gd
ds
V
= 30V
= 12V
DS
DS
C
C
= C
rss
oss
gd
V
= C + C
ds
gd
C
iss
6
C
oss
4
2
C
FOR TEST CIRCUIT
SEE FIGURE 16
rss
0
1
10
100
0
30 60 90 120 150 180 210 240 270 300
Total Gate Charge (nC)
Q
V
, Drain-to-Source Voltage (V)
DS
G,
Fig 10. Typical Gate Charge Vs.
Fig 9. Typical Capacitance Vs.
Gate-to-SourceVoltage
Drain-to-SourceVoltage
120
100
80
60
40
20
0
1000
100
10
LIMITED BY PACKAGE
T
= 150°C
J
= 25°C
T
J
1
V
= 0V
GS
0.1
25
50
75
100
125
150
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6
, Source-to-Drain Voltage (V)
T , Case Temperature (°C)
V
SD
C
Fig 12. Maximum Drain Current Vs.
Fig 11. Typical Source-to-Drain Diode
CaseTemperature
ForwardVoltage
6
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Pre-Irradiation
IRHLNA77064
1
D = 0.50
P
DM
0.20
0.10
0.1
t
1
t
2
0.05
0.02
SINGLE PULSE
( THERMAL RESPONSE )
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.01
1E-005
0.0001
0.001
0.01
0.1
1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
800
1000
OPERATION IN THIS AREA
I
D
LIMITED BY R
(on)
700
600
500
400
300
200
100
0
DS
TOP
25A
35.4A
56A
BOTTOM
100µs
100
10
1
1ms
10ms
Tc = 25°C
Tj = 150°C
Single Pulse
25
50
75
100
125
150
1
10
, Drain-to-Source Voltage (V)
100
Starting T , Junction Temperature (°C)
V
J
DS
Fig 15a. Maximum Avalanche Energy
Fig 14. Maximum Safe Operating Area
Vs. DrainCurrent
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7
IRHLNA77064
Pre-Irradiation
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
.
D.U.T
R
G
V
DD
-
I
A
AS
V
20V
GS
I
AS
0.01
Ω
t
p
Fig 15b. Unclamped Inductive Test Circuit
Fig 15c. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
Q
G
4.5V
.2µF
12V
.3µF
+
Q
Q
GD
GS
V
DS
D.U.T.
-
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 16a. Basic Gate Charge Waveform
Fig 16b. Gate Charge Test Circuit
RD
V
VDS
DS
90%
VGS
VDD
D.U.T.
RG
+
-
10%
VGS
V
GS
PulseWidth ≤ 1µs
Duty Factor≤ 0.1 %
t
t
r
t
t
f
d(on)
d(off)
Fig 17b. Switching Time Waveforms
Fig 17a. Switching Time Test Circuit
8
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Pre-Irradiation
Footnotes:
IRHLNA77064
à Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Total Dose Irradiation with V Bias.
À
Repetitive Rating; Pulse width limited by
maximum junction temperature.
Ä
GS
= 0 during
10 volt V
applied and V
Á
V
= 25V, starting T = 25°C, L= 0.26mH
J
GS
irradiation per MIL-STD-750, method 1019, condition A.
DS
DD
Peak I = 56A, V
= 10V
L
GS
Å Total Dose Irradiation with V
Bias.
Â
I
V
≤ 56A, di/dt ≤ 350A/µs,
DS
= 0 during
SD
DD
48 volt V
applied and V
≤ 60V, T ≤ 150°C
DS
irradiation per MlL-STD-750, method 1019, condition A.
GS
J
Case Outline and Dimensions — SMD-2
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TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information.
Data and specifications subject to change without notice. 04/2007
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9
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