IRHNA57260SESCS [INFINEON]
Power Field-Effect Transistor, 55A I(D), 200V, 0.04ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD2, 3 PIN;
| 型号： | IRHNA57260SESCS |
| 厂家： | 
Infineon |
| 描述： | Power Field-Effect Transistor, 55A I(D), 200V, 0.04ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD2, 3 PIN |
| 文件： | 总8页 (文件大小：109K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 91838C
RADIATION HARDENED
POWER MOSFET
SURFACE MOUNT (SMD-2)
IRHNA57260
200V, N-CHANNEL
TECHNOLOGY
R
5
Product Summary
Part Number Radiation Level RDS(on)
IRHNA57260 100K Rads (Si) 0.038Ω
IRHNA53260 300K Rads (Si) 0.038Ω
IRHNA54260 600K Rads (Si) 0.038Ω
ID
55A
55A
55A
IRHNA58260 1000K Rads (Si) 0.043Ω 55A
SMD-2
International Rectifier’s R5TM technology provides
high performance power MOSFETs for space appli-
cations. These devices have been characterized for
Single Event Effects (SEE) with useful performance
up to an LET of 80 (MeV/(mg/cm2)). The combination
of low RDS(on) and low gate charge reduces the power
losses in switching applications such as DC to DC
converters and motor control. These devices retain
all of the well established advantages of MOSFETs
such as voltage control, fast switching, ease of paral-
leling and temperature stability of electrical param-
eters.
Features:
n
n
n
n
n
n
n
n
n
n
Single Event Effect (SEE) Hardened
Ultra Low RDS(on)
Low Total Gate Charge
Proton Tolerant
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Surface Mount
Ceramic Package
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
Units
I
@ V
@ V
= 12V, T = 25°C
Continuous Drain Current
55
D
GS
C
A
I
= 12V, T = 100°C Continuous Drain Current
35
220
D
GS
C
I
Pulsed Drain Current ➀
Max. Power Dissipation
DM
@ T = 25°C
P
300
W
W/°C
V
D
C
Linear Derating Factor
2.4
V
Gate-to-Source Voltage
Single Pulse Avalanche Energy ➁
Avalanche Current ➀
±20
GS
E
380
mJ
A
AS
I
55
AR
E
Repetitive Avalanche Energy ➀
Peak Diode Recovery dv/dt ➂
Operating Junction
30
mJ
V/ns
AR
dv/dt
9.2
T
-55 to 150
J
T
Storage Temperature Range
oC
g
STG
Pckg. Mounting Surface Temp.
Weight
300 (for 5s)
3.3 (Typical)
For footnotes refer to the last page
www.irf.com
1
11/19/99
IRHNA57260
Pre-Irradiation
Electrical Characteristics @Tj = 25°C (Unless Otherwise Specified)
Parameter
Min Typ Max Units
Test Conditions
BV
DSS
Drain-to-Source Breakdown Voltage
200
—
—
—
—
V
V
= 0V, I = 1.0mA
D
GS
V/°C Reference to 25°C, I = 1.0mA
∆BV
/∆T Temperature Coefficient of Breakdown
0.22
DSS
J
D
Voltage
R
Static Drain-to-Source On-State
Resistance
Gate Threshold Voltage
Forward Transconductance
Zero Gate Voltage Drain Current
—
—
2.0
40
—
—
—
—
—
—
—
0.038
0.040
4.0
V
V
= 12V, I = 35A
D
DS(on)
GS
GS
➃
Ω
= 12V, I = 55A
D
V
V
V
= V , I = 1.0mA
GS(th)
fs
DS
GS
D
Ω
g
—
S ( )
V
> 15V, I
= 35A ➃
DS
DS
I
10
25
V
= 160V ,V =0V
DSS
DS GS
µA
—
V
= 160V,
DS
= 0V, T = 125°C
V
GS
J
I
I
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
100
-100
175
40
V
= 20V
= -20V
GSS
GSS
GS
nA
nC
V
GS
Q
Q
Q
V
=12V, I = 55A
GS D
g
gs
gd
d(on)
r
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
FallTime
V
= 100V
DS
65
t
t
t
t
35
V
DD
= 100V, I = 55A,
D
125
80
R
G
= 2.35Ω
ns
d(off)
f
50
L
+ L
Total Inductance
—
S
D
nH
Measured from the center of
drain pad to center of source pad
C
C
C
Input Capacitance
Output Capacitance
—
—
—
7900
910
70
—
—
—
V
= 0V, V
= 25V
iss
oss
rss
GS
DS
f = 1.0MHz
pF
Reverse Transfer Capacitance
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
Test Conditions
I
I
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) ➀
—
—
—
—
55
220
S
SM
A
V
t
Diode Forward Voltage
—
—
—
—
—
—
1.2
450
7.0
V
T = 25°C, I = 55A, V
= 0V ➃
j
SD
rr
S
GS
Reverse Recovery Time
Reverse Recovery Charge
nS
µC
T = 25°C, I = 55A, di/dt ≥ 100A/µs
j
F
Q
V
≤ 25V ➃
RR
DD
t
Forward Turn-On Time
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L + L .
S D
on
Thermal Resistance
Parameter
Min Typ Max Units
Test Conditions
R
R
Junction-to-Case
—
—
—
0.42
—
thJC
°C/W
Junction-to-PC board
1.6
soldered to a 2” square copper-clad board
thJ-PCB
Note: Corresponding Spice and Saber models are available on the G&S Website.
For footnotes refer to the last page
2
www.irf.com
Radiation Characteristics
IRHNA57260
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @Tj = 25°C, PostTotal Dose Irradiation ➄➅
1
Parameter
Up to 600K Rads(Si) 1000K Rads (Si)2 Units
Test Conditions
Min
Max
Min
Max
BV
Drain-to-Source Breakdown Voltage
200
2.0
—
—
4.0
100
-100
10
200
—
4.0
100
-100
10
V
= 0V, I = 1.0mA
DSS
GS D
V
V
Gate Threshold Voltage
➃
1.5
—
—
—
—
V
= V , I = 1.0mA
GS(th)
GS
DS
D
I
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
V
GS
= 20V
GSS
nA
I
—
V
= -20 V
GSS
GS
I
—
—
µA
Ω
V
=160V, V =0V
GS
= 12V, I =35A
D
DSS
DS
GS
R
DS(on)
Static Drain-to-Source
On-State Resistance (TO-3)
Static Drain-to-Source
On-State Resistance (SMD-2)
Diode Forward Voltage
➃
0.039
0.044
V
R
DS(on)
➃
—
—
0.038
1.2
—
0.043
1.2
Ω
V
= 12V, I =35A
GS
D
V
SD
➃
—
V
V
= 0V, I = 55A
GS S
1. Part numbers IRHNA57260, IRHNA53260 and IRHNA54260
2. Part number IRHNA58260
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
VDS (V)
Ion
LET
MeV/(mg/cm2))
36.7
Energy
(MeV)
309
341
350
Range
(µm) @VGS=0V @VGS=-5V @VGS=-10V @VGS=-15V @VGS=-20V
Br
I
Au
39.5
32.5
28.4
200
200
50
200
100
35
150
40
25
100
35
—
50
30
—
59.8
82.3
250
200
150
100
50
Br
I
Au
0
0
-5
-10
-15
-20
VGS
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
www.irf.com
3
IRHNA57260
Pre-Irradiation
1000
100
10
1000
VGS
VGS
15V
TOP
TOP
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
BOTTOM 5.0V
100
10
1
5.0V
5.0V
20µs PULSE WIDTH
°
20µs PULSE WIDTH
°
T = 25 C
J
T = 150 C
J
1
0.1
0.1
1
10
100
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.5
2.0
1.5
1.0
0.5
0.0
1000
100
10
55A
=
I
D
°
T = 25 C
J
°
T = 150 C
J
V
= 50V
DS
20µs PULSE WIDTH
V
= 10V
GS
5.0
6.0
7.0
8.0 9.0
10.0
-60 -40 -20
0
20 40 60 80 100 120 140 160
V
, Gate-to-Source Voltage (V)
°
T , Junction Temperature( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
4
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IRHNA57260
Pre-Irradiation
12000
20
15
10
5
V
= 0V,
f = 1MHz
C SHORTED
ds
GS
I
D
= 55 A
V
V
V
= 160V
= 100V
= 40V
C
= C + C
DS
DS
DS
iss
gs
gd ,
C
= C
rss
gd
10000
8000
6000
4000
2000
0
C
= C + C
gd
oss
ds
C
iss
C
C
oss
rss
FOR TEST CIRCUIT
SEE FIGURE 13
0
1
10
100
0
50
100
150
200
250
Q
, Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
G
DS
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000
OPERATION IN THIS AREA LIMITED
BY R
DS(ON)
°
T = 150 C
100
10
1
J
10us
100us
1ms
1
°
T = 25 C
J
Tc = 25°C
10ms
Tj = 150°C
Single Pulse
V
= 0 V
GS
0.1
0.2
0.1
0.6
SD
1.0
1.4
1.8
2.2
1
10
100
1000
V
,Source-to-Drain Voltage (V)
V
Drain-to-Source Voltage (V)
DS,
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
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5
IRHNA57260
Pre-Irradiation
RD
60
50
40
30
20
10
0
VDS
VGS
12V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
25
50
T
75
100
125
150
°
, Case Temperature ( C)
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
0.01
t
1
t
2
Notes:
1. Duty factor D = t / t
1
2
2. Peak T = P
x Z
+ T
C
J
DM
thJC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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IRHNA57260
Pre-Irradiation
800
600
400
200
0
I
D
TOP
25A
35A
15V
BOTTOM 55A
DRIVER
L
V
D S
D.U.T
.
R
G
+
V
D D
-
I
A
AS
12V
2
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
25
50
75
100
125
150
°
Starting T , Junction Temperature( C)
J
V
(BR )D SS
t
p
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Current Regulator
Fig 12b. Unclamped Inductive Waveforms
Same Type as D.U.T.
50KΩ
.2µF
12V
Q
G
.3µF
+
12 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
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7
IRHNA57260
Footnotes:
Pre-Irradiation
➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
➄ Total Dose Irradiation with V Bias.
➀ Repetitive Rating; Pulse width limited by
maximum junction temperature.
GS
= 0 during
12 volt V
applied and V
➁ V
= 50V, starting T = 25°C, L= 0.25 mH
GS
DS
DD
J
irradiation per MIL-STD-750, method 1019, condition A.
Peak I = 55A, V
= 12V
GS
L
➅ Total Dose Irradiation with V
Bias.
= 0 during
➂ I
≤ 55A, di/dt ≤ 120A/µs,
DS
SD
DD
160 volt V
applied and V
V
≤ 200V, T ≤ 150°C
DS
GS
J
irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions — SMD-2
PAD ASSIGNMENTS
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
IR GREAT BRITAIN: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
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IR TAIWAN:16 Fl. Suite D. 207, Sec. 2, Tun Haw South Road, Taipei, 10673, Taiwan Tel: 886-2-2377-9936
Data and specifications subject to change without notice.
11/99
8
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