IRHNA57Z60SCSPBF [INFINEON]
Power Field-Effect Transistor, 75A I(D), 30V, 0.0035ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD2, 3 PIN;型号: | IRHNA57Z60SCSPBF |
厂家: | Infineon |
描述: | Power Field-Effect Transistor, 75A I(D), 30V, 0.0035ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, HERMETIC SEALED, CERAMIC, SMD2, 3 PIN 开关 脉冲 晶体管 |
文件: | 总8页 (文件大小:105K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD - 91787E
RADIATION HARDENED
POWER MOSFET
SURFACE MOUNT (SMD-2)
IRHNA57Z60
30V, N-CHANNEL
TECHNOLOGY
R
5
Product Summary
Part Number Radiation Level RDS(on)
ID
IRHNA57Z60 100K Rads (Si) 0.0035Ω 75*A
IRHNA53Z60 300K Rads (Si) 0.0035Ω 75*A
IRHNA54Z60 600K Rads (Si) 0.0035Ω 75*A
IRHNA58Z60 1000K Rads (Si) 0.0040Ω 75*A
SMD-2
International Rectifier’s R5TM technology provides
high performance power MOSFETs for space appli-
cations. These devices have been characterized for
Single Event Effects (SEE) with useful performance
up to an LET of 80 (MeV/(mg/cm2)). The combination
Features:
n
n
n
n
n
n
n
n
n
n
Single Event Effect (SEE) Hardened
Ultra Low RDS(on)
Low Total Gate Charge
Proton Tolerant
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Surface Mount
of low R
and low gate charge reduces the power
DS(on)
losses in switching applications such as DC to DC
converters and motor control. These devices retain
all of the well established advantages of MOSFETs
such as voltage control, fast switching, ease of paral-
leling and temperature stability of electrical param-
eters.
Ceramic Package
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
Units
I
@ V
@ V
= 12V, T = 25°C
Continuous Drain Current
75*
D
GS
C
A
I
= 12V, T = 100°C Continuous Drain Current
75*
300
D
GS
C
I
Pulsed Drain Current ➀
Max. Power Dissipation
DM
@ T = 25°C
P
300
W
W/°C
V
D
C
Linear Derating Factor
2.4
V
Gate-to-Source Voltage
Single Pulse Avalanche Energy ➁
Avalanche Current ➀
±20
GS
E
500
mJ
A
AS
I
75
AR
E
Repetitive Avalanche Energy ➀
Peak Diode Recovery dv/dt ➂
Operating Junction
30
mJ
V/ns
AR
dv/dt
0.83
-55 to 150
T
J
T
Storage Temperature Range
oC
g
STG
Pckg. Mounting Surface Temp.
Weight
300 (for 5s)
3.3 (Typical)
* Current is limited by internal wire diameter
For footnotes refer to the last page
www.irf.com
1
4/10/00
IRHNA57Z60
Pre-Irradiation
Electrical Characteristics @Tj = 25°C (Unless Otherwise Specified)
Parameter
Min Typ Max Units
Test Conditions
BV
DSS
Drain-to-Source Breakdown Voltage
30
—
—
—
—
V
V
= 0V, I = 1.0mA
D
GS
V/°C Reference to 25°C, I = 1.0mA
∆BV
/∆T Temperature Coefficient of Breakdown
0.026
DSS
J
D
Voltage
R
Static Drain-to-Source On-State
Resistance
—
—
0.0035
Ω
V
= 12V, I = 45A
GS D
DS(on)
➃
V
Gate Threshold Voltage
Forward Transconductance
Zero Gate Voltage Drain Current
2.0
45
—
—
—
—
—
4.0
—
V
V
= V , I = 1.0mA
GS(th)
fs
DS
GS
D
Ω
g
S ( )
V
DS
> 15V, I
= 45A ➃
DS
I
10
25
V
= 24V ,V =0V
DSS
DS GS
µA
—
V
= 24V,
DS
= 0V, T = 125°C
V
GS
J
I
I
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
4.0
100
-100
200
55
V
= 20V
= -20V
GSS
GSS
GS
nA
nC
V
GS
Q
Q
Q
V
=12V, I = 45A
g
gs
gd
d(on)
r
GS
D
= 15V
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
FallTime
V
DS
40
t
t
t
t
35
V
DD
= 15V, I = 45A,
D
125
80
R
G
= 2.35Ω
ns
d(off)
f
50
L
+ L
Total Inductance
—
S
D
nH
Measured from the center of
drain pad to center of source pad
C
C
C
Input Capacitance
Output Capacitance
—
—
—
9110
4620
150
—
—
—
V
= 0V, V
= 25V
iss
oss
rss
GS
DS
f = 1.0MHz
pF
Reverse Transfer Capacitance
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
Test Conditions
I
I
Continuous Source Current (Body Diode)
—
—
—
—
75*
S
A
Pulse Source Current (Body Diode) ➀
300
SM
V
t
Q
Diode Forward Voltage
—
—
—
—
—
—
1.3
165
690
V
T = 25°C, I = 45A, V
= 0V ➃
j
SD
S
GS
Reverse Recovery Time
Reverse Recovery Charge
nS
nC
T = 25°C, I = 45A, di/dt ≥ 100A/µs
j
rr
RR
F
V
≤ 25V ➃
DD
t
Forward Turn-On Time
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L + L .
S D
on
Thermal Resistance
Parameter
Min Typ Max Units
Test Conditions
R
R
Junction-to-Case
—
—
—
0.42
—
thJC
°C/W
Junction-to-PC board
1.6
soldered to a 2” square copper-clad board
thJ-PCB
Note: Corresponding Spice and Saber models are available on the G&S Website.
For footnotes refer to the last page
2
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Radiation Characteristics
IRHNA57Z60
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @Tj = 25°C, PostTotal Dose Irradiation ➄➅
1
Parameter
Up to 600K Rads(Si) 1000K Rads (Si)2 Units
Test Conditions
Min
Max
Min
Max
BV
Drain-to-Source Breakdown Voltage
30
2.0
—
—
—
—
—
4.0
100
-100
10
30
1.5
—
—
—
—
—
4.0
100
-100
10
V
= 0V, I = 1.0mA
GS D
DSS
V
V
Gate Threshold Voltage
➃
V
= V , I = 1.0mA
GS
DS D
GS(th)
I
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
V
GS
= 20V
GSS
nA
I
V
GS
= -20 V
GSS
I
µA
Ω
V
V
=24V, V =0V
GS
= 12V, I =45A
D
DSS
DS
GS
R
DS(on)
Static Drain-to-Source
On-State Resistance (TO-3)
Static Drain-to-Source
On-State Resistance (SMD-2)
Diode Forward Voltage
➃
0.004
0.005
R
DS(on)
➃
—
—
0.0035
1.3
—
—
0.004
1.3
Ω
V
= 12V, I =45A
GS
D
V
SD
➃
V
V
= 0V, I = 45A
GS S
1. Part numbers IRHNA57Z60, IRHNA53Z60 and IRHNA54Z60
2. Part number IRHNA58Z60
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
VDS (V)
Ion
LET
MeV/(mg/cm2))
37.9
Energy
(MeV)
255
290
313
Range
(µm) @VGS=0V @VGS=-5V @VGS=-10V @VGS=-15V @VGS=-20V
Br
I
Au
33.4
28.8
26.5
30
25
22.5
30
25
22.5
30
20
15
25
15
10
20
10
—
59.4
80.3
35
30
25
20
15
10
5
Br
I
AU
0
0
-5
-10
-15
-20
VGS
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHNA57Z60
Pre-Irradiation
1000
1000
100
10
VGS
VGS
15V
TOP
15V
12V
10V
9.0V
8.0V
7.0V
6.0V
TOP
12V
10V
9.0V
8.0V
7.0V
6.0V
BOTTOM 5.0V
BOTTOM5.0V
100
5.0V
5.0V
20µs PULSE WIDTH
°
T = 25 C
J
20µs PULSE WIDTH
°
T = 150 C
J
10
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
2.0
=
75 A
I
D
°
T = 25 C
J
1.5
1.0
0.5
0.0
°
T = 150 C
J
100
V
=
25V
DS
V
=112V
20µs PULSE WIDTH
GS
10
5.0
5.5
V
6.0
6.5
7.0 7.5 8.0
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
, Gate-to-Source Voltage (V)
T , Junction Temperature( C)
J
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs. Temperature
4
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Pre-Irradiation
IRHNA57Z60
20000
20
15
10
5
I
D
= 45 A
V
= 0V,
f = 1MHz
C SHORTED
ds
GS
V
V
= 24V
= 15V
C
= C + C
DS
DS
iss
gs
gd
gd ,
C
= C
rss
C
= C + C
gd
oss
ds
15000
10000
5000
0
C
oss
C
iss
FOR TEST CIRCUIT
SEE FIGURE 13
C
rss
0
1
10
100
0
25
50
75 100 125 150 175 200 225
, Total Gate Charge (nC)
V
, Drain-to-Source Voltage (V)
Q
DS
G
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-Source Voltage
Drain-to-Source Voltage
1000
100
10
1000
OPERATION IN THIS AREA LIMITED
°
BY R
T = 25 C
DS(on)
J
°
100
10
1
T = 150 C
J
100us
1ms
°
T = 25 C
C
J
°
T = 150 C
10ms
V
= 0 V
Single Pulse
GS
0.1
0.0
1
10
100
0.5
1.0
1.5
2.0
2.5
3.0
3.5
V
, Drain-to-Source Voltage (V)
V
,Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
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5
IRHNA57Z60
Pre-Irradiation
RD
250
200
150
100
50
VDS
LIMITED BY PACKAGE
VGS
12V
D.U.T.
RG
+VDD
-
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
V
DS
90%
0
25
50
75
100
125
150
°
, Case Temperature ( C)
T
C
10%
V
GS
t
t
r
t
t
f
Fig 9. Maximum Drain Current Vs.
d(on)
d(off)
Case Temperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
DM
0.01
0.001
t
1
t
2
Notes:
1. Duty factor D = t / t
1
2
2. Peak T = P
x Z
+ T
C
J
DM
thJC
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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Pre-Irradiation
IRHNA57Z60
1200
1000
800
600
400
200
0
I
D
TOP
34A
47A
15V
BOTTOM 75A
DRIVER
L
V
D S
D.U.T
.
R
G
+
V
D D
-
I
A
AS
12V
2
0.01
Ω
t
p
Fig 12a. Unclamped Inductive Test Circuit
25
50
75
100
125
150
°
Starting T , Junction Temperature( C)
J
V
(BR )D SS
t
p
Fig 12c. Maximum Avalanche Energy
Vs. Drain Current
I
AS
Current Regulator
Fig 12b. Unclamped Inductive Waveforms
Same Type as D.U.T.
50KΩ
.2µF
12V
Q
G
.3µF
+
12 V
V
DS
D.U.T.
-
Q
Q
GD
GS
V
GS
V
G
3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
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7
IRHNA57Z60
Footnotes:
Pre-Irradiation
➃ Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
➄ Total Dose Irradiation with V Bias.
➀ Repetitive Rating; Pulse width limited by
maximum junction temperature.
GS
= 0 during
12 volt V
applied and V
➁ V
= 25V, starting T = 25°C, L= 0.3 mH
GS
DS
DD
J
irradiation per MIL-STD-750, method 1019, condition A.
Peak I = 75A, V
= 12V
GS
L
➅ Total Dose Irradiation with V Bias.
➂ I
≤ 75A, di/dt ≤ 94A/µs,
DS
= 0 during
SD
DD
24 volt V
DS
applied and V
GS
V
≤ 30V, T ≤ 150°C
J
irradiation per MlL-STD-750, method 1019, condition A.
Case Outline and Dimensions — SMD-2
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Data and specifications subject to change without notice. 4/00
8
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