IRHNA593064 [INFINEON]
RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-2); 抗辐射功率MOSFET表面贴装( SMD - 2 )型号: | IRHNA593064 |
厂家: | Infineon |
描述: | RADIATION HARDENED POWER MOSFET SURFACE MOUNT (SMD-2) |
文件: | 总8页 (文件大小:227K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
PD-94604B
RADIATION HARDENED
POWER MOSFET
SURFACE MOUNT (SMD-2)
IRHNA597064
60V, P-CHANNEL
TECHNOLOGY
5
ꢀꢁ
Product Summary
Part Number Radiation Level RDS(on)
ID
IRHNA597064 100K Rads (Si) 0.016Ω -56A*
IRHNA593064 300K Rads (Si) 0.016Ω -56A*
SMD-2
International Rectifier’s R5TM technology provides
high performance power MOSFETs for space appli-
cations. These devices have been characterized for
Single Event Effects (SEE) with useful performance
up to an LET of 80 (MeV/(mg/cm2)). The combination
of low RDS(on) and low gate charge reduces the power
losses in switching applications such as DC to DC
converters and motor control. These devices retain
all of the well established advantages of MOSFETs
such as voltage control, fast switching, ease of paral-
leling and temperature stability of electrical param-
eters.
Features:
n
n
n
n
n
n
n
n
n
n
Single Event Effect (SEE) Hardened
Ultra Low RDS(on)
Low Total Gate Charge
Proton Tolerant
Simple Drive Requirements
Ease of Paralleling
Hermetically Sealed
Surface Mount
Ceramic Package
Light Weight
Absolute Maximum Ratings
Pre-Irradiation
Parameter
Units
I
@ V
@ V
= -12V, T = 25°C Continuous Drain Current
-56*
D
D
GS
GS
C
A
I
= -12V, T = 100°C Continuous Drain Current
-56
-224
250
C
I
Pulsed Drain Current À
Max. Power Dissipation
Linear Derating Factor
DM
@ T = 25°C
P
W
W/°C
V
D
C
2.0
V
Gate-to-Source Voltage
Single Pulse Avalanche Energy Á
Avalanche Current À
±20
GS
E
725
mJ
A
AS
I
-56
AR
E
Repetitive Avalanche Energy À
Peak Diode Recovery dv/dt Â
Operating Junction
25
mJ
V/ns
AR
dv/dt
2.1
T
-55 to 150
J
T
Storage Temperature Range
oC
g
STG
Pckg. Mounting Surface Temp.
Weight
300 (for 5s)
3.3 (Typical)
* Current is limited by package
For footnotes refer to the last page
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1
11/01/04
IRHNA597064
Pre-Irradiation
Electrical Characteristics @ Tj = 25°C (Unless Otherwise Specified)
Parameter
Min Typ Max Units
Test Conditions
BV
Drain-to-Source Breakdown Voltage
-60
—
—
V
V
= 0V, I = -1.0mA
D
DSS
GS
V/°C Reference to 25°C, I = -1.0mA
∆BV
/∆T Temperature Coefficient of Breakdown
—
-0.064
—
DSS
J
D
Voltage
R
V
Static Drain-to-Source On-State
Resistance
Gate Threshold Voltage
Forward Transconductance
Zero Gate Voltage Drain Current
—
—
0.016
Ω
V
= -12V, I = -56A
GS D
Ã
DS(on)
-2.0
40
—
—
—
—
—
-4.0
—
-10
-25
V
S ( )
V
DS
= V , I = -1.0mA
GS(th)
fs
GS
D
Ω
g
V
= -25V, I
= -56A Ã
DS
V
DS
I
= -48V ,V =0V
DSS
DS GS
µA
—
V
= -48V,
DS
= 0V, T = 125°C
V
V
GS
GS
J
I
I
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain (‘Miller’) Charge
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Total Inductance
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
6.0
-100
100
200
65
60
30
100
100
100
—
V
V
= -20V
= 20V
GSS
GSS
GS
GS
nA
nC
Q
Q
Q
=-12V, I = -56A
g
gs
gd
d(on)
r
D
V
= -30V
DS
t
t
t
t
V
= -30V, I = -56A,
D
DD
V = -12V, R = 2.35Ω
GS
G
ns
d(off)
f
L
S
+ L
D
nH
Measured from the center of
drain pad to center of source pad
C
C
C
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
—
—
—
7022
2897
267
—
—
—
V
= 0V, V
= -25V
f = 1.0MHz
iss
oss
rss
GS DS
pF
Source-Drain Diode Ratings and Characteristics
Parameter
Min Typ Max Units
Test Conditions
I
I
V
t
Q
Continuous Source Current (Body Diode)
Pulse Source Current (Body Diode) À
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
—
—
—
—
—
—
—
—
—
—
-56*
-224
-5.0
200
500
S
SM
SD
rr
A
V
ns
nC
T = 25°C, I = -56A, V
= 0V Ã
j
S
GS
T = 25°C, I =-56A, di/dt ≤ -100A/µs
j
F
V
DD
≤ -25V Ã
RR
t
Forward Turn-On Time
Intrinsic turn-on time is negligible. Turn-on speed is substantially controlled by L + L .
S D
on
* Current is limited by package
Thermal Resistance
Parameter
Min Typ Max Units
Test Conditions
R
R
Junction-to-Case
Junction-to-PC board
—
—
—
1.6
0.5
—
thJC
thJ-PCB
°C/W
soldered to a 2 square copper-clad board
Note: Corresponding Spice and Saber models are available on International Rectifier Website.
For footnotes refer to the last page
2
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Radiation Characteristics
IRHNA597064
International Rectifier Radiation Hardened MOSFETs are tested to verify their radiation hardness capability.
The hardness assurance program at International Rectifier is comprised of two radiation environments.
Every manufacturing lot is tested for total ionizing dose (per notes 5 and 6) using the TO-3 package. Both
pre- and post-irradiation performance are tested and specified using the same drive circuitry and test
conditions in order to provide a direct comparison.
Table 1. Electrical Characteristics @ Tj = 25°C, Post Total Dose Irradiation ÄÅ
1
Parameter
100K Rads(Si)
Min
300KRads(Si)2 Units
Test Conditions
Max
Min
Max
BV
Drain-to-Source Breakdown Voltage
Gate Threshold Voltage
Gate-to-Source Leakage Forward
Gate-to-Source Leakage Reverse
Zero Gate Voltage Drain Current
-60
-2.0
—
—
—
—
-60
-2.0
—
—
—
—
V
= 0V, I = -1.0mA
DSS
GS D
V
V
-4.0
-100
100
-10
-5.0
-100
100
-10
V
= V , I = -1.0mA
GS
GS(th)
DS
D
I
V
V
=-20V
= 20 V
GSS
GS
nA
I
GSS
GS
I
µA
Ω
V
V
= -48V, V
=0V
GS
DSS
DS
GS
R
DS(on)
Static Drain-to-Source
On-State Resistance (TO-3)
Static Drain-to-Source
On-State Resistance (SMD-2)
Diode Forward Voltage
Ã
—
0.016
—
0.016
= -12V, I = -56A
D
R
DS(on)
Ã
—
—
0.016
-5.0
—
—
0.016
-5.0
Ω
V
GS
= -12V, I = -56A
D
V
SD
Ã
V
V
= 0V, I = -56A
GS S
1. Part number IRHNA597064
2. Part number IRHNA593064
International Rectifier radiation hardened MOSFETs have been characterized in heavy ion environment for
Single Event Effects (SEE). Single Event Effects characterization is illustrated in Fig. a and Table 2.
Table 2. Single Event Effect Safe Operating Area
VDS (V)
Ion
LET
(MeV/(mg/cm2))
37.3
Energy
(MeV)
285
345
357
Range
(µm) @VGS=0V @VGS=5V @VGS=10V @VGS=15V @VGS=20V
Br
I
Au
36.8
32.7
28.5
- 60
- 60
- 60
- 60
- 60
- 60
- 60
- 60
- 60
- 60
- 45
—
- 60
- 25
—
59.9
82.3
-70
-60
-50
-40
-30
-20
-10
0
Br
I
Au
0
5
10
15
20
VGS
Fig a. Single Event Effect, Safe Operating Area
For footnotes refer to the last page
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3
IRHNA597064
Pre-Irradiation
1000
1000
100
10
VGS
-15V
-12V
-10V
-9.0V
-8.0V
-7.0V
-6.0V
VGS
-15V
-12V
TOP
TOP
-10V
-9.0V
-8.0V
-7.0V
- 6.0V
BOTTOM -5.0V
BOTTOM -5.0V
-5.0V
100
-5.0V
20 s PULSE WIDTH
Tj = 25°C
20 s PULSE WIDTH
µ
µ
Tj = 150°C
10
0.1
1
10
100
0.1
1
10
100
-V
, Drain-to-Source Voltage (V)
-V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
1000
2.0
1.5
1.0
0.5
0.0
=-56A
I
D
T
= 25°C
J
T
= 150°C
= -25V
J
V
DS
20 s PULSE WIDTH
µ
V
GS
=-12V
100
-60 -40 -20
0
20 40 60 80 100 120 140 160
°
5
5.5
6
6.5
7
7.5
8
T , Junction Temperature( C)
J
-V , Gate-to-Source Voltage (V)
GS
Fig 3. Typical Transfer Characteristics
Fig 4. Normalized On-Resistance
Vs.Temperature
4
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Pre-Irradiation
IRHNA597064
12000
10000
8000
6000
4000
2000
16
12
8
V
C
= 0V, f = 1 MHZ
GS
V
V
= -48V
= C + C , C SHORTED
DS
DS
iss
gs
gd ds
I
= -56A
D
= -30V
C
= C
rss
gd
C
= C + C
oss
ds gd
Ciss
Coss
4
FOR TEST CIRCUIT
SEE FIGURE 13
Crss
0
1
0
10
100
0
20 40 60 80 100 120 140 160
Total Gate Charge (nC)
-V , Drain-to-Source Voltage (V)
DS
Q
G,
Fig 6. Typical Gate Charge Vs.
Fig 5. Typical Capacitance Vs.
Gate-to-SourceVoltage
Drain-to-SourceVoltage
1000
100
10
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
T
= 150°C
J
100µs
1ms
T
= 25°C
J
10ms
1
Tc = 25°C
Tj = 150°C
Single Pulse
V
= 0V
GS
1
0.1
1
10
100
1000
0.5
1.5
2.5
3.5
4.5
5.5
-V
, Drain-to-Source Voltage (V)
-V
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
ForwardVoltage
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5
IRHNA597064
Pre-Irradiation
RD
100
80
60
40
20
0
VDS
LIMITED BY PACKAGE
VGS
D.U.T.
RG
-
+
VDD
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
t
t
r
t
t
f
d(on)
d(off)
V
GS
10%
25
50
75
100
125
150
°
, Case Temperature ( C)
T
C
90%
V
DS
Fig 9. Maximum Drain Current Vs.
CaseTemperature
Fig 10b. Switching Time Waveforms
1
D = 0.50
0.20
0.1
0.01
0.10
0.05
0.02
0.01
SINGLE PULSE
(THERMAL RESPONSE)
P
2
DM
t
1
t
2
Notes:
1. Duty factor D = t / t
1
2. Peak T =P
x Z
+ T
C
J
DM
thJC
0.001
0.00001
0.0001
0.001
0.01
0.1
1
t , Rectangular Pulse Duration (sec)
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
6
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Pre-Irradiation
IRHNA597064
L
V
DS
1600
1200
800
400
0
I
D
-
D.U.T
AS
R
G
TOP
-25A
-35.4A
BOTTOM -56A
VDD
A
+
I
DRIVER
V
-2
GS
0.01
t
Ω
p
15V
Fig 12a. Unclamped Inductive Test Circuit
I
AS
25
50
75
100
125
150
Starting T , Junction Temperature (°C)
J
Fig 12c. Maximum Avalanche Energy
Vs. DrainCurrent
t
p
V
(BR)DSS
Fig 12b. Unclamped Inductive Waveforms
Current Regulator
Same Type as D.U.T.
50KΩ
Q
Q
G
.2µF
-12V
1
.3µF
-12 V
-
Q
V
GS
GD
+
DS
D.U.T.
V
GS
V
G
-3mA
I
I
D
G
Charge
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
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7
IRHNA597064
Footnotes:
Pre-Irradiation
à Pulse width ≤ 300 µs; Duty Cycle ≤ 2%
Ä Total Dose Irradiation with V Bias.
À
Repetitive Rating; Pulse width limited by
maximum junction temperature.
GS
= 0 during
-12 volt V
applied and V
Á V
= -25V, starting T = 25°C, L= 0.46mH
J
GS
irradiation per MIL-STD-750, method 1019, condition A.
DS
DD
Peak I = - 56A, V
= -12V
L
GS
Å Total Dose Irradiation with V
Bias.
 I
SD
≤ -56A, di/dt ≤ -360A/µs,
DS
applied and V = 0 during
GS
-48 volt V
V
≤ -60V, T ≤ 150°C
DS
irradiation per MlL-STD-750, method 1019, condition A.
DD
J
Case Outline and Dimensions — SMD-2
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Data and specifications subject to change without notice. 11/2004
8
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相关型号:
IRHNA597064SCS
Rad hard, -60V, -56A, single, P-channel MOSFET, R5 in a SMD-2 package - SMD-2, 100 krad(Si) TID, QIRL
INFINEON
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