IRL60B216 [INFINEON]
Brushed Motor drive applications;型号: | IRL60B216 |
厂家: | Infineon |
描述: | Brushed Motor drive applications |
文件: | 总10页 (文件大小:725K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
StrongIRFET™
IRL60B216
HEXFET® Power MOSFET
Application
Brushed Motor drive applications
BLDC Motor drive applications
Battery powered circuits
Half-bridge and full-bridge topologies
Synchronous rectifier applications
Resonant mode power supplies
OR-ing and redundant power switches
DC/DC and AC/DC converters
DC/AC Inverters
VDSS
RDS(on) typ.
max
60V
1.5m
1.9m
305A
ID (Silicon Limited)
ID (Package Limited)
195A
Benefits
S
D
Optimized for Logic Level Drive
Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
Fully Characterized Capacitance and Avalanche SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free*
G
RoHS Compliant, Halogen-Free
G
D
S
Gate
Drain
Source
Standard Pack
Form
Base part number
Package Type
Orderable Part Number
Quantity
IRL60B216
TO-220
Tube
50
IRL60B216
6
5
4
3
2
1
0
315
270
225
180
135
90
I
= 100A
Limited By Package
D
T
T
= 125°C
= 25°C
J
J
45
0
2
4
6
8
10 12 14 16 18 20
25
50
75
100
125
150
175
T
, Case Temperature (°C)
V
Gate -to -Source Voltage (V)
C
GS,
Fig 2. Maximum Drain Current vs. Case Temperature
Fig 1. Typical On-Resistance vs. Gate Voltage
1
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IRL60B216
Absolute Maximum Rating
Symbol
Parameter
Max.
305
215
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C Continuous Drain Current, VGS @ 10V (Silicon Limited)
A
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
195
780
375
PD @TC = 25°C
Maximum Power Dissipation
Linear Derating Factor
W
W/°C
V
2.5
VGS
TJ
Gate-to-Source Voltage
± 20
Operating Junction and
-55 to + 175
°C
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
300
Mounting Torque, 6-32 or M3 Screw
10 lbf·in (1.1 N·m)
Avalanche Characteristics
EAS (Thermally limited)
EAS (Thermally limited)
530
Single Pulse Avalanche Energy
mJ
1045
Single Pulse Avalanche Energy
Avalanche Current
Repetitive Avalanche Energy
IAR
EAR
A
mJ
See Fig 15, 16, 23a, 23b
Thermal Resistance
Symbol
Parameter
Typ.
–––
0.50
–––
Max.
0.4
Units
Junction-to-Case
RJC
RCS
RJA
Case-to-Sink, Flat Greased Surface
°C/W
–––
62
Junction-to-Ambient
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Min. Typ. Max. Units
60 ––– –––
––– 0.041 –––
Conditions
VGS = 0V, ID = 250µA
V
V/°C Reference to 25°C, ID = 2mA
V(BR)DSS/TJ
–––
–––
1.0 –––
––– –––
––– ––– 150
––– ––– 100
––– ––– -100
1.5
1.7
1.9
2.2
2.4
1.0
V
V
GS = 10V, ID = 100A
GS = 4.5V, ID = 50A
RDS(on)
Static Drain-to-Source On-Resistance
Gate Threshold Voltage
m
V
VGS(th)
VDS = VGS, ID = 250µA
DS = 60 V, VGS = 0V
VDS = 60V,VGS = 0V,TJ =125°C
V
IDSS
Drain-to-Source Leakage Current
µA
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Gate Resistance
V
V
GS = 20V
GS = -20V
IGSS
RG
nA
–––
2.0
–––
Notes:
Calculated continuous current based on maximum allowable junction temperature. Bond wire current limit is 195A. Note that
Current imitations arising from heating of the device leads may occur with some lead mounting arrangements.
(Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.107mH, RG = 50, IAS = 100A, VGS =10V.
ISD 100A, di/dt 1420A/µs, VDD V(BR)DSS, TJ 175°C.
Pulse width 400µs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% VDSS
.
Coss eff. (ER) is a fixed capacitance that gives the same energy as Coss while VDS is rising from 0 to 80% VDSS
.
R is measured at TJ approximately 90°C.
Limited by TJmax, starting TJ = 25°C, L = 1mH, RG = 50, IAS = 46A, VGS =10V.
Pulse drain current is limited to 780A by source bonding technology.
2
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IRL60B216
Dynamic Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Total Gate Charge
Min.
264
–––
–––
–––
–––
–––
–––
Typ. Max. Units
Conditions
VDS = 10V, ID = 100A
ID = 100A
–––
172
53
–––
258
–––
–––
–––
–––
–––
S
Qg
Qgs
Gate-to-Source Charge
Gate-to-Drain Charge
Total Gate Charge Sync. (Qg– Qgd)
Turn-On Delay Time
VDS = 30V
nC
Qgd
80
VGS = 4.5V
Qsync
td(on)
tr
92
70
VDD = 30V
ID = 30A
Rise Time
185
ns
td(off)
tf
Turn-Off Delay Time
Fall Time
–––
–––
190
120
–––
–––
RG= 2.7
VGS = 4.5V
Ciss
Coss
Crss
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
––– 15570 –––
VGS = 0V
–––
–––
1260
880
–––
–––
VDS = 25V
ƒ = 1.0MHz, See Fig.7
pF
Coss eff.(ER) Effective Output Capacitance (Energy Related) –––
1260
1645
–––
–––
VGS = 0V, VDS = 0V to 48V
VGS = 0V, VDS = 0V to 48V
Coss eff.(TR) Output Capacitance (Time Related)
–––
Diode Characteristics
Symbol
IS
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Min.
Typ. Max. Units
Conditions
MOSFET symbol
D
–––
––– 305
A
––– 780
showing the
G
integral reverse
p-n junction diode.
ISM
–––
S
VSD
Diode Forward Voltage
–––
–––
–––
–––
11
1.2
V
TJ = 25°C,IS =100A,VGS = 0V
dv/dt
Peak Diode Recovery dv/dt
––– V/ns TJ = 175°C,IS = 100A,VDS = 60V
52
–––
TJ = 25°C
VDD = 51V
IF = 100A,
trr
Reverse Recovery Time
ns
–––
–––
–––
–––
57
91
–––
–––
–––
–––
TJ = 125°C
TJ = 25°C di/dt = 100A/µs
Qrr
Reverse Recovery Charge
Reverse Recovery Current
nC
A
116
3.0
TJ = 125°C
IRRM
TJ = 25°C
3
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IRL60B216
1000
100
10
1000
100
10
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
VGS
15V
10V
8.0V
6.0V
5.0V
4.5V
4.0V
3.5V
TOP
TOP
3.5V
3.5V
BOTTOM
BOTTOM
60µs
Tj = 25°C
PULSE WIDTH
60µs
Tj = 175°C
PULSE WIDTH
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 4. Typical Output Characteristics
Fig 3. Typical Output Characteristics
1000
100
10
2.2
1.8
1.4
1.0
0.6
I
= 100A
= 10V
D
V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 10V
DS
60µs PULSE WIDTH
0.1
0
2
4
6
-60
-20
T
20
60
100
140
180
, Junction Temperature (°C)
J
V
, Gate-to-Source Voltage (V)
GS
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
14
1000000
100000
10000
1000
V
C
= 0V,
f = 1 MHZ
GS
I
= 100A
V
= C + C , C SHORTED
D
iss
gs
gd ds
12
10
8
C
= C
rss
gd
= 48V
= 30V
DS
C
= C + C
oss
ds
gd
V
DS
VDS= 12V
C
iss
C
6
oss
C
rss
4
2
0
100
0
50 100 150 200 250 300 350 400 450
, Total Gate Charge (nC)
0.1
1
10
100
Q
V
, Drain-to-Source Voltage (V)
G
DS
Fig 8. Typical Gate Charge vs.
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
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Gate-to-Source Voltage
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IRL60B216
1000
100
10
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
1000
100
10
T
= 175°C
J
100µsec
Limited by Package
1msec
T
= 25°C
J
1
10msec
1
DC
Tc = 25°C
Tj = 175°C
Single Pulse
0.1
0.01
V
= 0V
GS
0.1
0.1
1
10
0.0
0.5
1.0
1.5
2.0
2.5
V
, Drain-toSource Voltage (V)
V
, Source-to-Drain Voltage (V)
DS
SD
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode Forward Voltage
74
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0.0
Id = 2.0mA
72
70
68
66
64
62
60
-60
-20
20
60
100
140
180
-10
0
10
20
30
40
50
60
T
, Temperature ( °C )
J
V
Drain-to-Source Voltage (V)
DS,
Fig 11. Drain-to-Source Breakdown Voltage
Fig 12. Typical Coss Stored Energy
4.0
VGS = 3.5V
VGS = 4.0V
VGS = 4.5V
VGS = 8.0V
3.5
VGS = 10V
3.0
2.5
2.0
1.5
1.0
0
50
100
150
200
I
, Drain Current (A)
D
Fig 13. Typical On-Resistance vs. Drain Current
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IRL60B216
1
0.1
D = 0.50
0.20
0.10
0.05
0.01
0.02
0.01
SINGLE PULSE
( THERMAL RESPONSE )
0.001
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart = 25°C (Single Pulse)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Avalanche Current vs. Pulse Width
600
Notes on Repetitive Avalanche Curves , Figures 15, 16:
(For further info, see AN-1005 at www.irf.com)
1.Avalanche failures assumption:
TOP
BOTTOM 1.0% Duty Cycle
= 100A
Single Pulse
500
400
300
200
100
0
I
D
Purely a thermal phenomenon and failure occurs at a
temperature far in excess of Tjmax. This is validated for every
part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not
exceeded.
3. Equation below based on circuit and waveforms shown in Figures
23a, 23b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage
increase during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax
(assumed as 25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 14)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = T/ ZthJC
I
av = 2T/ [1.3·BV·Zth]
EAS (AR) = PD (ave)· av
t
Fig 16. Maximum Avalanche Energy vs. Temperature
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IRL60B216
3.0
2.5
2.0
1.5
1.0
0.5
0.0
20
16
12
8
I
= 60A
= 51V
F
V
R
T = 25°C
J
T = 125°C
J
ID = 250µA
ID = 1.0mA
ID = 1.0A
4
0
-75
-25
T
25
75
125
175
0
200
400
600
800
1000
, Temperature ( °C )
di /dt (A/µs)
J
F
Fig 17. Threshold Voltage vs. Temperature
Fig 18. Typical Recovery Current vs. dif/dt
400
20
I
= 60A
= 51V
I
= 100A
= 51V
F
F
350
300
250
200
150
100
50
V
V
R
R
16
12
8
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
4
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig 19. Typical Recovery Current vs. dif/dt
Fig 20. Typical Stored Charge vs. dif/dt
400
I
= 100A
= 51V
F
350
300
250
200
150
100
50
V
R
T = 25°C
J
T = 125°C
J
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig 21. Typical Stored Charge vs. dif/dt
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IRL60B216
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel HEXFET® Power MOSFETs
V
(BR)DSS
t
p
15V
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
20V
I
0.01
t
p
AS
Fig 23a. Unclamped Inductive Test Circuit
Fig 23b. Unclamped Inductive Waveforms
Fig 24a. Switching Time Test Circuit
Fig 24b. Switching Time Waveforms
Id
Vds
Vgs
VDD
Vgs(th)
Qgs1
Qgs2
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
Fig 25a. Gate Charge Test Circuit
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IRL60B216
TO-220AB Package Outline (Dimensions are shown in millimeters (inches))
TO-220AB Part Marking Information
E X A M P L E :
T H IS IS A N IR F 1 0 1 0
L O C O D E 1 7 8 9
A S S E M B L E D
IN T H E A S S E M B L Y L IN E "C "
P A R T N U M B E R
D A T E C O D E
T
IN T E R N A T IO N A L
R E C T IF IE R
L O G O
O
N
W
W
1 9 , 2 0 0 0
Y E A R
E E K 1 9
L IN E
0
=
2 0 0 0
N o t e : "P " in a s s e m b ly lin e p o s it io n
in d ic a t e s "L e a d F r e e "
A S S E M B L Y
W
-
L O
T C O D E
C
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
9
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IRL60B216
Qualification Information†
Qualification Level
Industrial
(per JEDEC JESD47F) ††
TO-220
N/A
Yes
Moisture Sensitivity Level
RoHS Compliant
†
Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
†† Applicable version of JEDEC standard at the time of product release.
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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