IRLR3636 [INFINEON]
The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. ;
| 型号： | IRLR3636 |
| 厂家： | 
Infineon |
| 描述： | The StrongIRFET™ power MOSFET family is optimized for low RDS(on) and high current capability. The devices are ideal for low frequency applications requiring performance and ruggedness. The comprehensive portfolio addresses a broad range of applications including DC motors, battery management systems, inverters, and DC-DC converters. |
| 文件： | 总11页 (文件大小：393K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 96224
IRLR3636PbF
IRLU3636PbF
HEXFET® Power MOSFET
Applications
l DC Motor Drive
l High Efficiency Synchronous Rectification in SMPS
l Uninterruptible Power Supply
l High Speed Power Switching
l Hard Switched and High Frequency Circuits
D
S
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
ID (Package Limited)
60V
5.4m
6.8m
99A
G
Benefits
50A
l Optimized for Logic Level Drive
l Very Low RDS(ON) at 4.5V VGS
l Superior R*Q at 4.5V VGS
l Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
D
l Fully Characterized Capacitance and Avalanche
SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
S
S
D
G
G
D-Pak
I-Pak
IRLU3636PbF
IRLR3636PbF
G
D
S
Gate
Drain
Source
Absolute Maximum Ratings
Symbol
Parameter
Max.
99
Units
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Continuous Drain Current, VGS @ 10V (Silicon Limited)
70
A
Continuous Drain Current, VGS @ 10V (Package Limited)
Pulsed Drain Current
50
396
143
0.95
±16
22
PD @TC = 25°C
W
Maximum Power Dissipation
Linear Derating Factor
W/°C
V
VGS
Gate-to-Source Voltage
Peak Diode Recovery
dv/dt
TJ
V/ns
Operating Junction and
-55 to + 175
TSTG
°C
Storage Temperature Range
Soldering Temperature, for 10 seconds
300 (1.6mm from case)
Avalanche Characteristics
Single Pulse Avalanche Energy
EAS (Thermally limited)
170
mJ
A
Avalanche Current
IAR
See Fig.14, 15, 22a, 22b
Repetitive Avalanche Energy
EAR
mJ
Thermal Resistance
Symbol
Parameter
Typ.
–––
–––
–––
Max.
1.05
50
Units
RθJC
Junction-to-Case
RθJA
RθJA
Junction-to-Ambient (PCB Mount)
Junction-to-Ambient
°C/W
110
www.irf.com
1
02/06/09
IRLR/U3636PbF
Static @ TJ = 25°C (unless otherwise specified)
Symbol
V(BR)DSS
Parameter
Drain-to-Source Breakdown Voltage
Min. Typ. Max. Units
60 ––– –––
––– 0.07 ––– V/°C Reference to 25°C, ID = 5mA
Conditions
VGS = 0V, ID = 250µA
V
∆V(BR)DSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
–––
1.0
5.4
6.6
6.8
8.3
2.5
20
VGS = 10V, ID = 50A
VGS = 4.5V, ID = 50A
VDS = VGS, ID = 100µA
RDS(on)
Static Drain-to-Source On-Resistance
m
Ω
VGS(th)
IDSS
Gate Threshold Voltage
–––
V
Drain-to-Source Leakage Current
––– –––
VDS = 60V, VGS = 0V
VDS = 60V, VGS = 0V, TJ = 125°C
VGS = 16V
µA
––– ––– 250
––– ––– 100
––– ––– -100
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
nA
VGS = -16V
RG(int)
–––
0.6
–––
Ω
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Parameter
Forward Transconductance
Min. Typ. Max. Units
Conditions
VDS = 25V, ID = 50A
31
––– –––
S
Qg
Total Gate Charge
–––
–––
–––
–––
–––
33
11
15
18
45
49
ID = 50A
Qgs
Qgd
Qsync
td(on)
tr
Gate-to-Source Charge
–––
–––
–––
–––
VDS = 30V
nC
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
VGS = 4.5V
ID = 50A, VDS =0V, VGS = 4.5V
VDD = 39V
Turn-On Delay Time
Rise Time
––– 216 –––
ID = 50A
ns
td(off)
tf
Turn-Off Delay Time
–––
–––
43
69
–––
–––
RG = 7.5 Ω
VGS = 4.5V
Fall Time
Ciss
Coss
Crss
Input Capacitance
––– 3779 –––
––– 332 –––
––– 163 –––
––– 437 –––
––– 636 –––
V
GS = 0V
Output Capacitance
VDS = 50V
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
ƒ = 1.0MHz
pF
Coss eff. (ER)
oss eff. (TR)
V
GS = 0V, VDS = 0V to 48V ,See Fig.11
GS = 0V, VDS = 0V to 48V
C
V
Diode Characteristics
Symbol
Parameter
Continuous Source Current
Min. Typ. Max. Units
Conditions
MOSFET symbol
D
IS
––– ––– 99
A
(Body Diode)
showing the
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 396
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
––– –––
1.3
–––
–––
–––
–––
–––
V
TJ = 25°C, IS = 50A, VGS = 0V
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
TJ = 25°C
VR = 51V,
–––
–––
–––
–––
–––
27
32
31
43
2.1
ns
IF = 50A
di/dt = 100A/µs
Qrr
Reverse Recovery Charge
nC
A
IRRM
ton
Reverse Recovery Current
Forward Turn-On Time
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
Notes:
ꢀ Pulse width ≤ 400µs; duty cycle ≤ 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
Calcuted continuous current based on maximum allowable junction
temperature Bond wire current limit is 50A. Note that current
limitation arising from heating of the device leds may occur with
some lead mounting arrangements.
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.136 mH
RG = 25Ω, IAS = 50A, VGS =10V. Part not recommended for use
above this value .
as Coss while VDS is rising from 0 to 80% VDSS
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS
When mounted on 1" square PCB (FR-4 or G-10 Material). For
recommended footprint and soldering techniquea refer to applocation
note # AN- 994 echniques refer to application note #AN-994.
Rθ is measured at TJ approximately 90°C.
.
.
ISD ≤ 50A, di/dt ≤ 1109 A/µs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
2
www.irf.com
IRLR/U3636PbF
1000
100
10
1000
100
10
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
VGS
15V
10V
4.5V
4.0V
3.5V
3.3V
3.0V
2.7V
TOP
TOP
BOTTOM
BOTTOM
2.7V
2.7V
60µs PULSE WIDTH
1
60µs PULSE WIDTH
Tj = 175°C
≤
≤
Tj = 25°C
1
0.1
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
1000
100
10
2.5
2.0
1.5
1.0
0.5
I
= 50A
D
V
= 10V
GS
T
= 175°C
J
T
= 25°C
J
1
V
= 25V
DS
≤
60µs PULSE WIDTH
0.1
1
2
3
4
5
6
7
-60 -40 -20 0 20 40 60 80 100120140160180
, Junction Temperature (°C)
T
J
V
, Gate-to-Source Voltage (V)
GS
Fig 4. Normalized On-Resistance vs. Temperature
Fig 3. Typical Transfer Characteristics
5.0
100000
10000
1000
V
= 0V,
= C
f = 1 MHZ
GS
I = 50A
D
V
= 48V
C
C
C
+ C , C
SHORTED
ds
DS
VDS= 30V
= 12V
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
iss
gs
gd
= C
rss
oss
gd
V
DS
= C + C
ds
gd
C
iss
C
oss
C
rss
100
0
5
10 15 20 25 30 35 40
Q , Total Gate Charge (nC)
1
10
, Drain-to-Source Voltage (V)
100
V
G
DS
Fig 5. Typical Capacitance vs. Drain-to-Source Voltage
Fig 6. Typical Gate Charge vs. Gate-to-Source Voltage
www.irf.com
3
IRLR/U3636PbF
1000
100
10
1000
OPERATION IN THIS AREA LIMITED BY R (on)
DS
T
= 175°C
J
100µsec
100
10
1
T
= 25°C
LIMITED BY PACKAGE
J
1msec
10msec
1
DC
Tc = 25°C
Tj = 175°C
Single Pulse
V
= 0V
1.6
GS
0.1
0.1
0.1
1
10
100
0.1
0.4
V
0.7
1
1.3
1.9
V
, Drain-to-Source Voltage (V)
, Source-to-Drain Voltage (V)
DS
SD
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
80
75
70
65
60
55
50
110
Id = 5mA
100
90
80
70
60
50
40
30
20
10
0
Limited By Package
-60 -40 -20 0 20 40 60 80 100120140160180
25
50
75
100
125
150
175
T
, Temperature ( °C )
T
, Case Temperature (°C)
J
C
Fig 9. Maximum Drain Current vs.
Fig 10. Drain-to-Source Breakdown Voltage
Case Temperature
0.8
800
I
D
5.69A
10.64A
700
600
500
400
300
200
100
0
TOP
0.6
0.4
0.2
0.0
BOTTOM 50A
0
5 10 15 20 25 30 35 40 45 50 55 60 65
Drain-to-Source Voltage (V)
25
50
75
100
125
150
175
Starting T , Junction Temperature (°C)
J
V
DS,
Fig 11. Typical COSS Stored Energy
Fig 12. Maximum Avalanche Energy vs. DrainCurrent
4
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IRLR/U3636PbF
10
1
D = 0.50
0.20
0.10
0.05
R1
R1
R2
R2
R3
R3
R4
R4
Ri (°C/W) τi (sec)
0.1
0.02028
0.000011
τ
τ
J τJ
τ
Cτ
0.02
0.01
0.29406
0.000158
1τ1
Ci= τi/Ri
τ
τ
τ
2 τ2
3τ3
4τ4
0.49179 0.001393
0.24336 0.00725
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
1E-006
1E-005
0.0001
0.001
0.01
0.1
t
, Rectangular Pulse Duration (sec)
1
Fig 13. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
100
10
Duty Cycle = Single Pulse
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Tj = 150°C and
Tstart =25°C (Single Pulse)
0.01
0.05
0.10
1
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ∆Τj = 25°C and
Tstart = 150°C.
0.1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 14. Typical Avalanche Current vs.Pulsewidth
200
150
100
50
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
TOP
BOTTOM 1.0% Duty Cycle
= 50A
Single Pulse
I
D
6. Iav = Allowable avalanche current.
7. ∆T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
0
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
25
50
75
100
125
150
175
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Starting T , Junction Temperature (°C)
J
Fig 15. Maximum Avalanche Energy vs. Temperature
www.irf.com
5
IRLR/U3636PbF
3.0
2.5
2.0
1.5
14
12
10
8
I = 20A
F
V
= 51V
R
T = 25°C
J
T = 125°C
J
6
I
= 100µA
D
ID = 250µA
1.0
0.5
0.0
I
= 1.0mA
4
D
ID = 1.0A
2
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
400
600
800
1000
T , Temperature ( °C )
di /dt (A/µs)
J
F
Fig. 17 - Typical Recovery Current vs. dif/dt
Fig 16. Threshold Voltage vs. Temperature
350
16
I = 20A
I = 30A
F
F
14
12
10
8
300
250
200
150
100
50
V
= 51V
V
= 51V
R
R
T = 25°C
T = 25°C
J
J
T = 125°C
J
T = 125°C
J
6
4
2
0
0
0
200
400
600
800
1000
0
200
400
600
800
1000
di /dt (A/µs)
di /dt (A/µs)
F
F
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig. 19 - Typical Stored Charge vs. dif/dt
350
I = 30A
F
300
250
200
150
100
50
V
= 51V
R
T = 25°C
J
T = 125°C
J
0
0
200
400
600
800
1000
di /dt (A/µs)
F
Fig. 20 - Typical Stored Charge vs. dif/dt
6
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IRLR/U3636PbF
Driver Gate Drive
P.W.
P.W.
Period
D.U.T
Period
D =
+
*
=10V
V
GS
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
-
D.U.T. I Waveform
SD
+
-
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
-
+
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
VDD
Re-Applied
Voltage
• dv/dt controlled by RG
RG
+
-
Body Diode
Forward Drop
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
Inductor Current
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 21. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V
(BR)DSS
15V
t
p
DRIVER
+
L
V
DS
D.U.T
AS
R
G
V
DD
-
I
A
V
2
GS
Ω
0.01
t
p
I
AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
V
DS
90%
VGS
D.U.T.
RG
+
VDD
-
VGS
10%
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
V
GS
t
t
r
t
t
f
d(on)
d(off)
Fig 23a. Switching Time Test Circuit
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
.2µF
12V
.3µF
+
V
DS
D.U.T.
-
Vgs(th)
V
GS
3mA
I
I
D
G
Qgs1
Qgs2
Qgd
Qgodr
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
Fig 24b. Gate Charge Waveform
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7
IRLR/U3636PbF
D-Pak (TO-252AA) Package Outline
Dimensions are shown in millimeters (inches)
D-Pak (TO-252AA) Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
8
www.irf.com
IRLR/U3636PbF
I-Pak (TO-251AA) Package Outline
Dimensions are shown in millimeters (inches)
I-Pak (TO-251AA) Part Marking Information
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
www.irf.com
9
IRLR/U3636PbF
D-Pak (TO-252AA) Tape & Reel Information
Dimensions are shown in millimeters (inches)
TR
TRL
TRR
16.3 ( .641 )
15.7 ( .619 )
16.3 ( .641 )
15.7 ( .619 )
12.1 ( .476 )
11.9 ( .469 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
FEED DIRECTION
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
13 INCH
16 mm
NOTES :
1. OUTLINE CONFORMS TO EIA-481.
Note: For the most current drawing please refer to IR website at http://www.irf.com/package/
Data and specifications subject to change without notice.
This product has been designed and qualified for the Industrial market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 02/2009
10
www.irf.com
IMPORTANT NOTICE
The information given in this document shall in no For further information on the product, technology,
event be regarded as a guarantee of conditions or delivery terms and conditions and prices please
characteristics (“Beschaffenheitsgarantie”) .
contact your nearest Infineon Technologies office
(www.infineon.com).
With respect to any examples, hints or any typical
values stated herein and/or any information
regarding the application of the product, Infineon
Technologies hereby disclaims any and all
warranties and liabilities of any kind, including
without limitation warranties of non-infringement
of intellectual property rights of any third party.
WARNINGS
Due to technical requirements products may
contain dangerous substances. For information on
the types in question please contact your nearest
Infineon Technologies office.
In addition, any information given in this document
is subject to customer’s compliance with its
obligations stated in this document and any
applicable legal requirements, norms and
standards concerning customer’s products and any
use of the product of Infineon Technologies in
customer’s applications.
Except as otherwise explicitly approved by Infineon
Technologies in a written document signed by
authorized
representatives
of
Infineon
Technologies, Infineon Technologies’ products may
not be used in any applications where a failure of
the product or any consequences of the use thereof
can reasonably be expected to result in personal
injury.
The data contained in this document is exclusively
intended for technically trained staff. It is the
responsibility of customer’s technical departments
to evaluate the suitability of the product for the
intended application and the completeness of the
product information given in this document with
respect to such application.
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