IRLU3103PBF [INFINEON]

Power Field-Effect Transistor, 20A I(D), 30V, 0.019ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-251AA, LEAD FREE, PLASTIC, IPAK-3;


型号：	IRLU3103PBF
厂家：	Infineon
描述：	Power Field-Effect Transistor, 20A I(D), 30V, 0.019ohm, 1-Element, N-Channel, Silicon, Metal-oxide Semiconductor FET, TO-251AA, LEAD FREE, PLASTIC, IPAK-3 晶体晶体管功率场效应晶体管开关脉冲局域网
文件：	总10页 (文件大小：167K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

PD - 9.1333B

IRLR/U3103

PRELIMINARY

HEXFET^®Power MOSFET

l Logic-Level Gate Drive

l Ultra Low On-Resistance

l Surface Mount (IRLR3103)

l Straight Lead (IRLU3103)

l Advanced Process Technology

l Fast Switching

V_DSS= 30V

R_DS(on)= 0.019Ω

l Fully Avalanche Rated

I_D= 46Aꢀ

Description

Fifth Generation HEXFETs from International Rectifier

utilize advanced processing techniques to achieve the

lowestpossibleon-resistancepersiliconarea. Thisbenefit,

combined with the fast switching speed and ruggedized

device design that HEXFET Power MOSFETs are well

knownfor, providesthedesignerwithanextremelyefficient

device for use in a wide variety of applications.

D -PA K

I-PAK

T O -2 52 A A

TO -2 5 1 AA

The D-PAK is designed for surface mounting using vapor

phase, infrared, orwavesolderingtechniques. Thestraight

lead version (IRFU series) is for through-hole mounting

applications. Power dissipation levels up to 1.5 watts are

possible in typical surface mount applications.

Absolute Maximum Ratings

Parameter

Max.

Units

I_D@ T_C= 25°C

I_D@ T_C= 100°C

I_DM

Continuous Drain Current, V_GS@ 10V

Pulsed Drain Current

46ꢀ

29ꢀ

220

P_D@T_C= 25°C

Power Dissipation

W/°C

Linear Derating Factor

0.56

±16

240

V_GS

E_AS

I_AR

Gate-to-Source Voltage

Single Pulse Avalanche Energy

Avalanche Current

E_AR

dv/dt

T_J

Repetitive Avalanche Energy

Peak Diode Recovery dv/dt

Operating Junction and

6.9

V/ns

2.0

-55 to + 150

T_STG

Storage Temperature Range

Soldering Temperature, for 10 seconds

°C

300 (1.6mm from case)

Thermal Resistance

Parameter

Junction-to-Case

Min.

––––

Typ.

––––

Max.

1.8

Units

R_θJC

R_θJA

Junction-to-Ambient (PCB mount)**

Junction-to-Ambient

°C/W

110

** When mounted on 1" square PCB (FR-4 or G-10 Material ) .

For recommended footprint and soldering techniques refer to application note #AN-994

8/7/96

IRLR/U3103

Electrical Characteristics @ T_J= 25°C (unless otherwise specified)

Parameter

Min. Typ. Max. Units

30 ––– –––

Conditions

V_GS= 0V, I_D= 250µA

V_(BR)DSS

Drain-to-Source Breakdown Voltage

∆V_(BR)DSS/∆T_JBreakdown Voltage Temp. Coefficient ––– 0.037 ––– V/°C Reference to 25°C, I_D= 1mA

––– ––– 0.019

––– ––– 0.024

V_GS= 10V, I_D= 28A

V_GS= 4.5V, I_D= 23A

V_DS= V_GS, I_D= 250µA

V_DS= 25V, I_D= 34A

V_DS= 30V, V_GS= 0V

V_DS= 24V, V_GS= 0V, T_J= 125°C

V_GS= 16V

Ω

R_DS(on)

Static Drain-to-Source On-Resistance

V_GS(th)

g_fs

Gate Threshold Voltage

1.0

––– –––

Forward Transconductance

––– ––– 25

––– ––– 250

––– ––– 100

––– ––– -100

––– ––– 50

––– ––– 14

––– ––– 28

I_DSS

Drain-to-Source Leakage Current

µA

Gate-to-Source Forward Leakage

Gate-to-Source Reverse Leakage

Total Gate Charge

I_GSS

V_GS= -16V

Q_g

I_D= 34A

Q_gs

Q_gd

t_d(on)

t_r

Gate-to-Source Charge

Gate-to-Drain ("Miller") Charge

Turn-On Delay Time

Rise Time

nC V_DS= 24V

V_GS= 4.5V, See Fig. 6 and 13

–––

9.0 –––

V_DD= 15V

––– 210 –––

I_D= 34A

t_d(off)

t_f

Turn-Off Delay Time

Fall Time

–––

20 –––

54 –––

R_G= 3.4Ω, V_GS= 4.5V

R_D= 0.43Ω, See Fig. 10

Between lead,

L_D

L_S

Internal Drain Inductance

Internal Source Inductance

––– 4.5 –––

––– 7.5 –––

6mm (0.25in.)

from package

and center of die contact

V_GS= 0V

C_iss

C_oss

C_rss

Input Capacitance

––– 1600 –––

––– 640 –––

––– 320 –––

Output Capacitance

V_DS= 25V

Reverse Transfer Capacitance

ƒ = 1.0MHz, See Fig. 5

Source-Drain Ratings and Characteristics

Parameter

Continuous Source Current

(Body Diode)

Min. Typ. Max. Units

Conditions

MOSFET symbol

I_S

––– ––– 46ꢀ

showing the

I_SM

Pulsed Source Current

(Body Diode)

integral reverse

––– ––– 220ꢀ

p-n junction diode.

T_J= 25°C, I_S= 28A, V_GS= 0V

T_J= 25°C, I_F= 34A

V_SD

t_rr

Diode Forward Voltage

Reverse Recovery Time

Reverse RecoveryCharge

Forward Turn-On Time

––– ––– 1.3

––– 81 120

––– 210 310

Q_rr

t_on

nC di/dt = 100A/µs

Intrinsic turn-on time is negligible (turn-on is dominated by L_S+L_D)

Specification changes

Rev. #

Parameters Old spec. New spec.

Comments

Removed V_GS(th)Max. Specification

Decrease V_GSMax. Specification

Revision Date

5/1/96

V_GS(th)(Max.)

V_GS(Max.)

2.5V

±20

No spec.

±16

5/1/96

Notes:

Repetitive rating; pulse width limited by

max. junction temperature. ( See fig. 11 )

V_DD= 15V, starting T_J= 25°C, L = 300µH

Pulse width ≤ 300µs; duty cycle ≤ 2%.

ꢀ Caculated continuous current based on maximum allowable junction temperature;

Package limitation current = 20A.

R_G= 25Ω, I_AS= 34A. (See Figure 12)

I_SD≤ 34A, di/dt ≤ 140A/µs, V_DD≤ V_(BR)DSS

T_J≤ 150°C

This is applied for I-PAK, L_Sof D-PAK is measured between lead and center of

die contact

Uses IRL3103 data and test conditions.

IRLR/U3103

1 0 0 0

1 0 0

1 0

1 0 0 0

1 0 0

1 0

VGS

15V

VGS

15V

TOP

TO P

12V

10V

8.0V

6.0V

4.0V

3.0V

8.0V

6.0V

4.0V

3.0V

BOTT OM 2.5V

BOTTOM 2.5V

2.5V

20µs PULSE W IDTH

= 25°C

= 150°C

0.1

1 0

1 0 0

0.1

1 0

1 0 0

V_{D S}, Drain-to-Source Voltage (V)

Fig 1. Typical Output Characteristics,

Fig 2. Typical Output Characteristics,

T_J= 25^oC

T_J= 150^oC

2. 0

1 0 0 0

1 0 0

1 0

= 46A

1. 5

1. 0

0. 5

0. 0

= 25°C

= 150°C

= 15V

= 10V

20µs P ULS E W IDTH

_{9. 0}A

- 6 0

- 4 0

- 2 0

2 0

4 0

6 0

8 0

1 0 0 1 2 0 1 4 0 1 6 0

2. 0

3. 0

4. 0

5. 0

6. 0

7. 0

8. 0

T_J, Junction Temperature (°C)

V_{G S}, Gate-to -Source Volta ge (V)

Fig 4. Normalized On-Resistance

Fig 3. Typical Transfer Characteristics

Vs. Temperature

IRLR/U3103

1 5

1 2

3 2 0 0

= 34A

= 0V ,

f = 1MH z

iss

= C

+ C

SHORTED

g d

= 24V

= 15V

2 8 0 0

2 4 0 0

2 0 0 0

1 6 0 0

1 2 0 0

8 0 0

rss

oss

iss

o s s

rs s

4 0 0

FOR TEST CIRCUIT

SEE FIGURE 13

1 0

2 0

3 0

4 0

5 0

6 0

7 0

1 0

1 0 0

V_{D S}, Drain-to-Source Voltage (V)

Q _G, Total Gate Charge (nC)

Fig 5. Typical Capacitance Vs.

Fig 6. Typical Gate Charge Vs.

Drain-to-Source Voltage

Gate-to-Source Voltage

1 0 0 0

1 0 0

1 0

OPE RATION IN THIS A RE A LIMITE D

BY R

D S(o n)

10µs

1 0 0

1 00µs

= 150°C

1m s

= 25°C

10m s

= 25°C

= 150°C

= 0V

S ingle Pulse

1 0

0. 4

0. 8

1. 2

1. 6

2. 0

2. 4

2. 8

1 0

1 0 0

V_SD, Source-to-Drain Voltage (V)

, Drain-to-Source Voltage (V)

Fig 7. Typical Source-Drain Diode

Fig 8. Maximum Safe Operating Area

Forward Voltage

IRLR/U3103

5 0

4 0

3 0

2 0

1 0

R_D

V_DS

L IM IT ED B Y PAC K AG E

V_GS

D.U.T.

R_G

⁺V_DD

4.5V

Pulse Width ≤ 1 µs

Duty Factor ≤ 0.1 %

Fig 10a. Switching Time Test Circuit

90%

2 5

5 0

7 5

1 0 0

1 2 5

1 5 0

T_C, Case Temperature (°C)

10%

Fig 9. Maximum Drain Current Vs.

d(on)

d(off)

Case Temperature

Fig 10b. Switching Time Waveforms

1 0

D = 0.50

0 .2 0

0 .1 0

0 .0 5

D M

0.1

0 .0 2

0 .0 1

S IN GL E PU L SE

(T HE RM A L R ESPO NS E)

N o te s:

1 . D u ty fa cto r D

/ t

2. Pe a k T

+ T

t h JC C

0.01

0. 00001

0. 0001

0. 001

0. 01

0.1

t₁, Rectangular Pulse Duration (sec)

Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case

IRLR/U3103

5 0 0

4 0 0

3 0 0

2 0 0

1 0 0

TOP

15A

21A

B OTTOM 34A

D.U.T.

4.5 V

0.01Ω

Fig 12a. Unclamped Inductive Test Circuit

= 15V

5 0

D D

(BR)DSS

1 5 0

2 5

7 5

1 0 0

1 2 5

Starting T_J, Junction Temperature (°C)

Fig 12c. Maximum Avalanche Energy

Vs. Drain Current

Fig 12b. Unclamped Inductive Waveforms

Current Regulator

Same Type as D.U.T.

50KΩ

.2µF

12V

.3µF

4.5 V

D.U.T.

3mA

Charge

Current Sampling Resistors

Fig 13a. Basic Gate Charge Waveform

Fig 13b. Gate Charge Test Circuit

IRLR/U3103

Peak Diode Recovery dv/dt Test Circuit

Circuit Layout Considerations

• Low Stray Inductance

• Ground Plane

• Low Leakage Inductance

Current Transformer

• dv/dt controlled by R_G

• Driver same type as D.U.T.

• I_SDcontrolled by Duty Factor "D"

• D.U.T. - Device Under Test

V_DD

Driver Gate Drive

P.W.

Period

D =

=10V

D.U.T. I Waveform

Reverse

Recovery

Current

Body Diode Forward

Current

di/dt

D.U.T. V Waveform

Diode Recovery

dv/dt

Re-Applied

Voltage

Body Diode

Forward Drop

Inductor Curent

Ripple ≤ 5%

* V_GS= 5V for Logic Level Devices

Fig 13. For N-Channel HEXFETS

IRLR/U3103

Package Outline

TO-252AA Outline

Dimensions are shown in millimeters (inches)

2.38 (.094)

2.19 (.086)

6.73 (.265)

6.35 (.250)

1.14 (.045)

0.89 (.035)

- A -

1.27 (.050)

0.88 (.035)

5.46 (.215)

5.21 (.205)

0.58 (.023)

0.46 (.018)

6.45 (.245)

5.68 (.224)

6.22 (.245)

5.97 (.235)

10.42 (.410)

9.40 (.370)

1.02 (.040)

1.64 (.025)

LEAD ASSIGNMENTS

1 - GATE

0.51 (.020)

MIN.

2 - DRAIN

- B -

3 - SOUR CE

4 - DRAIN

1.52 (.060)

1.15 (.045)

0.89 (.035)

0.64 (.025)

0.58 (.023)

0.46 (.018)

1.14 (.045)

0.76 (.030)

0.25 (.010)

M A M B

NOTES:

2.28 (.090)

DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.

CONTROLLING DIMENSION : INCH.

4.57 (.180)

CONFORMS TO JEDEC OUTLINE TO-252AA.

DIMENSIONS SHOWN ARE BEFORE SOLD ER DIP,

SOLDER DIP MAX. +0.16 (.006).

Part Marking Information

TO-252AA (D-PARK)

EXAM PLE : THIS IS AN IRFR120

W ITH ASSEM BLY

INTERNATIONAL

RECTIFIER

LOGO

LOT CODE 9U1P

FIRST PORTION

OF PART NUMBER

IRFR

120

ASSEM BLY

SECOND PORTION

OF PART NUMBER

LOT

CODE

IRLR/U3103

Package Outline

TO-251AA Outline

Dimensions are shown in millimeters (inches)

6.73 (.265)

6.35 (.250)

2.38 (.094)

2.19 (.086)

- A -

0.58 (.023)

0.46 (.018)

1.27 (.050)

0.88 (.035)

5.46 (.215)

5.21 (.205)

LEAD ASSIGNMENTS

1 - GATE

2 - DRAIN

3 - SOURCE

4 - DRAIN

6.45 (.245)

5.68 (.224)

6.22 (.245)

5.97 (.235)

1.52 (.060)

1.15 (.045)

- B -

NOTES:

DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.

CONTROLLIN G DIMENSION : INCH.

2.28 (.090)

1.91 (.075)

9.65 (.380)

8.89 (.350)

CONFORMS TO JEDEC OUTLINE TO-252AA.

DIMENSIONS SHOW N ARE BEFORE SOLDER DIP,

SOLDER DIP MAX. +0.16 (.006).

1.14 (.045)

0.76 (.030)

1.14 (.045)

0.89 (.035)

0.64 (.025)

0.25 (.010)

M A M B

0.58 (.023)

0.46 (.018)

2.28 (.090)

Part Marking Information

TO-251AA (I-PARK)

EXAM PLE : THIS IS AN IRFU120

W ITH ASSEM BLY

INTERNATIONAL

RECTIFIER

LOGO

LOT CODE 9U1P

FIRST PORTION

OF PART NUM BER

IRFU

120

SECOND PORTION

OF PART NUMBER

ASSEMBLY

LOT

CODE

IRLR/U3103

Tape & Reel Information

TO-252AA

Dimensions are shown in millimeters (inches)

TR L

T R R

1 6 .3 ( .6 4 1 )

1 5 .7 ( .6 1 9 )

16 .3 ( .6 4 1

15 .7 ( .6 1 9

)

1 2.1 ( .47 6

1 1.9 ( .46 9

)

8 .1 ( .3 18

7 .9 ( .3 12

)

F EE D D IR EC T IO N

FE ED D IR EC TIO N

N O TE S :

1 . C O N T R O LL IN G D IM EN SIO N : M ILL IM E TE R .

2 . AL L D IM E N SIO N S A R E SH O W N IN M IL LIM ET ER S ( IN C H E S ).

3 . O U T L IN E C O N F O R M S T O EIA-4 8 1 & EIA-5 41 .

1 3 IN C H

16 m m

N O T ES :

1 . O U T LIN E C O N F O R M S T O EIA-4 81 .

WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331

EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020

IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897

IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590

IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111

IR FAR EAST: K&H Bldg., 2F, 3-30-4 Nishi-Ikeburo 3-Chome, Toshima-Ki, Tokyo Japan 171 Tel: 81 3 3983 0086

IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371

http://www.irf.com/

Data and specifications subject to change without notice.

8/96

IRLU3103PBF [INFINEON]

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