IRLU4343PBF [INFINEON]

DIGITAL AUDIO MOSFET; 数字音频MOSFET
IRLU4343PBF
型号: IRLU4343PBF
厂家: Infineon    Infineon
描述:

DIGITAL AUDIO MOSFET
数字音频MOSFET

文件: 总11页 (文件大小:303K)
中文:  中文翻译
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PD - 95394A  
IRLR4343PbF  
DIGITAL AUDIO MOSFET  
IRLU4343PbF  
IRLU4343-701PbF  
Features  
l Advanced Process Technology  
Key Parameters  
l Key Parameters Optimized for Class-D Audio  
Amplifier Applications  
l Low RDSON for Improved Efficiency  
l Low Qg and Qsw for Better THD and Improved  
Efficiency  
l Low Qrr for Better THD and Lower EMI  
l 175°C Operating Junction Temperature for  
Ruggedness  
VDS  
55  
V
m
RDS(ON) typ. @ VGS = 10V  
RDS(ON) typ. @ VGS = 4.5V  
Qg typ.  
42  
m
57  
28  
nC  
°C  
TJ max  
175  
l Repetitive Avalanche Capability for Robustness and  
Reliability  
l Multiple Package Options  
D
l Lead-Free  
D-Pak  
IRLR4343  
I-Pak  
IRLU4343  
G
I-Pak Leadform 701  
IRLU4343-701  
S
Refer to page 10 for package outline  
Description  
This Digital Audio HEXFET® is specifically designed for Class-D audio amplifier applications. This MosFET utilizes the latest  
processing techniques to achieve low on-resistance per silicon area. Furthermore, Gate charge, body-diode reverse recovery  
and internal Gate resistance are optimized to improve key Class-D audio amplifier performance factors such as efficiency, THD  
and EMI. Additional features of this MosFET are 175°C operating junction temperature and repetitive avalanche capability.  
These features combine to make this MosFET a highly efficient, robust and reliable device for Class-D audio amplifier  
applications.  
Absolute Maximum Ratings  
Max.  
Parameter  
Units  
VDS  
55  
Drain-to-Source Voltage  
V
VGS  
±20  
Gate-to-Source Voltage  
Continuous Drain Current, VGS @ 10V  
Continuous Drain Current, VGS @ 10V  
Pulsed Drain Current  
ID @ TC = 25°C  
ID @ TC = 100°C  
IDM  
26  
A
19  
80  
79  
PD @TC = 25°C  
PD @TC = 100°C  
Power Dissipation  
W
39  
Power Dissipation  
0.53  
Linear Derating Factor  
W/°C  
°C  
TJ  
-40 to + 175  
Operating Junction and  
Storage Temperature Range  
Clamping Pressure  
TSTG  
–––  
N
Thermal Resistance  
Parameter  
Typ.  
–––  
–––  
–––  
Max.  
1.9  
50  
Units  
RθJC  
Junction-to-Case  
Rθ  
Junction-to-Ambient (PCB Mounted)  
Junction-to-Ambient (free air)  
°C/W  
JA  
RθJA  
110  
Notes  through Šare on page 10  
www.irf.com  
1
12/8/04  
IRLR/U4343PbF & IRLU4343-701PbF  
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)  
Conditions  
VGS = 0V, ID = 250µA  
Reference to 25°C, I = 1mA  
Parameter  
Min. Typ. Max. Units  
BVDSS  
Drain-to-Source Breakdown Voltage  
Breakdown Voltage Temp. Coefficient  
Static Drain-to-Source On-Resistance  
55  
–––  
15  
–––  
V
∆ΒVDSS/TJ  
RDS(on)  
–––  
–––  
–––  
1.0  
––– mV/°C  
D
V
GS = 10V, ID = 4.7A  
GS = 4.5V, ID = 3.8A  
42  
50  
65  
m
V
57  
VDS = VGS, ID = 250µA  
VGS(th)  
Gate Threshold Voltage  
–––  
-4.4  
–––  
–––  
–––  
–––  
–––  
28  
–––  
V
VGS(th)/TJ  
IDSS  
Gate Threshold Voltage Coefficient  
Drain-to-Source Leakage Current  
–––  
–––  
–––  
–––  
–––  
8.8  
––– mV/°C  
VDS = 55V, VGS = 0V  
2.0  
25  
µA  
nA  
S
V
V
V
V
V
DS = 55V, VGS = 0V, TJ = 125°C  
GS = 20V  
IGSS  
Gate-to-Source Forward Leakage  
Gate-to-Source Reverse Leakage  
Forward Transconductance  
Total Gate Charge  
100  
-100  
–––  
42  
GS = -20V  
DS = 25V, ID = 19A  
DS = 44V  
gfs  
Qg  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
Qgs  
Qgd  
Qgodr  
td(on)  
tr  
VGS = 10V  
ID = 19A  
Pre-Vth Gate-to-Source Charge  
Gate-to-Drain Charge  
Gate Charge Overdrive  
Turn-On Delay Time  
3.5  
9.5  
15  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
–––  
See Fig. 6 and 19  
VDD = 28V, VGS = 10V  
ID = 19A  
5.7  
19  
Rise Time  
td(off)  
tf  
RG = 2.5Ω  
Turn-Off Delay Time  
23  
ns  
Fall Time  
5.3  
740  
150  
59  
VGS = 0V  
Ciss  
Coss  
Crss  
Coss  
LD  
Input Capacitance  
V
DS = 50V  
ƒ = 1.0MHz,  
GS = 0V, VDS = 0V to -44V  
Between lead,  
Output Capacitance  
pF  
See Fig.5  
Reverse Transfer Capacitance  
Effective Output Capacitance  
Internal Drain Inductance  
V
250  
4.5  
D
G
nH 6mm (0.25in.)  
from package  
S
LS  
Internal Source Inductance  
–––  
7.5  
–––  
and center of die contact  
Avalanche Characteristics  
Typ.  
Max.  
Parameter  
Units  
mJ  
A
EAS  
IAR  
–––  
160  
Single Pulse Avalanche Energy  
Avalanche Current  
See Fig. 14, 15, 17a, 17b  
EAR  
Repetitive Avalanche Energy  
mJ  
Diode Characteristics  
Conditions  
MOSFET symbol  
Parameter  
Continuous Source Current  
(Body Diode)  
Min. Typ. Max. Units  
IS @ TC = 25°C  
ISM  
–––  
–––  
26  
showing the  
A
integral reverse  
p-n junction diode.  
Pulsed Source Current  
(Body Diode)  
–––  
–––  
80  
TJ = 25°C, IS = 19A, VGS = 0V  
TJ = 25°C, IF = 19A  
VSD  
trr  
Diode Forward Voltage  
Reverse Recovery Time  
Reverse Recovery Charge  
–––  
–––  
–––  
–––  
52  
1.2  
78  
V
ns  
nC  
Qrr  
di/dt = 100A/µs  
100  
150  
2
www.irf.com  
IRLR/U4343PbF & IRLU4343-701PbF  
1000  
100  
10  
1000  
VGS  
15V  
10V  
8.0V  
4.5V  
3.5V  
3.0V  
2.5V  
2.3V  
VGS  
15V  
10V  
8.0V  
4.5V  
3.5V  
3.0V  
2.5V  
2.3V  
TOP  
TOP  
100  
10  
1
BOTTOM  
BOTTOM  
2.3V  
2.3V  
1
60µs PULSE WIDTH  
Tj = 175°C  
60µs PULSE WIDTH  
Tj = 25°C  
0.1  
0.1  
0.1  
1
10  
100  
0.1  
1
10  
100  
V
, Drain-to-Source Voltage (V)  
V
, Drain-to-Source Voltage (V)  
DS  
DS  
Fig 1. Typical Output Characteristics  
Fig 2. Typical Output Characteristics  
2.5  
2.0  
1.5  
1.0  
0.5  
1000.0  
I
= 19A  
D
V
= 10V  
GS  
T = 25°C  
J
100.0  
10.0  
1.0  
T
= 175°C  
J
V
= 30V  
DS  
60µs PULSE WIDTH  
0.1  
0
2
4
6
8
10  
-60 -40 -20  
T
0
20 40 60 80 100 120 140 160 180  
V
, Gate-to-Source Voltage (V)  
GS  
, Junction Temperature (°C)  
J
Fig 3. Typical Transfer Characteristics  
Fig 4. Normalized On-Resistance vs. Temperature  
10000  
1000  
100  
20  
V
= 0V,  
= C  
f = 1 MHZ  
GS  
I = 19A  
D
C
C
C
+ C , C  
SHORTED  
ds  
iss  
gs  
gd  
V
= 44V  
DS  
= C  
rss  
oss  
gd  
16  
12  
8
VDS= 28V  
VDS= 11V  
= C + C  
ds  
gd  
Ciss  
Coss  
Crss  
4
FOR TEST CIRCUIT  
SEE FIGURE 19  
0
10  
0
10  
20  
30  
40  
1
10  
, Drain-to-Source Voltage (V)  
100  
Q
Total Gate Charge (nC)  
G
V
DS  
Fig 5. Typical Capacitance vs.Drain-to-Source Voltage  
Fig 6. Typical Gate Charge vs.Gate-to-Source Voltage  
www.irf.com  
3
IRLR/U4343PbF & IRLU4343-701PbF  
1000  
100  
10  
1000.0  
100.0  
10.0  
1.0  
OPERATION IN THIS AREA  
LIMITED BY R  
(on)  
DS  
T = 175°C  
J
100µsec  
1msec  
T = 25°C  
J
Tc = 25°C  
Tj = 175°C  
Single Pulse  
V
= 0V  
1.6  
GS  
10msec  
100  
1
0.1  
0
1
10  
1000  
0.2  
0.4  
0.6  
0.8  
1.0  
1.2  
1.4  
1.8  
V
, Drain-toSource Voltage (V)  
V
, Source-to-Drain Voltage (V)  
DS  
SD  
Fig 7. Typical Source-Drain Diode Forward Voltage  
Fig 8. Maximum Safe Operating Area  
30  
2.0  
1.5  
1.0  
0.5  
25  
20  
15  
10  
5
I
= 250µA  
D
0
25  
50  
75  
100  
125  
150  
175  
-75 -50 -25  
0
25 50 75 100 125 150 175  
T
, Junction Temperature (°C)  
T , Temperature ( °C )  
J
J
Fig 10. Threshold Voltage vs. Temperature  
Fig 9. Maximum Drain Current vs. Case Temperature  
10  
1
D = 0.50  
0.20  
0.10  
R1  
R1  
R2  
R2  
Ri (°C/W) τi (sec)  
0.1  
0.05  
τ
J τJ  
τ
τ
Cτ  
1.359  
0.00135  
0.02  
0.01  
1 τ1  
Ci= τi/Ri  
τ
2τ2  
0.5409  
0.003643  
0.01  
Notes:  
1. Duty Factor D = t1/t2  
2. Peak Tj = P dm x Zthjc + Tc  
SINGLE PULSE  
( THERMAL RESPONSE )  
0.001  
1E-006  
1E-005  
0.0001  
0.001  
0.01  
0.1  
t
, Rectangular Pulse Duration (sec)  
1
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case  
4
www.irf.com  
IRLR/U4343PbF & IRLU4343-701PbF  
700  
200  
150  
100  
50  
I
I
= 19A  
D
D
TOP  
2.4A  
3.3A  
19A  
600  
500  
400  
300  
200  
100  
0
BOTTOM  
T
T
= 125°C  
= 25°C  
J
J
0
2.0  
4.0  
6.0  
8.0  
10.0  
25  
50  
75  
100  
125  
150  
175  
V
, Gate-to-Source Voltage (V)  
GS  
Starting T , Junction Temperature (°C)  
J
Fig 12. On-Resistance Vs. Gate Voltage  
Fig 13. Maximum Avalanche Energy Vs. Drain Current  
1000  
Duty Cycle = Single Pulse  
100  
Allowed avalanche Current vs  
avalanche pulsewidth, tav  
assuming Tj = 25°C due to  
avalanche losses. Note: In no  
case should Tj be allowed to  
exceed Tjmax  
0.01  
10  
0.05  
0.10  
1
0.1  
1.0E-06  
1.0E-05  
1.0E-04  
1.0E-03  
1.0E-02  
tav (sec)  
Fig 14. Typical Avalanche Current Vs.Pulsewidth  
Notes on Repetitive Avalanche Curves , Figures 14, 15:  
(For further info, see AN-1005 at www.irf.com)  
1. Avalanche failures assumption:  
Purely a thermal phenomenon and failure occurs at a  
temperature far in excess of Tjmax. This is validated for  
every part type.  
2. Safe operation in Avalanche is allowed as long asTjmax is  
not exceeded.  
3. Equation below based on circuit and waveforms shown in  
Figures 17a, 17b.  
180  
160  
140  
120  
100  
80  
TOP  
BOTTOM 1% Duty Cycle  
= 19A  
Single Pulse  
I
D
4. PD (ave) = Average power dissipation per single  
avalanche pulse.  
5. BV = Rated breakdown voltage (1.3 factor accounts for  
voltage increase during avalanche).  
60  
40  
6. Iav = Allowable avalanche current.  
7. T = Allowable rise in junction temperature, not to exceed  
Tjmax (assumed as 25°C in Figure 14, 15).  
tav = Average time in avalanche.  
D = Duty cycle in avalanche = tav ·f  
ZthJC(D, tav) = Transient thermal resistance, see figure 11)  
20  
0
25  
50  
75  
100  
125  
150  
175  
Starting T , Junction Temperature (°C)  
J
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC  
Iav = 2DT/ [1.3·BV·Zth]  
Fig 15. Maximum Avalanche Energy Vs. Temperature  
EAS (AR) = PD (ave)·tav  
www.irf.com  
5
IRLR/U4343PbF & IRLU4343-701PbF  
Driver Gate Drive  
P.W.  
Period  
D.U.T  
Period  
D =  
P.W.  
+
ƒ
-
*
=10V  
V
GS  
Circuit Layout Considerations  
Low Stray Inductance  
Ground Plane  
Low Leakage Inductance  
Current Transformer  
D.U.T. I Waveform  
SD  
+
‚
-
Reverse  
Recovery  
Current  
Body Diode Forward  
„
Current  
-
+
di/dt  
D.U.T. V Waveform  
DS  
Diode Recovery  
dv/dt  

V
DD  
VDD  
Re-Applied  
Voltage  
dv/dt controlled by RG  
RG  
+
-
Body Diode  
Forward Drop  
Driver same type as D.U.T.  
ISD controlled by Duty Factor "D"  
D.U.T. - Device Under Test  
Inductor  
Current  
I
SD  
Ripple  
5%  
* VGS = 5V for Logic Level Devices  
Fig 16. Peak Diode Recovery dv/dt Test Circuit for N-Channel  
HEXFET® Power MOSFETs  
15V  
LD  
VDS  
DRIVER  
+
L
V
DS  
+
-
VDD  
D.U.T  
AS  
R
G
V
DD  
-
D.U.T  
I
A
V
GS  
VGS  
0.01  
t
p
Pulse Width < 1µs  
Duty Factor < 0.1%  
Fig 17a. Unclamped Inductive Test Circuit  
Fig 18a. Switching Time Test Circuit  
VDS  
V
(BR)DSS  
t
p
90%  
10%  
VGS  
td(on)  
td(off)  
tr  
tf  
I
AS  
Fig 18b. Switching Time Waveforms  
Fig 17b. Unclamped Inductive Waveforms  
Id  
Vds  
Vgs  
L
VCC  
DUT  
Vgs(th)  
0
1K  
Qgs1  
Qgs2  
Qgd  
Qgodr  
Fig 19a. Gate Charge Test Circuit  
Fig 19b Gate Charge Waveform  
6
www.irf.com  
IRLR/U4343PbF & IRLU4343-701PbF  
D-Pak (TO-252AA) Package Outline  
Dimensions are shown in millimeters (inches)  
D-Pak (TO-252AA) Part Marking Information  
EXAMPLE: THIS IS AN IRFR120  
PART NUMBER  
WIT H AS S EMBL Y  
LOT CODE 1234  
RECTIFIER  
ASSEMBLED ON WW 16, 1999  
INTERNATIONAL  
DATE CODE  
YEAR 9 = 1999  
WEEK 16  
IRFU120  
916A  
LOGO  
IN THE ASSEMBLYLINE "A"  
12  
34  
LINE A  
Note: "P" in assembly line position  
ASSEMBLY  
LOT CODE  
indicates "L ead-F ree"  
OR  
PART NUMBER  
DATE CODE  
P = DE S IGNAT E S LE AD-F R E E  
PRODUCT (OPTIONAL)  
INTERNATIONAL  
RECTIFIER  
LOGO  
IRFU120  
12 34  
YEAR 9 = 1999  
AS S E MB L Y  
LOT CODE  
WEEK 16  
A = ASSEMBLYSITE CODE  
www.irf.com  
7
IRLR/U4343PbF & IRLU4343-701PbF  
I-Pak (TO-251AA) Package Outline  
Dimensions are shown in millimeters (inches)  
I-Pak (TO-251AA) Part Marking Information  
PART NUMBER  
EXAMPLE: THIS IS AN IRFU120  
INTERNATIONAL  
WITH ASSEMBLY  
DAT E CODE  
YEAR 9 = 1999  
WEEK 19  
RECTIFIER  
LOGO  
IRFU120  
919A  
78  
LOT CODE 5678  
ASS EMBLED ON WW 19, 1999  
IN THE ASSEMBLY LINE "A"  
56  
LINE A  
AS S E MB L Y  
LOT CODE  
Note: "P" in assembly line  
pos ition indicates "L ead-F ree"  
OR  
PART NUMBER  
DAT E CODE  
INTERNATIONAL  
RECTIFIER  
LOGO  
IRFU120  
56 78  
P = DE S IGNAT E S L E AD-F R E E  
PRODUCT (OPTIONAL)  
YEAR 9 = 1999  
AS S E MB L Y  
LOT CODE  
WE E K 19  
A = ASSEMBLYSITE CODE  
8
www.irf.com  
IRLR/U4343PbF & IRLU4343-701PbF  
D-Pak (TO-252AA) Tape & Reel Information  
Dimensions are shown in millimeters (inches)  
TR  
TRL  
TRR  
16.3 ( .641 )  
15.7 ( .619 )  
16.3 ( .641 )  
15.7 ( .619 )  
12.1 ( .476 )  
11.9 ( .469 )  
8.1 ( .318 )  
7.9 ( .312 )  
FEED DIRECTION  
FEED DIRECTION  
NOTES :  
1. CONTROLLING DIMENSION : MILLIMETER.  
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS ( INCHES ).  
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.  
13 INCH  
16 mm  
NOTES :  
1. OUTLINE CONFORMS TO EIA-481.  
www.irf.com  
9
IRLR/U4343PbF & IRLU4343-701PbF  
I-Pak Leadform Option 701 Package Outline ‰  
Dimensions are shown in millimeters (inches)  
Notes:  
† Contact factory for mounting information  
‡ Limited by Tjmax. See Figs. 14, 15, 17a, 17b for repetitive avalanche information  
 Repetitive rating; pulse width limited by  
max. junction temperature.  
‚ Starting TJ = 25°C, L = 0.93mH,  
RG = 25, IAS = 19A.  
ƒ Pulse width 400µs; duty cycle 2%.  
„ This only applies for I-Pak, LS of D-Pak is  
measured between lead and center of die contact  
ˆ
When D-Pak mounted on 1" square PCB (FR-4 or G-10 Material) .  
For recommended footprint and soldering techniques refer to  
application note #AN-994  
‰ Refer to D-Pak package for Part Marking, Tape and Reel information.  
R is measured at TJ of approximately 90°C.  
θ
Data and specifications subject to change without notice.  
This product has been designed for the Industrial market.  
Qualification Standards can be found on IR’s Web site.  
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105  
TAC Fax: (310) 252-7903  
Visit us at www.irf.com for sales contact information.12/04  
10  
www.irf.com  
Note: For the most current drawings please refer to the IR website at:  
http://www.irf.com/package/  

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