IRU3137 [INFINEON]
8-PIN SYNCHRONOUS PWM CONTROLLER; 8 -PIN同步PWM控制器
| 型号： | IRU3137 |
| 厂家： | 
Infineon |
| 描述： | 8-PIN SYNCHRONOUS PWM CONTROLLER |
| 文件： | 总19页 (文件大小：169K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet No. PD94700
IRU3137
8-PIN SYNCHRONOUS PWM CONTROLLER
FEATURES
DESCRIPTION
1A Peak Output Drive Capability
0.8V Reference Voltage
The IRU3137 controller IC is designed to provide a low
cost and high performance synchronous Buck regulator
for on-board DC to DC converter applications. The out-
put voltage can be set as low as 0.8V and higher voltage
can be obtained with an external voltage divider. High
peak current gate drivers provide fast switching transi-
tion for applications requiring high output current in the
range of 15A to 20A.
Shuts off both drivers at shorted output
and shutdown
Operating with single 5V or 12V supply voltage
Stable with ceramic capacitors
Internal 200KHz Oscillator
Soft-Start Function
Protects the output when control FET is shorted
Synchronous Controller in 8-Pin Package
This device features an internal 200KHz oscillator, un-
der-voltage lockout for both Vcc and Vc supplies, an
external programmable soft-start function as well as
output under-voltage detection that latches off the de-
vice when an output short is detected.
APPLICATIONS
DDR Memory Application
Low voltage distributed DC-DC
Graphic Cards
Low cost on-board DC to DC such as 5V to 2.5V,
1.8V or 0.8V
TYPICALAPPLICATION
Optional
L1
12V
5V
1uH
C3
1uF
C4
1uF
C1
47uF
C2
4x 150uF
Vcc
Vc
HDrv
Q1
IRF7832
L2
D1
2.5V
@ 15A
SS/SD
2.2uH
C8
0.1uF
Q2
IRF7832
C7
LDrv
U1
IRU3137
3x 330uF
40mΩ, Poscap
Comp
R3
Fb
C9
2.15K
3300pF
R5
1K, 1%
Gnd
R4
30K
Optional
Figure 1 - Typical application of IRU3137.
PACKAGE ORDER INFORMATION
TA (°C)
DEVICE
PACKAGE
FREQUENCY
0 To 70
IRU3137CS
8-Pin Plastic SOIC NB (S)
200KHz
Rev. 1.0
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IRU3137
ABSOLUTE MAXIMUM RATINGS
Vcc Supply Voltage .................................................. -0.5V - 25V
Vc Supply Voltage .................................................... -0.5V - 25V
Storage Temperature Range ...................................... -65°C To 150°C
Operating Junction Temperature Range ..................... 0°C To 125°C
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device.
PACKAGE INFORMATION
8-PIN PLASTIC SOIC NB (S)
1
2
3
4
8
7
6
5
Fb
Vcc
SS
Comp
Vc
LDrv
Gnd
HDrv
θJA=160°C/W
ELECTRICAL SPECIFICATIONS
Unless otherwise specified, these specifications apply over Vcc=5V, Vc=12V and TA=0 to 70°C. Typical values refer
to TA=25ꢀC.
PARAMETER
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
Reference Voltage
Fb Voltage
Fb Voltage Line Regulation
UVLO
VFB
0.784
0.800
0.816
1.6
V
mV
LREG
5<Vcc<12
UVLO Threshold - Vcc
UVLO Hysteresis - Vcc
UVLO Threshold - Vc
UVLO Hysteresis - Vc
UVLO Threshold - Fb
UVLO Hysteresis - Fb
Supply Current
UVLO Vcc Supply Ramping Up
UVLO Vc Supply Ramping Up
UVLO Fb Fb Ramping Down
4.0
3.0
0.3
4.25
0.25
3.5
0.25
0.4
4.5
3.65
0.5
V
V
V
V
V
V
0.25
Vcc Dynamic Supply Current Dyn Icc Freq=200KHz, CL=3000pF
6.5
11
4
8
14
6
mA
mA
mA
mA
Vc Dynamic Supply Current
Vcc Static Supply Current
Vc Static Supply Current
Soft-Start Section
Dyn Ic Freq=200KHz, CL=3000pF
ICCQ
SS=0V
SS=0V
ICQ
2.5
4
Charge Current
SSIB
SS=0V
15
22
30
µA
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IRU3137
PARAMETER
SYM
TEST CONDITION
MIN
TYP
MAX
UNITS
Error Amp
Fb Voltage Input Bias Current
Fb Voltage Input Bias Current
Transconductance
Oscillator
IFB1
IFB2
GM
SS=3V, Fb=1V
SS=0V, Fb=1V
µA
µA
µmho
0.1
50
850
600
180
1100
240
Frequency
Freq
KHz
V
Ramp-Amplitude Voltage
Output Drivers
Rise Time
VRAMP Note 1
1.25
Tr
Tf
CL=3000pF (10% to 90%)
CL=3000pF (90% to 10%)
ns
ns
ns
%
35
35
100
90
70
70
Fall Time
Dead Band Time
Max Duty Cycle
Min Duty Cycle
TDB
TON
Fb=0.7V, Freq=200KHz
85
TOFF Fb=1.5V
%
0
Note 1: Guaranteed by design but not tested in production.
PIN DESCRIPTIONS
PIN# PIN SYMBOL
PIN DESCRIPTION
1
Fb
This pin is connected directly to the output of the switching regulator via resistor divider to
provide feedback to the Error amplifier.
2
Vcc
This pin provides biasing for the internal blocks of the IC as well as power for the low side
driver. A minimum of 1µF, high frequency capacitor must be connected from this pin to
ground to provide peak drive current capability.
3
4
LDrv
Gnd
Output driver for the synchronous power MOSFET.
This pin serves as the ground pin and must be connected directly to the ground plane. A
high frequency capacitor (0.1 to 1µF) must be connected from VCC and Vc pins to this
pin for noise free operation.
5
6
HDrv
Vc
Output driver for the high side power MOSFET. This pin should not go negative (below
ground), this may cause problem for the gate drive circuit. It can happen when the inductor
current goes negative (Source/Sink), soft-start at no load and for the fast load transient
from full load to no load. To prevent negative voltage at gate drive, a low forward voltage
drop diode might be connected between this pin and ground.
This pin is connected to a voltage that must be at least 4V higher than the bus voltage of
the switcher (assuming 5V threshold MOSFET) and powers the high side output driver.A
minimum of 1µF, high frequency capacitor must be connected from this pin to ground to
provide peak drive current capability.
7
8
Comp
Compensation pin of the error amplifier. An external resistor and capacitor network is
typically connected from this pin to ground to provide loop compensation.
SS / SD
This pin provides soft-start for the switching regulator.An internal current source charges
an external capacitor that is connected from this pin to ground which ramps up the output
of the switching regulator, preventing it from overshooting as well as limiting the input
current. The converter can be shutdown by pulling this pin below 2.8V.
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IRU3137
BLOCK DIAGRAM
Vcc
2
3V
Bias
Generator
0.8V
POR
3V
4.25V
Vc
20uA
Vc
6
5
3.5V
SS/SD 8
POR
Oscillator
HDrv
64uA Max
Ct
S
R
Q
Error Comp
Error Amp
25K
25K
Vcc
0.8V
Reset Dom
LDrv
Fb
3
1
7
FbLo Comp
0.4V
2.8V
SS
Comp
4 Gnd
POR
Figure 2 - Simplified block diagram of the IRU3137.
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IRU3137
The magnitude of this current is inversely proportional to
the voltage at soft-start pin.
THEORY OF OPERATION
Introduction
The IRU3137 is a fixed frequency, voltage mode syn-
chronous controller and consists of a precision refer-
ence voltage, an error amplifier, an internal oscillator, a
PWM comparator, 1A peak gate driver, soft-start and
shutdown circuits (see Block Diagram).
The 20µA current source starts to charge up the exter-
nal capacitor. In the mean time, the soft-start voltage
ramps up, the current flowing into Fb pin starts to de-
crease linearly and so does the voltage at the positive
pin of feedback UVLO comparator and the voltage nega-
tive input of E/A.
The output voltage of the synchronous converter is set
and controlled by the output of the error amplifier; this is
the amplified error signal from the sensed output voltage
and the reference voltage.
When the soft-start capacitor is around 1V, the current
flowing into the Fb pin is approximately 32µA. The volt-
age at the positive input of the E/A is approximately:
32µA×25K = 0.8V
This voltage is compared to a fixed frequency linear
sawtooth ramp and generates fixed frequency pulses of
variable duty-cycle, which drives the two N-channel ex-
ternal MOSFETs.The timing of the IC is provided through
an internal oscillator circuit which uses on-chip capaci-
tor to set the oscillation frequency to 200 KHz.
The E/A will start to operate and the output voltage starts
to increase. As the soft-start capacitor voltage contin-
ues to go up, the current flowing into the Fb pin will keep
decreasing. Because the voltage at pin of E/A is regu-
lated to reference voltage 0.8V, the voltage at the Fb is:
VFB = 0.8-25K×(Injected Current)
Soft-Start
The IRU3137 has a programmable soft-start to control
the output voltage rise and limit the current surge at the
start-up. To ensure correct start-up, the soft-start se-
quence initiates when the Vc and Vcc rise above their
threshold (3.5V and 4.25V respectively) and generates
the Power On Reset (POR) signal. Soft-start function
operates by sourcing an internal current to charge an
external capacitor to about 3V. Initially, the soft-start func-
tion clamps the E/A’s output of the PWM converter and
disables the short circuit protection. During the power
up, the output starts at zero and voltage at Fb is below
0.4V. The feedback UVLO is disabled during this time
by injecting a current (64µA) into the Fb. This generates
a voltage about 1.6V (64µA×25K) across the negative
input of E/A and positive input of the feedback UVLO
comparator (see Fig3).
The feedback voltage increases linearly as the injecting
current goes down. The injecting current drops to zero
when soft-start voltage is around 2V and the output volt-
age goes into steady state.
As shown in Figure 4, the positive pin of feedback UVLO
comparator is always higher than 0.4V, therefore, feed-
back UVLO is not functional during soft-start.
Output of UVLO
POR
3V
≅2V
≅1V
Soft-Start
Voltage
0V
3V
20uA
64uA
Current flowing
into Fb pin
HDrv
LDrv
0uA
64uA
Max
SS/SD
≅1.6V
Voltage at negative input
of Error Amp and Feedback
UVLO comparator
POR
0.8V
0.8V
Comp
Error Amp
25K
25K
0.8V
Fb
0V
Voltage at Fb pin
0.4V
Figure 4 - Theoretical operational waveforms
during soft-start.
64uA
×
25K=1.6V
POR
When SS=0
Feeback
UVLO Comp
Figure 3 - Soft-start circuit for IRU3137.
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IRU3137
the output start-up time is the time period when soft- Short-Circuit Protection
start capacitor voltage increases from 1V to 2V. The start- The outputs are protected against the short-circuit. The
up time will be dependent on the size of the external IRU3137 protects the circuit for shorted output by sens-
soft-start capacitor. The start-up time can be estimated ing the output voltage (through the external resistor di-
by:
vider). The IRU3137 turns off both drivers, when the out-
put voltage drops below 0.4V.
20µA×TSTART/CSS = 2V-1V
For a given start up time, the soft-start capacitor can be The IRU3137 also protects the output from over-voltaging
estimated as:
when the control FET is shorted. This is done by turning
on the sync FET with the maximum duty cycle.
CSS ≅ 20µA×TSTART/1V
MOSFET Drivers
Under-Voltage Lockout
The driver capabilities of both high and low side drivers The under-voltage lockout circuit assures that the
are optimized to maintain fast switching transitions. They MOSFET driver outputs remain in the off state whenever
are sized to drive a MOSFET that can deliver up to 20A the supply voltage drops below set parameters. Lockout
output current.
occurs if Vc and Vcc fall below 3.5V and 4.25V respec-
tively. Normal operation resumes once Vc and Vcc rise
The low side MOSFET driver is supplied directly by VCC above the set values.
while the high side driver is supplied by VC.
Shutdown
An internal dead time control is implemented to prevent The converter can be shutdown by pulling the soft-start
cross-conduction and allows the use of several kinds of pin below 2.8V. This can be easily done by using an
MOSFETs.
external small signal transistor. During shutdown both
MOSFET drivers turn off.
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IRU3137
APPLICATION INFORMATION
Design Example:
The following example is a typical application for IRU3137,
the schematic is Figure 13 on page 15.
Css = 20×tSTART (µF)
---(8)
Where tSTART is the desired start-up time (ms)
VIN = 5V
VOUT = 2.5V
IOUT = 15A
Supply Voltage
VCC = VC = 12V
For a start-up time of 5ms, the soft-start capacitor will
be 0.1µF. Choose a ceramic capacitor at 0.1µF.
∆VOUT = 75mV
(output voltage ripple ≅ 3% of VOUT)
fS = 200KHz
Boost Supply Vc
To drive the high side switch, it is necessary to supply a
gate voltage at least 4V grater than the bus voltage. For
single supply applications, this is achieved by using a
charge pump configuration as shown in Figure 6. This
Output Voltage Programming
Output voltage is programmed by reference voltage and method is simple and inexpensive. The operation of the
external voltage divider. The Fb pin is the inverting input circuit is as follows: when the lower MOSFET is turned
of the error amplifier, which is referenced to the voltage on, the capacitor (C1) is pulled down to ground and
on non-inverting pin of error amplifier. The output voltage charges, up to VBUS value, through the diode (D1). The
is defined by using the following equation:
bus voltage will be added to this voltage when upper
MOSFET turns on in next cycle, and providing supply
voltage (Vc) through diode (D2). Vc is approximately:
R6
R5
VOUT = VREF× 1 +
---(7)
( )
VC ≅ 2 × VBUS - (VD1 + VD2)
VREF = 0.8V
When an external resistor divider is connected to the Capacitors in the range of 0.1µF and 1µF are generally
output as shown in Figure 5.
adequate for most applications. The diode must be a
fast recovery device to minimize the amount of charge
fed back from the charge pump capacitor into Vc. The
diodes need to be able to block the full power rail volt-
age, which is seen when the high side MOSFET is
switched on. For low voltage application, schottky di-
odes can be used to minimize forward drop across the
diodes at start up. For this application, Vc is biased by
an external 12V supply.
V
OUT
IRU3137
R
6
Fb
R
5
Figure 5 - Typical application of the IRU3137 for
programming the output voltage.
VBUS
D2
D1
IRU3137
Vc
Equation (7) can be rewritten as:
C2
C1
Q1
Q2
VOUT
R6 = R5 ×
- 1
(VREF )
L2
Choose R5 = 1K
HDrv
This will result to R6 = 2.125K
If the high value feedback resistors are used, the input
bias current of the Fb pin could cause a slight increase
in output voltage. The output voltage set point can be
more accurate by using precision resistor.
Figure 6 - Charge pump circuit.
Input Capacitor Selection
The input filter capacitor should be based on how much
ripple the supply can tolerate on the DC input line. The
Soft-Start Programming
The soft-start timing can be programmed by selecting ripple current generated during the on time of upper
the soft-start capacitance value. The start-up time of the MOSFETshould be provided by input capacitor. The RMS
converter can be calculated by using:
value of this ripple is expressed by:
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IRU3137
requirements, yet have high enough ESR to satisfy sta-
bility requirements. The ESR of the output capacitor is
calculated by the following relationship:
IRMS = IOUT D×(1-D)
Where:
D is the Duty Cycle, D=VOUT/VIN.
IRMS is the RMS value of the input capacitor current.
IOUT is the output current for each channel.
---(9)
∆VO
∆IO
ESR ≤
---(10)
Where:
For VIN=5V, IOUT=15A and D=0.5, the IRMS=7.5A
∆VO = Output Voltage Ripple
∆i = Inductor Ripple Current
∆VO = 75mV and ∆I ≅ 20% of 15A = 3A
This results to: ESR=25mΩ
For higher efficiency, a low ESR capacitor is recom-
mended. Choose four Poscap from Sanyo 6TPC150M
(6.3V, 150µF, 40mΩ) with a maximum allowable ripple
current of 7.6A.
The Sanyo TPC series, Poscap capacitor is a good choice.
The 6TPC330M, 330µF, 6.3V has an ESR 40mΩ. Se-
lecting three of these capacitors in parallel, results to an
Inductor Selection
The inductor is selected based on operating frequency, ESR of ≅ 13.3mΩ which achieves our low ESR goal.
transient performance and allowable output voltage ripple.
The capacitor value must be high enough to absorb the
Low inductor value results to faster response to step inductor's ripple current. The larger the value of capaci-
load (high ∆i/∆t) and smaller size but will cause larger tor, the lower will be the output ripple voltage.
output ripple due to increase of inductor ripple current.
As a rule of thumb, select an inductor that produces a Power MOSFET Selection
ripple current of 10-40% of full load DC.
The IRU3137 uses two N-Channel MOSFETs. The se-
lections criteria to meet power transfer requirements is
For the buck converter, the inductor value for desired based on maximum drain-source voltage (VDSS), gate-
operating ripple current can be determined using the fol- source drive voltage (VGS), maximum output current, On-
lowing relation:
resistance RDS(ON) and thermal management.
∆i
∆t
1
fS
VOUT
VIN
VIN - VOUT = L×
; ∆t = D×
; D =
The MOSFET must have a maximum operating voltage
(VDSS) exceeding the maximum input voltage (VIN).
VOUT
L = (VIN - VOUT)×
---(11)
VIN×∆i×fS
The gate drive requirement is almost the same for both
MOSFETs. Logic-level transistor can be used and cau-
tion should be taken with devices at very low VGS to pre-
vent undesired turn-on of the complementary MOSFET,
which results a shoot-through current.
Where:
VIN = Maximum Input Voltage
VOUT = Output Voltage
∆i = Inductor Ripple Current
fS = Switching Frequency
∆t = Turn On Time
The total power dissipation for MOSFETs includes con-
duction and switching losses. For the Buck converter,
the average inductor current is equal to the DC load cur-
rent. The conduction loss is defined as:
D = Duty Cycle
If ∆i = 20%(IO), then the output inductor will be:
L = 2µH
2
PCOND(Upper Switch) = ILOAD×RDS(ON)×D×ϑ
The Panasonic PCCN6B series provides a range of in-
ductors in different values, low profile suitable for large
currents, 2.17µH, 17A is a good choice for this applica-
tion. This will result to a ripple approximately 19.2% of
output current.
2
PCOND(Lower Switch) = ILOAD×RDS(ON)×(1 - D)×ϑ
ϑ = RDS(ON) Temperature Dependency
The RDS(ON) temperature dependency should be consid-
ered for the worst case operation. This is typically given
Output Capacitor Selection
The criteria to select the output capacitor is normally in the MOSFET data sheet. Ensure that the conduction
based on the value of the Effective Series Resistance losses and switching losses do not exceed the package
(ESR). In general, the output capacitor must have low ratings or violate the overall thermal budget.
enough ESR to meet output ripple and load transient
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IRU3137
Choose IRF7832 for both control MOSFET and synchro- These values are taken under a certain condition test.
nous MOSFET. This device provides low on-resistance For more details please refer to the IRF7466 and IRF7458
in a compact SOIC 8-Pin package.
data sheets.
The MOSFET has the following data:
By using equation (12), we can calculate the total switch-
ing losses.
IRF7832
VDSS = 30V
PSW(TOTAL) = 250mW
ID = 20A @ 25ꢀC
RDS(ON) = 4mΩ @ VGS=10V
Feedback Compensation
The IRU3137 is a voltage mode controller; the control
loop is a single voltage feedback path including error
amplifier and error comparator. To achieve fast transient
response and accurate output regulation, a compensa-
tion circuit is necessary. The goal of the compensation
The total conduction losses will be:
PCON(TOTAL) = PCON(UPPER) + PCON(LOWER)
PCON(TOTAL) = 1.166W
The switching loss is more difficult to calculate, even network is to provide a closed loop transfer function with
though the switching transition is well understood. The the highest 0dB crossing frequency and adequate phase
reason is the effect of the parasitic components and margin (greater than 45ꢀ).
switching times during the switching procedures such
as turn-on / turnoff delays and rise and fall times. The The output LC filter introduces a double pole, –40dB/
control MOSFET contributes to the majority of the switch- decade gain slope above its corner resonant frequency,
ing losses in synchronous Buck converter. The synchro- and a total phase lag of 180ꢀ (see Figure 8). The Reso-
nous MOSFET turns on under zero voltage conditions, nant frequency of the LC filter is expressed as follows:
therefore, the turn on losses for synchronous MOSFET
can be neglected. With a linear approximation, the total
switching loss can be expressed as:
1
FLC =
---(13)
2π× LO×CO
Figure 9 shows gain and phase of the LC filter. Since we
already have 180ꢀ phase shift just from the output filter,
the system risks being unstable.
VDS(OFF)
tr + tf
T
PSW =
×
×ILOAD
---(12)
2
Where:
VDS(OFF) = Drain to Source Voltage at off time
tr = Rise Time
tf = Fall Time
Gain
Phase
0ꢀ
0dB
-40dB/decade
T = Switching Period
ILOAD = Load Current
The switching time waveform is shown in Figure 7.
-180
ꢀ
Frequency
FLC
FLC Frequency
VDS
90%
Figure 8 - Gain and phase of LC filter.
10%
VGS
td(OFF)
td(ON)
tr
tf
Figure 7 - Switching time waveforms.
From IRF7832 data sheet we obtain:
IRF7832
tr = 12.3ns
tf = 21ns
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IRU3137
The IRU3137’s error amplifier is a differential-input First select the desired zero-crossover frequency (Fo):
transconductance amplifier. The output is available for
DC gain control or AC phase compensation.
Use the following equation to calculate R4:
Fo > FESR and FO ≤ (1/5 ~ 1/10)×fS
The E/A can be compensated with or without the use of
local feedback. When operated without local feedback,
the transconductance properties of the E/A become evi-
dent and can be used to cancel one of the output filter
poles. This will be accomplished with a series RC circuit
from Comp pin to ground as shown in Figure 9.
1
gm
VOSC
VIN
Fo×FESR
R5 + R6
R5
R4 =
×
×
×
---(18)
2
FLC
Where:
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Fo = Crossover Frequency
FESR = Zero Frequency of the Output Capacitor
FLC = Resonant Frequency of the Output Filter
R5 and R6 = Resistor Dividers for Output Voltage
Programming
Note that this method requires that the output capacitor
should have enough ESR to satisfy stability requirements.
In general, the output capacitor’s ESR generates a zero
typically at 5KHz to 50KHz which is essential for an
acceptable phase margin.
gm = Error Amplifier Transconductance
For:
VIN = 5V
VOSC = 2.5V
Fo = 20KHz
FESR = 12KHz
The ESR zero of the output capacitor expressed as fol-
FLC = 3.43KHz
R5 = 1K
R6 = 2.15K
gm = 600µmho
lows:
1
2π×ESR×Co
FESR =
---(14)
VOUT
This results to R4=26.7K
Choose R4=30K
R6
Fb
To cancel one of the LC filter poles, place the zero be-
fore the LC filter resonant frequency pole:
Comp
Ve
E/A
R
5
C9
FZ ≅ 75%FLC
Vp=VREF
R4
1
Optional
FZ ≅ 0.75×
---(19)
Gain(dB)
2π LO × CO
For:
Lo = 2.17µH
Co = 990µF
H(s) dB
FZ = 2.57KHz
R4 = 20K
Using equations (17) and (19) to calculate C9, we get:
Frequency
FZ
C9 ≅ 2006pF; Choose C9 =3300pF
Figure 9 - Compensation network without local
feedback and its asymptotic gain plot.
One more capacitor is sometimes added in parallel with
C9 and R4. This introduces one more pole which is mainly
used to suppress the switching noise. The additional
pole is given by:
The transfer function (Ve / VOUT) is given by:
R5
R6 + R5
1 + sR4C9
sC9
H(s) = gm×
×
---(15)
(
)
1
FP =
C9×CPOLE
2π×R4×
C9 + CPOLE
The (s) indicates that the transfer function varies as a
function of frequency. This configuration introduces a gain
and zero, expressed by:
The pole sets to one half of switching frequency which
results in the capacitor CPOLE:
R5
R6×R5
|H(s=j×2π×FO)| = gm×
×R4
---(16)
1
1
CPOLE =
≅
π×R4×fS
1
C9
1
FZ =
π×R4×fS -
---(17)
2π×R4×C9
For FP << fS/2
R4=30K and FS=200KHz will result to CPOLE=53pF.
Choose CPOLE=47pF.
|H(s)| is the gain at zero cross frequency.
Rev. 1.0
06/22/04
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10
IRU3137
For a general solution for unconditionally stability for
ceramic capacitor with very low ESR and any type of
output capacitors, in a wide range of ESR values we
should implement local feedback with a compensation
network. The typically used compensation network for
voltage-mode controller is shown in Figure 10.
FP1 = 0
FP2 =
1
2π×R8×C10
1
1
FP3 =
≅
2π×R7×C12
C12×C11
(C12+C11 )
2π×R7×
VOUT
1
ZIN
C12
FZ1 =
2π×R7×C11
C
10
R7
1
1
C11
FZ2 =
≅
2π×C10×(R6 + R8)
2π×C10×R6
R8
R6
Zf
Cross Over Frequency:
Fb
VIN
FO = R7×C10×
VOSC
1
Ve
E/A
---(21)
×
Comp
R5
2π×Lo×Co
Where:
Vp=VREF
VIN = Maximum Input Voltage
VOSC = Oscillator Ramp Voltage
Lo = Output Inductor
Gain(dB)
H(s) dB
Co = Total Output Capacitors
The stability requirement will be satisfied by placing the
poles and zeros of the compensation network according
to following design rules. The consideration has been
taken to satisfy condition (20) regarding transconduc-
tance error amplifier.
Frequency
F
Z
1
F
Z
2
F
P
2
FP3
Figure 10 - Compensation network with local
feedback and its asymptotic gain plot.
In such configuration, the transfer function is given by:
These design rules will give a crossover frequency ap-
proximately one-tenth of the switching frequency. The
higher the band width, the potentially faster the load tran-
sient speed. The gain margin will be large enough to
Ve
1 - gmZf
=
VOUT
1 + gmZIN
The error amplifier gain is independent of the transcon- provide high DC-regulation accuracy (typically -5dB to -
ductance under the following condition:
12dB). The phase margin should be greater than 45ꢀ for
overall stability.
gmZf >> 1 and
gmZIN >>1
---(20)
By replacing ZIN and Zf according to Figure 7, the trans- Based on the frequency of the zero generated by ESR
former function can be expressed as:
versus crossover frequency, the compensation type can
be different. The table below shows the compensation
type and location of crossover frequency.
(1+sR7C11)×[1+sC10(R6+R8)]
1
×
H(s) =
sR6(C12+C11)
C12C11
1+sR7
×(1+sR8C10)
Compensator
Type
Location of Zero
Crossover Frequency
(FO)
Typical
Output
[ (C12+C11)]
Capacitor
Electrolytic,
Tantalum
Tantalum,
Ceramic
As known, transconductance amplifier has high imped-
ance (current source) output, therefore, consider should
be taken when loading the E/A output. It may exceed its
source/sink output current capability, so that the ampli-
fier will not be able to swing its output voltage over the
necessary range.
Type II (PI)
FPO < FZO < FO < fS/2
Type III (PID)
Method A
FPO < FO < FZO < fS/2
FPO < FO < fS/2 < FZO
Type III (PID)
Method B
Ceramic
Table - The compensation type and location of zero
crossover frequency.
The compensation network has three poles and two ze-
ros and they are expressed as follows:
Detail information is dicussed in application Note AN-
1043 which can be downloaded from the IR Web-Site.
Rev. 1.0
06/22/04
www.irf.com
11
IRU3137
Layout Consideration
The layout is very important when designing high fre- directly to the drain of the high-side MOSFET. To reduce
quency switching converters. Layout will affect noise the ESR, replace the single input capacitor with two par-
pickup and can cause a good design to perform with allel units. The feedback part of the system should be
less than expected results.
kept away from the inductor and other noise sources
and be placed close to the IC. In multilayer PCB, use
Start to place the power components. Make all the con- one layer as power ground plane and have a separate
nections in the top layer with wide, copper filled areas. control circuit ground (analog ground), to which all sig-
The inductor, output capacitor and the MOSFET should nals are referenced. The goal is to localize the high cur-
be close to each other as possible. This helps to reduce rent path to a separate loop that does not interfere with
the EMI radiated by the power traces due to the high the more sensitive analog control function. These two
switching currents through them. Place input capacitor grounds must be connected together on the PC board
layout at a single point.
Rev. 1.0
06/22/04
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12
IRU3137
TYPICAL APPLICATION
Single Supply 5V Input
5V
D2
BAT54
D1
BAT54S
L1
1uH
C1
47uF
C2
3x 6TPB150M,
150uF, 40m
C3
0.1uF
C4
1uF
Ω
C5
0.1uF
Vcc
Vc
HDrv
Q1
IRF7457
L2
3.3uH
D3
BAT54
3.3V
@ 12A
SS/SD
U1
C8
0.1uF
IRU3137
Q2
IRF7457
C7
LDrv
2x 6TPC330M,
330uF, 40m
Ω
Comp
R6
C9
3.3nF
Fb
3.16K, 1%
C6
68pF
Gnd
R4
18K
R5
1K, 1%
Figure 11 - Typical application of IRU3137 in an on-board DC-DC converter
using a single 5V supply.
Rev. 1.0
06/22/04
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13
IRU3137
TYPICAL APPLICATION
5V
12V
L1
5V
1uH
C1
0.1uF
C2
1uF
C4
47uF
C5
4x 150uF
6TPB150M
Vcc
Vc
Q1
IRF3711S
HDrv
LDrv
Fb
SS
D1
1N4148
C6
L2
0.1uF
U1
IRU3137
V
DDQ
2.2uH
1.8V @ 15A
Q2
IRF3711S
C7
3x 330uF
6TPC330M
Comp
R1
1K
C8
3300pF
C15
68pF
Gnd
5V
R2
20K
R3
1K
12V
C9
0.1uF
C10
1uF
C11
3x 150uF
6TPB150M
Vcc
Vc
R4
1K
V
REF
Q3
IRF7460
HDrv
VP
D2
1N4148
L3
R5
1K
SS
U2
V
TT
2.2uH
C12
0.15uF
IRU3038
(0.9V @ 10A)
Q4
IRF7457
LDrv
C13
3x 330uF
6TPC330M
PGnd
Fb
Rt
Comp
C14
6800pF
C16
47pF
Gnd
R6
12K
Figure 12 - Typical application of IRU3137 for DDR memory when the termination voltage,
generated by IRU3038, tracks the core voltage.
Rev. 1.0
06/22/04
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14
IRU3137
DEMO-BOARDAPPLICATION
5V to 2.5V @ 15A
L1
V
5V
IN
1uH
C1
150uF
C23
150uF
C20
150uF
C19
150uF
C18
150uF
Gnd
12V
C4
C6
1uF
1uF
Vcc
Vc
HDrv
C3
1uF
Q1
IRF7832
L2
D3
V
2.5V
@ 15A
OUT
SS/SD
2.17uH
C9
U1
C8
0.1uF
IRU3137
470pF
R6
4.7
C12
1uF
C11
330uF 330uF
C21
C10
330uF
Q2
LDrv
IRF7832
Ω
Comp
Gnd
R8
C15
3300pF
Fb
Gnd
2.15K
C13
47pF
R11
1K
R9
30K
Figure 13 - Demo-board application of IRU3137.
Application Parts List
Ref Desig
Description
MOSFET
Controller
Diode
Inductor
Value
30V, 4mΩ, 15A
Synchronous PWM
Fast Switching
1µH, 10A
2.17µH, 17A
150µF, 6.3V, 40mΩ
330µF, 6.3V, 40mΩ
0.1µF, Y5V, 25V
1µF, Y5V, 16V
470pF, X7R
Qty
2
1
1
1
1
5
3
1
4
1
1
1
Part#
IRF7832
IRU3137
Manuf
Q1, Q2
IR
IR
IR
U1
D3
L1
L2
BAT54
D03316P-102HC
ETQP6F2R5BFA
6TPC150M
Coilcraft
Panasonic
Sanyo
Inductor
C1,C18,C19,C20,C23
C10,C11,C21
Capacitor, Poscap
Capacitor, Poscap
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Ceramic
Capacitor, Ceramic
Resistor
6TPC330M
Sanyo
C8
ECJ-2VF1E104Z
ECJ-3YB1E105K
ECJ-2VB2D471K
ECJ-2VB1H332K
ECJ-2VC1H470J
Panasonic
Panasonic
Panasonic
Panasonic
Panasonic
C3,C4,C12,C6
C9
C15
C13
R8
3300pF, X7R, 50V
47pF, NPO
2.15K, 1%
1
R6
Resistor
4.7Ω, 5%
1
R11
R9
Resistor
Resistor
1K, 1%
30K, 1%
1
1
Rev. 1.0
06/22/04
www.irf.com
15
IRU3137
TYPICAL OPERATING CHARACTERISTICS
Figure 14 - Transient load response at IOUT=0A - 8A.
Figure 16 - Transient load response at IOUT=0A - 15A.
Ch1: VOUT
Ch1: VOUT
Ch4: IOUT (5A/div)
Ch4: IOUT (5A/div)
Figure 15 - Normal condition at N/L.
Ch1: Output Voltage Ripple (20mV/div)
Ch2: HDrv
Figure 17 - Normal condition at 15A.
Ch1: Output Voltage Ripple (20mV/div)
Ch2: HDrv
Ch3: LDrv
Ch3: LDrv
Ch4: Inductor Current (2A/div)
Ch4: Inductor Current (5A/div)
Rev. 1.0
06/22/04
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16
IRU3137
TYPICAL OPERATING CHARACTERISTICS
Figure 18 - Shutdown by pulling down
the soft-start pin.
Ch1: VOUT
Figure 19 - Start-Up.
Ch2: VSS (Soft-Start Voltage)
Ch3: VOUT
Ch2: HDrv
Ch4: IOUT (5A/div)
Ch3: LDrv
Ch4: IOUT (10A/div)
120
100
80
60
40
20
0
0
2
4
6
8
10
12
14
16
18
Output Current (A)
Figure 20 - Application circuit efficiency
at ambient temperature.
5V to 2.5V
Rev. 1.0
06/22/04
www.irf.com
17
IRU3137
(S) SOIC Package
8-Pin Surface Mount, Narrow Body
H
A
B
C
E
DETAIL-A
L
D
PIN NO. 1
DETAIL-A
I
0.38±0.015 x 45ꢀ
K
T
F
J
G
8-PIN
MIN
SYMBOL
MAX
A
B
C
D
E
F
G
H
I
4.80
4.98
1.27 BSC
0.53 REF
0.36
0.46
3.99
1.72
0.25
3.81
1.52
0.10
7ꢀ BSC
0.19
5.80
0ꢀ
0.25
6.20
8ꢀ
J
K
L
0.41
1.37
1.27
1.57
T
NOTE: ALL MEASUREMENTS ARE IN MILLIMETERS.
Rev. 1.0
06/22/04
www.irf.com
18
IRU3137
PACKAGE SHIPMENT METHOD
PKG
DESIG
S
PACKAGE
PIN
COUNT
8
PARTS
PER TUBE
95
PARTS
PER REEL
2500
T & R
Orientation
Fig A
DESCRIPTION
SOIC, Narrow Body
1
1
1
Feed Direction
Figure A
This product has been designed and qualified for the industrial market.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information
Data and specifications subject to change without notice. 02/01
Rev. 1.0
06/22/04
www.irf.com
19
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