JANSR2N7424U_技术文档

INCH-POUND

The documentation and process conversion

measures necessary to comply with this revision

shall be completed by 14 May 2012.

MIL-PRF-19500/655E

14 February 2012

SUPERSEDING

MIL-PRF-19500/655D

30 April 2007

PERFORMANCE SPECIFICATION SHEET

SEMICONDUCTOR DEVICE, FIELD EFFECT RADIATION HARDENED

(TOTAL DOSE AND SINGLE EVENT EFFECTS) TRANSISTOR, P-CHANNEL

SILICON, TYPES 2N7424U, 2N7425U, AND 2N7426U,

*

JANTXVR AND F AND JANSR AND F

This specification is approved for use by all Departments

and Agencies of the Department of Defense.

The requirements for acquiring the product described herein shall consist of

this specification sheet and MIL-PRF-19500.

1. SCOPE

*

1.1 Scope. This specification covers the performance requirements for a P-Channel, enhancement-mode,

MOSFET, radiation hardened (total dose and single event effects (SEE)), power transistor. Two levels of product

assurance are provided for each device type as specified in MIL-PRF-19500, with avalanche energy maximum rating

(E_AS) and maximum avalanche current (I_AS). See 6.5 for JANHC and JANKC die versions.

1.2 Physical dimensions. See figure 1, (surface mount).

1.3 Maximum ratings. T_A= +25°C, unless otherwise specified.

Type

P_T(1)

T_C=

+25°C +25°C

P_T

T_A=

V_DS

V_DG

V_GS

I_D1(3) (4) I_D2(3) (4)

I_S

I_DM(5)

A (pk)

T_J

and

T_STG

R _θ

(2)

JC

T_C=

+100°C

T_C

=+25°C

W

V dc

A dc

°C/W

°C

2N7424U

2N7425U

2N7426U

300

2.5

-60

-48

-38

-29

-30

-24

-18

-48

-38

-29

-192

-152

-108

0.42

±20

-55

to

+150

-100

-200

-100

-200

(1) Derate linearly by 2.4 W/°C for T_C> +25°C.

(2) See figure 2, thermal impedance curves.

(3) The following formula derives the maximum theoretical I_Dlimit. I_Dis limited by package and internal construction.

(4) See figure 3, maximum drain current graph.

(5) I_DM= 4 X I_D1as calculated in note (3).

* Comments, suggestions, or questions on this document should be addressed to DLA Land and Maritime,

ATTN: VAC, P.O. Box 3990, Columbus, OH 43218-3990, or emailed to Semiconductor@dla.mil. Since contact

information can change, you may want to verify the currency of this address information using the ASSIST

Online database at https//assist.daps.dla.mil/.

AMSC N/A

FSC 5961

MIL-PRF-19500/655E

1.4 Primary electrical characteristics at T_C= +25°C.

Type

Min

V_(BR)DSS

V_GS= 0

V_GS(TH)1

V_DS> V_GS

I_D= -1.0 mA V_DS= 80%

Max I_DSS1

_GS= 0

Max r_DS(on)

V_GS= -12V, I_D= I_D2

(1)

E_AS

V

dc

I_D= -

1.0mA

of rated

V_DS

T_J= +25°C

T_J= +150°C

dc

V dc

Min

mJ

µA dc

Ω

Max

-4.0

2N7424U

2N7425U

2N7426U

-60

-100

-200

-2.0

500

-25

0.045

0.068

0.154

0.100

0.150

0.360

-4.0

(1) Pulsed (see 4.5.1).

2. APPLICABLE DOCUMENTS

2.1 General. The documents listed in this section are specified in sections 3, 4, or 5 of this specification. This

section does not include documents cited in other sections of this specification or recommended for additional

information or as examples. While every effort has been made to ensure the completeness of this list, document

users are cautioned that they must meet all specified requirements of documents cited in sections 3, 4, or 5 of this

specification, whether or not they are listed.

2.2 Government documents.

2.2.1 Specifications, standards, and handbooks. The following specifications, standards, and handbooks form a

part of this document to the extent specified herein. Unless otherwise specified, the issues of these documents are

those cited in the solicitation or contract.

DEPARTMENT OF DEFENSE SPECIFICATIONS

MIL-PRF-19500

DEPARTMENT OF DEFENSE STANDARDS

MIL-STD-750 Test Methods for Semiconductor Devices.

-

Semiconductor Devices, General Specification for.

-

* (Copies of these documents are available online at https://assist.daps.dla.mil/quicksearch/ or

https://assist.daps.dla.mil/ or from the Standardization Document Order Desk, 700 Robbins Avenue, Building 4D,

Philadelphia, PA 19111-5094.)

* 2.3 Order of precedence. Unless otherwise noted herein or in the contract, in the event of a conflict between the

text of this document and the references cited herein, the text of this document takes precedence. Nothing in this

document, however, supersedes applicable laws and regulations unless a specific exemption has been obtained.

2

MIL-PRF-19500/655E

Symbol

Dimensions

Inches

Millimeters

Min

.685

.520

Max

.695

.530

.142

.020

.445

.145

.480

.162

Min

17.40

13.21

Max

17.65

13.46

3.61

0.51

11.30

3.68

BL

BW

CH

LH

.010

.435

.135

.470

.152

0.25

11.05

3.43

11.94

3.86

LW1

LW2

LL1

12.19

4.11

LL2

LS1

LS2

.240 BSC

.120 BSC

6.10 BSC

3.05 BSC

Q1

Q2

.035

.050

0.89

1.27

TERM 1

TERM 2

TERM 3

Drain

Gate

Source

NOTES:

1. Dimensions are in inches.

2. Millimeters are given for information only.

3. The lid shall be electrically isolated from the drain, gate, and source.

4. In accordance with ASME Y14.5M, diameters are equivalent to φx symbology.

FIGURE 1. Dimensions and configuration.

3

MIL-PRF-19500/655E

3. REQUIREMENTS

3.1 General. The individual item requirements shall be as specified in MIL-PRF-19500 and as modified herein.

3.2 Qualification. Devices furnished under this specification shall be products that are manufactured by a

manufacturer authorized by the qualifying activity for listing on the applicable qualified manufacturer's list (QML)

before contract award (see 4.2 and 6.3).

3.3 Abbreviations, symbols, and definitions. Abbreviations, symbols, and definitions used herein shall be as

specified in MIL-PRF-19500 and as follows:

I

_AS........Rated avalanche current, nonrepetitive

nC .......nano coulomb.

3.4 Interface and physical dimensions. Interface and physical dimensions shall be as specified in

MIL-PRF-19500, and on figure 1 (SMD2) herein.

3.4.1 Lead finish. Lead finish shall be solderable in accordance with MIL-PRF-19500, MIL-STD-750, and herein.

Where a choice of lead finish is desired, it shall be specified in the acquisition document (see 6.2).

3.5 Electrostatic discharge protection. The devices covered by this specification require electrostatic discharge

protection.

3.5.1 Handling. MOS devices must be handled with certain precautions to avoid damage due to the

accumulation of static charge. However, the following handling practices are recommended.

a. Devices should be handled on benches with conductive handling devices.

b. Ground test equipment, tools and personnel handling devices.

c. Do not handle devices by the leads.

d. Store devices in conductive foam or carriers.

e. Avoid use of plastic, rubber or silk in MOS areas.

f. Maintain relative humidity above 50 percent if practical.

g. Care should be exercised during test and troubleshooting to apply not more than maximum rated voltage to

any lead.

h. Gate must be terminated to source, R ≤ or 100 kΩ, whenever bias voltage is applied drain to source.

3.6 Electrical performance characteristics. Unless otherwise specified herein, the electrical performance

characteristics are as specified in 1.3, 1.4, and table I.

3.7 Electrical test requirements. The electrical test requirements shall be as specified in table I.

3.8 Marking. Marking shall be in accordance with MIL-PRF-19500.

3.9 Workmanship. Semiconductor devices shall be processed in such a manner as to be uniform in quality and

shall be free from other defects that will affect life, serviceability, or appearance.

4

MIL-PRF-19500/655E

4. VERIFICATION

4.1 Classification of inspections. The inspection requirements specified herein are classified as follows:

a. Qualification inspection (see 4.2).

b. Screening (see 4.3).

c. Conformance inspection (see 4.4 and tables I and II).

4.2 Qualification inspection. Qualification inspection shall be in accordance with MIL-PRF-19500 and as specified

herein.

4.2.1 Group E qualification. Group E inspection shall be performed for qualification or re-qualification only. In case

qualification was awarded to a prior revision of the specification sheet that did not request the performance of table III

tests, the tests specified in table III herein that were not performed in the prior revision shall be performed on the first

inspection lot of this revision to maintain qualification.

* 4.2.2 SEE. Design capability shall be tested on the initial qualification and thereafter whenever a major die design

or process change is introduced. Electrical measurements (end-points) shall be in accordance with table III.

5

MIL-PRF-19500/655E

* 4.3 Screening (JANS and JANTXV). Screening shall be in accordance with table E-IV of MIL-PRF-19500, and as

specified herein. The following measurements shall be made in accordance with table I herein. Devices that exceed

the limits of table I herein shall not be acceptable.

Screen (see table E-IV

of MIL-PRF-19500)

(1) (2)

Measurement

JANS level

JANTXV levels

Gate stress test (see 4.3.1)

(3)

Gate stress test (see 4.3.1)

Method 3470 of MIL-STD-750 (see 4.3.2), Method 3470 of MIL-STD-750 (see 4.3.2),

E_AStest E_AStest

(3) 3c

9

Method 3161 of MIL-STD-750 (see 4.3.3) Method 3161 of MIL-STD-750 (see 4.3.3)

I_GSSF1, I_GSSR1, I_DSS1

Not applicable

10

Method 1042 of MIL-STD-750, test

condition B

Method 1042 of MIL-STD-750, test condition

B

11

I_GSSF1, I_GSSR1, I_DSS1, r_DS(on)1, V_GS(th)1

subgroup 2 of table I herein:

I_GSSF1, I_GSSR1, I_DSS1, r_DS(on)1, V_GS(th)1

subgroup 2 of table I herein

∆I_GSSF1= ± 20 nA dc or ± 100 percent of

initial value, whichever is greater.

∆I_GSSR1= ± 20 nA dc or ± 100 percent of

initial value, whichever is greater.

∆I_DSS1= ± 10 µA dc or ± 100 percent of

initial value, whichever is greater.

12

13

Method 1042 of MIL-STD-750, test

condition A

Method 1042 of MIL-STD-750, test condition

A

Subgroups 2 and 3 of table I herein;

∆I_GSSF1= ± 20 nA dc or ± 100 percent of

initial value, whichever is greater.

Subgroup 2 of table I herein;

∆I_GSSF1= ± 20 nA dc or ± 100 percent of initial

value, whichever is greater.

∆I_GSSR1= ± 20 nA dc or ± 100 percent of

initial value, whichever is greater.

∆I_GSSR1= ± 20 nA dc or ± 100 percent of initial

value, whichever is greater.

∆I_DSS1= ± 10 µA dc or ± 100 percent of

initial value, whichever is greater.

∆I_DSS1= ± 10 µA dc or ± 100 percent of initial

value, whichever is greater.

∆r_DS(on)1= ± 20 percent of initial value.

∆V_GS(th)1= ± 20 percent of initial value.

∆r_DS(on)1= ± 20 percent of initial value.

∆V_GS(th)1= ± 20 percent of initial value.

(1) At the end of the test program, I_GSSF1, I_GSSR1, and I_DSS1are measured.

(2) An out-of-family program to characterize I_GSSF1, I_GSSR1, I_DSS1and V_GS(th)1shall be invoked.

* (3) Shall be performed anytime after temperature cycling, screen 3a; JANTXV level does not need to be

repeated in screening requirements.

6

MIL-PRF-19500/655E

4.3.1 Gate stress test. Apply V_GS= -24 V minimum for t = 250 µs minimum.

4.3.2 Single pulse avalanche energy (E_AS).

a. Peak current ..................................................I_AS= I_D1

.

b. Inductance .....................................................L = (2*E_AS/(I_D1)²)*((V_BR-V_DD)/V_BR) mH minimum.

c. Gate to source resistor...................................R_GS: 25 Ω ≤ R_GS≤ 200 Ω.

d. Supply voltage ...............................................V_DD= -25 V dc, except V_DD= -50 V dc for 2N7426U.

e. Initial case temperature..................................T_C= +25° C, -5° C, +10° C.

f. Gate voltage ..................................................V_GS= -12 V dc.

g. Number of pulses to be applied .....................1 pulse minimum.

4.3.3 Thermal impedance. The thermal impedance measurements shall be performed in accordance with method

3161 of MIL-STD-750 using the guidelines in that method for determining I_M, I_H, t_H, t_SW, (and V_Hwhere appropriate).

Measurement delay time (t_MD) = 70 µs max. See table III, group E, subgroup 4 herein.

4.4 Conformance inspection. Conformance inspection shall be in accordance with MIL-PRF-19500.

4.4.1 Group A inspection. Group A inspection shall be conducted in accordance with table E-V of MIL-PRF-19500

and table I herein.

4.4.2 Group B inspection. Group B inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-VIA (JANS) and table E-VIB (JANTXV) of MIL-PRF-19500, and as follows. Electrical

measurements (end-points) shall be in accordance with table I, subgroup 2 herein.

4.4.2.1 Group B inspection, table E-VIA (JANS) of MIL-PRF-19500.

Subgroup Method

Condition

B3

B4

1051

2077

1042

Test condition G, 100 cycles

SEM

Intermittent operation life, condition D, 2,000 cycles. No heat sink or forced-air cooling on

the device shall be permitted during the on cycle. t_on= 30 seconds minimum.

B5

1042

2037

Accelerated steady-state gate bias, condition B, V_GS= rated; T_A= +175°C, t = 24 hours

minimum; or T_A= +150°C, t = 48 hours minimum.

Accelerated steady-state reverse bias, condition A, V_DS= rated; T_A= +175°C,

t = 120 hours minimum; or T_A= +150°C, t = 240 hours minimum.

Bond strength, test condition A.

7

MIL-PRF-19500/655E

4.4.2.2 Group B inspection, table E-VIB (JANTXV) of MIL-PRF-19500.

Subgroup Method

Condition

B2

B3

1051

1042

Test condition G, 25 cycles.

Intermittent operation life, condition D, 2,000 cycles. No heat sink or forced-air cooling on

the device shall be permitted during the on cycle. t_on= 30 seconds minimum.

4.4.3 Group C inspection. Group C inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-VII of MIL-PRF-19500 and as follows. Electrical measurements (end-points) shall be in

accordance with table I, subgroup 2 herein.

Subgroup Method

Condition

C5

C6

3161

1042

See 4.3.3, R_θJC(max)= 0.42°C/W

Intermittent operation life, condition D, 2,000 cycles. No heat sink or forced-air cooling on

the device shall be permitted during the on cycle. t_on= 30 seconds minimum.

4.4.4 Group D inspection. Group D inspection shall be conducted in accordance with table E-VIII of

MIL-PRF-19500 and table II herein.

4.4.5 Group E inspection. Group E inspection shall be conducted in accordance with the conditions specified for

subgroup testing in table E-IX of MIL-PRF-19500 and as specified in table III herein. Electrical measurements (end-

points) shall be in accordance with table I, subgroup 2 herein.

4.5 Methods of inspection. Methods of inspection shall be as specified in the appropriate tables and as follows.

4.5.1 Pulse measurements. Conditions for pulse measurement shall be as specified in section 4 of

MIL-STD-750.

8

MIL-PRF-19500/655E

TABLE I. Group A inspection.

MIL-STD-750

Inspection

1/

Limits

Symbol

Unit

Method

2071

Condition

Min

Max

Subgroup 1

Visual and mechanical

inspection

Subgroup 2

Thermal Impedance 2/

3161

3407

See 4.3.3

Z _θ

°C/W

JC

Breakdown voltage

drain to source

V_GS= 0V,

I_D= -1 mA dc,

bias condition C

V _(BR)DSS

2N7424U

2N7425U

2N7426U

-60

-100

-200

V dc

Gate to source

voltage (threshold)

3403

3411

3413

3421

V_GS(TH)1

-2.0

-4.0

±100

-25

V dc

nA dc

µA dc

V_DS≥ V_GS

,

I_D= -1 mA dc

Gate current

Drain current

I_GSS1

V_GS= ±20V dc, bias condition

C, V_DS= 0V

V_GS= 0V dc, bias condition C,

V_DS= 80 percent of rated V_DS

I_DSS1

,

Static drain to source

on state resistance

2N7424U

V_GS= -12V dc, condition A,

pulsed (see 4.5.1), I_D= I_D2

r_DS(ON)1

0.045

0.068

0.154

Ω

2N7425U

2N7426U

Static drain to source

on state resistance

2N7424U

3421

4011

V_GS= -12V dc, condition A,

pulsed (see 4.5.1), I_D= I_D1

r_DS(ON)2

0.048

0.071

0.159

Ω

2N7425U

2N7426U

Forward voltage

V_GS= 0V dc, condition A, pulsed

(see 4.5.1), I_D= I_D1

V_SD

2N7424U

2N7425U

2N7426U

-3.0

-3.3

-3.0

V dc

See footnotes at end of table.

9

MIL-PRF-19500/655E

TABLE I. Group A inspection - Continued.

Inspection 1/

Subgroup 3

MIL-STD-750

Condition

Symbol

Limits

Min Max

Unit

Method

High temperature

operation

T_C= T_J= +125°C

Gate current

3411

3413

3421

I_GSS2

nA dc

V_GS= ±20V dc, bias condition C, V_DS

0V

=

±200

Drain current

V_GS= 0V dc, bias condition C,

V_DS= 80 percent of rated V_DS

I_DSS2

-0.25

mA dc

Static drain to source on-

state resistance

2N7424U

V_GS= -12V dc, condition A,

pulsed (see 4.5.1), I_D= I_D2

r_DS(ON)3

0.085

0.135

0.35

Ω

2N7425U

2N7426U

Gate to source voltage

(threshold)

3403

V_GS(TH)2

-1.0

V dc

V_DS≥ V_GS, I_D= -1 mA dc

T_C= T_J= -55°C

Low temperature

operation

Gate to source voltage

(threshold)

3403

3472

V_GS(TH)3

-5.0

V dc

V_DS≥ V_GS(TH)3, I_D= -1 mA dc

Subgroup 4

Switching time test

I_D= I_D1, V_GS= -12 V dc, R_G= 2.35 Ω,

V_DD= 50 percent of rated V_DS

Turn-on delay time

2N7424U

t_D(on)

35

37

ns

2N7425U

2N7426U

Rise time

2N7424U

t_r

150

170

141

ns

2N7425U

2N7426U

Turn-off delay time

2N7424U

t_D(off)

200

190

148

ns

2N7425U

2N7426U

Fall time

t_f

2N7424U

200

190

220

ns

2N7425U

2N7426U

See footnotes at end of table.

10

MIL-PRF-19500/655E

TABLE I. Group A inspection - Continued.

Inspection 1/

MIL-STD-750

Condition

Symbol

Limits

Unit

Method

3475

Min

Max

Subgroup 4 - continued

I_D= rated I_D2, V_DD= 15 V (see 4.5.1)

g_FS

Forward transconductance

2N7424U

18

15

14

S

2N7425U

2N7426U

Subgroup 5

Safe operating area

test (high voltage)

3474

See figure 4

t_p= 10 ms min. V_DS= 80 percent of

max. rated V_DS

Electrical measurements

Subgroup 6

See table I, subgroup 2

Not applicable

Subgroup 7

Gate charge

3471

Condition B

On-state gate charge

2N7424U

Q_G(ON)

Q_GS

Q_GD

t_rr

300

290

300

nC

2N7425U

2N7426U

Gate to source charge

2N7424U

70

72

65

nC

2N7425U

2N7426U

Gate to drain charge

2N7424U

91

90

58

nC

2N7425U

2N7426U

Reverse recovery time

3473

di/dt = -100 A/µs, V_DD≤ -50 V

I_D= I_D1

2N7424U

2N7425U

2N7426U

270

300

738

ns

1/ For sampling plan, see MIL-PRF-19500.

2/ This test required for the following end-point measurements only:

Group B, subgroups 3 and 4 (JANS).

Group B, subgroups 2 and 3 (JANTXV).

Group C, subgroups 2 and 6.

Group E, subgroup 1.

11

MIL-PRF-19500/655E

TABLE II. Group D inspection.

Inspection

1/ 2/ 3/

Symbol

Pre-irradiation

limits

Post-irradiation limits

F 4/

Unit

MIL-STD-750

R and F

R

Method

Conditions

Min

Max

Min

Max

Min

Max

Subgroup 1

Not

applicable

Subgroup 2

T_C= + 25°C

Steady-

state total

dose

1019

V_GS= -12 V;

V_DS= 0 V

irradiation

(V bias)

GS

5/

Steady-

state total

dose

V_GS= 0 V;

V_DS= 80 percent

of rated V_DS

irradiation

(preirradiation)

(V bias)

DS

5/

End-point

electricals

Breakdown

voltage,

drain to

3407

3403

V_GS= 0 V;

I_D= -1 mA;

bias condition C

V_(BR)DSS

source

2N7424U

-60

V dc

2N7425U

2N7426U

-100

-200

-100

-200

-100

-200

Gate to

V_GS(th)1

V_DS≥ V_GS

,

source

voltage

I_D= -1 mA

(threshold)

2N7424U

-2.0

-4.0

-2.0

-4.0

-2.0

-5.0

V dc

2N7425U

2N7426U

Gate

current

3411

3413

V_GS= -20 V,

V_DS= 0 V,

bias condition C

I_GSSF1

I_GSSR1

I_DSS

-100

100

-25

-100

100

-25

-100

100

-25

nA

dc

Gate

current

V_GS= +20 V,

V_DS= 0 V,

bias condition C

nA

dc

Drain

current

V_GS= 0 V,

V_DS= 80 percent

µA

dc

of rated V

DS

(preirradiation),

bias condition C

See footnotes at end of table.

12

MIL-PRF-19500/655E

TABLE II. Group D inspection - Continued.

Pre-irradiation

limits

Post-irradiation limits

F 4/

Max

Unit

Inspection

1/ 2/ 3/

MIL-STD-750

Symbol

R and F

R

Method

3405

Conditions

Min

Max

Min

Max

Min

Subgroup 2

continued

T_C= + 25°C

Static drain

to source

on-state

V_GS= -12 V,

V_DS(on)

I_D= I_D2

,

condition A,

pulsed (see

4.5.1)

voltage

2N7424U

2N7425U

2N7426U

-1.35

-1.632

-2.88

V dc

-1.632

-2.772

-1.632

-2.772

Forward

voltage

4011

V_GS= 0 V,

V_SD

I_D= I_D1

,

source drain

diode

bias condition C

2N7424U

-3.0

-3.3

-3.0

-3.3

-3.0

-3.3

-3.0

V dc

2N7425U

2N7426U

1/

2/

For sampling plan see MIL-PRF-19500.

Group D qualification may be performed prior to lot formation. Wafers qualified to these group D QCI

requirements may be used for any other specification utilizing the same die design.

At the manufacturer’s option, group D samples need not be subjected to the screening tests, and may

be assembled in its qualified package or in any qualified package that the manufacturer has data to

correlate the performance to the designated package.

3/

4/

5/

The “F” designation represents devices which pass end-points at R and F designated total-ionizing-dose

(TID)

Separate samples shall be pulled for each bias.

13

MIL-PRF-19500/655E

* TABLE III. Group E inspection (all quality levels) for qualification or re-qualification only.

Sample

MIL-STD-750

Conditions

Inspection

Subgroup 1

Method

plan

45 devices

c = 0

Temperature cycle

Hermetic seal

1051

1071

Condition G, 500 cycles

See table I, subgroup 2

Fine leak

Gross leak

Electrical measurements

Subgroup 2 1/

45 devices

c = 0

Steady-state gate bias

Electrical measurements

Steady-state reverse bias

Electrical measurements

Subgroup 4

1042

Condition B, 1,000 hours

See table I, subgroup 2

Condition A, 1,000 hours

See table I, subgroup 2

sample size

N/A

Thermal impedance curves

Subgroup 10

See MIL-PRF-19500.

Commutating diode for safe

operating area test procedure

for measuring dv/dt during

reverse recovery of power

MOSFET transistors or

insulated gate bipolar

transistors

3476

Test conditions shall be derived by the

manufacturer.

22 devices

c = 0

14

MIL-PRF-19500/655E

* TABLE III. Group E inspection (all quality levels) - for qualification or re-qualification only - Continued.

Qualification

MIL-STD-750

and large lot

Inspection

quality

Method

Conditions

conformance

inspection

Subgroup 11

3 devices

SEE 2/ 3/ 4/

1080

See figure 5.

, I_GSSR1, and I

Electrical measurements

5/

I

in accordance with table I,

DSS1

GSSF1

subgroup 2

Fluence = 3E5 ±20 percent ions/cm²

SEE irradiation

2N7424U

Flux = 2E3 to 2E4 ions/cm²/sec, temperature = +25 ±5 °C

Surface LET = 28 MeV-cm²/mg ±5%,

range = 42.8 µm ±7.5%, energy = 283.3 MeV ±7.5%

In-situ bias conditions: V_DS= -60 V and V_GS= +5 V

V_DS= -50 V and V_GS= +10 V

V_DS= -35 V and V_GS= +15 V

(typical 4.53 MeV/nucleon at Brookhaven National Lab

Accelerator)

2N7425U

2N7426U

2N7424U

In-situ bias conditions: V_DS= -100 V and V_GS= +10 V

V_DS= -70 V and V_GS= +15 V

V_DS= -60 V and V_GS= +20 V

(nominal 4.53 MeV/nucleon at Brookhaven National Lab

Accelerator)

In-situ bias conditions: V_DS= -200 V and V_GS= +15 V

(nominal 4.53 MeV/nucleon at Brookhaven National Lab

Accelerator)

Surface LET = 37 MeV-cm²/mg ±5%,

range = 39 µm ±5%, energy = 305 MeV ±5%

In situ bias conditions: V_DS= -55 V and V_GS= +0 V

V_DS= -45 V and V_GS= +5 V

V_DS= -35 V and V_GS= +10 V

V_DS= -30 V and V_GS= +15 V

(typical 3.77 MeV/nucleon at Brookhaven National Lab

Accelerator)

2N7425U

In situ bias conditions: V_DS= -100 V and V_GS= +5 V

V_DS= -70 V and V_GS= +10 V

V_DS= -50 V and V_GS= +15 V

V_DS= -40 V and V_GS= +20 V

(nominal 3.77 MeV/nucleon at Brookhaven National Lab

Accelerator)

15

MIL-PRF-19500/655E

* TABLE III. Group E inspection (all quality levels) - for qualification or re-qualification only - Continued.

Qualification

MIL-STD-750

and large lot

Inspection

Subgroup 11 - continued

2N7424U

quality

conformance

inspection

Method

Conditions

3 devices

Surface LET = 59.9 MeV-cm²/mg ±5%,

range = 32.8 µm ±5%, energy = 345 MeV ±5%

In situ bias conditions: V_DS= -40 V and V_GS= 0 V

V_DS= -35 V and V_GS= +5 V

(typical 2.72 MeV/nucleon at Brookhaven National Lab

Accelerator)

2N7425U

In situ bias conditions: V_DS= -60 V and V_GS= 0 V

(typical 2.72 MeV/nucleon at Brookhaven National Lab

Accelerator)

Electrical measurements

5/

I_GSSF1, I_GSSR1, and I_DSS1in accordance with table I, subgroup 2

1/

2/

A separate sample for each test shall be pulled.

Group E qualification of SEE testing may be performed prior to lot formation. Qualification may be extended

to other specification sheets utilizing the same structurally identical die design.

Device qualification to a higher level LET is sufficient to qualify all lower level LETs.

The sampling plan applies to each bias condition.

Examine I_GSSF1, I_GSSR1and I_DSS1before and following SEE irradiation to determine acceptability for each bias

condition. Other test conditions in accordance with table I, subgroup 2, may be performed at the

manufacturer’s option.

3/

4/

5/

16

MIL-PRF-19500/655E

FIGURE 2. Thermal impedance curve.

17

MIL-PRF-19500/655E

2N7424U

2N7425U

2N7426U

FIGURE 3. Maximum drain current versus case temperature graphs.

18

MIL-PRF-19500/655E

FIGURE 4. Safe operating area graph.

19

MIL-PRF-19500/655E

* FIGURE 4. Safe operating area graph - Continued.

20

MIL-PRF-19500/655E

* FIGURE 4. Safe operating area graph - Continued.

21

MIL-PRF-19500/655E

2N7424U

Typical SEE Response

-70

-60

-50

-40

-30

-20

-10

0

LET=28±5%

Range=42.8µm±5%

Energy=283.3MeV±7.5%

LET=37±5%

Range=39µm±5%

Energy=305MeV±5%

LET=59.9±5%

Range=32.8µm±5%

Energy=345MeV±5%

0

5

10

15

20

VGS Bias (Volts)

2N7425U

Typical SEE Response

-120

-100

-80

-60

-40

-20

0

LET=28±5%

Range=42.8µm±5%

Energy=283.3MeV±7.5%

LET=37±5%

Range=39µm±5%

Energy=305MeV±5%

LET=59.9±5%

Range=32.8µm±5%

Energy=345MeV±5%

0

5

10

15

20

VGS Bias (Volts)

* FIGURE 5. Typical single event effects safe operating area graphs.

22

MIL-PRF-19500/655E

2N7426U

Typical SEE Response

-250

-200

-150

-100

-50

LET=28±5%

Range=42.8µm±5%

Energy=283.3MeV±7.5%

LET=37±5%

Range=39µm±5%

Energy=305MeV±5%

0

5

10

15

20

VGS Bias (Volts)

* FIGURE 5. Typical single event effects safe operating area graphs - Continued.

23

MIL-PRF-19500/655E

5. PACKAGING

5.1 Packaging. For acquisition purposes, the packaging requirements shall be as specified in the contract or order

(see 6.2). When packaging of materiel is to be performed by DoD or in-house contractor personnel, these personnel

need to contact the responsible packaging activity to ascertain packaging requirements. Packaging requirements are

maintained by the Inventory Control Point's packaging activities within the Military Service or Defense Agency, or

within the Military Service’s system commands. Packaging data retrieval is available from the managing Military

Department's or Defense Agency's automated packaging files, CD-ROM products, or by contacting the responsible

packaging activity.

6. NOTES

(This section contains information of a general or explanatory nature that may be helpful, but is not mandatory.

The notes specified in MIL-PRF-19500 are applicable to this specification.)

6.1 Intended use. Semiconductors conforming to this specification are intended for original equipment design

applications and logistic support of existing equipment.

6.2 Acquisition requirements. Acquisition documents should specify the following:

a. Title, number, and date of this specification.

b. Packaging requirements (see 5.1).

c. Lead finish (see 3.4.1).

d. Product assurance level and type designator.

* e. For acquisition of RHA designated devices, table II, subgroup 1 testing of group D herein is optional.

If subgroup 1 is desired, it must be specified in the contract.

* 6.3 Qualification. With respect to products requiring qualification, awards will be made only for products which are,

at the time of award of contract, qualified for inclusion in Qualified Manufacturers List (QML 19500) whether or not

such products have actually been so listed by that date. The attention of the contractors is called to these

requirements, and manufacturers are urged to arrange to have the products that they propose to offer to the Federal

Government tested for qualification in order that they may be eligible to be awarded contracts or orders for the

products covered by this specification. Information pertaining to qualification of products may be obtained from DLA

Land and Maritime, ATTN: VQE, P.O. Box 3990, Columbus, OH 43218-3990 or e-mail vqe.chief@dla.mil. An online

listing of products qualified to this specification may be found in the Qualified Products Database (QPD) at

https://assist.daps.dla.mil.

6.4 Cross-reference list. The following table shows the generic P/N and its associated military P/N (without JAN

and RHA prefix).

Generic P/N

Military P/N

IRHNA9064

IRHNA9160

IRHNA9260

2N7424U

2N7425U

2N7426U

6.5 JANC die versions. The JANHC and JANKC die versions of these devices are covered under performance

specification sheet MIL-PRF-19500/657.

24

MIL-PRF-19500/655E

6.6 Changes from previous issue. The margins of this specification are marked with asterisks to indicate where

changes from the previous issue were made. This was done as a convenience only and the Government assumes

no liability whatsoever for any inaccuracies in these notations. Bidders and contractors are cautioned to evaluate the

requirements of this document based on the entire content irrespective of the marginal notations and relationship to

the last previous issue.

Custodians:

Army - CR

Air Force - 85

DLA - CC

Preparing activity:

DLA - CC

(Project 5961-2012-013)

*

NOTE: The activities listed above were interested in this document as of the date of this document. Since

organizations and responsibilities can change, you should verify the currency of the information above using the

ASSIST Online database at https://assist.daps.dla.mil/ .

25


型号：	JANSR2N7424U
厂家：	Infineon
描述：	Rad hard, -60V, -48A, single, P-channel MOSFET, R4 in a SMD-2 package - SMD-2, 100 krad(Si) TID, QPL 开关脉冲晶体管
文件：	总25页 (文件大小：337K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

JANSR2N7424U [INFINEON]

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