PXAC203302FVV1R250XTMA1 [INFINEON]
Thermally-Enhanced High Power RF LDMOS FET 330 W, 28 V, 1880 â 2025 MHz;
| 型号： | PXAC203302FVV1R250XTMA1 |
| 厂家： | 
Infineon |
| 描述： | Thermally-Enhanced High Power RF LDMOS FET 330 W, 28 V, 1880 â 2025 MHz |
| 文件： | 总8页 (文件大小：1192K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PXAC203302FV
Thermally-Enhanced High Power RF LDMOS FET
330 W, 28 V, 1880 – 2025 MHz
Description
PXAC203302FV
Package H-37275-4
The PXAC203302FV is a 330-watt LDMOS FET with an asym-
metrical design intended for use in multi-standard cellular power
amplifier applications in the 1880 to 2025 MHz frequency band.
Features include dual-path design, input matching, high gain and
thermally-enhanced package with earless flanges. Manufactured
with Infineon's advanced LDMOS process, this device provides
excellent thermal performance and superior reliability.
Features
Single-carrier WCDMA Drive-up
VDD = 28 V, IDQ = 900 mA, ƒ = 2025 MHz,
3GPP WCDMA signal,
•ꢀ Broadband internal input and output matching
•ꢀ Asymmetrical Doherty design
- Main : P
- Peak : P
= 130 W Typ
= 200 W Typ
1dB
1dB
PAR = 10 dB, 3.84 MHz BW
24
20
16
12
8
60
40
20
0
•ꢀ Typical Pulsed CW performance, 2025 MHz, 28 V,
Efficiency
combined outputs, Doherty Configuration
- Output power at P
- Efficiency = 55%
- Gain = 16 dB
= 250 W
1dB
Gain
•ꢀ Capable of handling 10:1 VSWR @28 V, 250 W
(CW) output power
•ꢀ Human Body Model Class 2 (per ANSI/ESDA/
-20
-40
-60
JEDEC JS-001)
PAR @ 0.01% CCDF
•ꢀ Integrated ESD protection
•ꢀ Low thermal resistance
4
0
c203302fv_g1
•ꢀ Pb-free and RoHS compliant
25
30
35
40
45
50
55
Average Output Power (dBm)
RF Characteristics
Single-carrier WCDMA Specifications (tested in Infineon Doherty test fixture)
= 28 V, I = 900 mA, V = 1.1 V, P = 56 W avg, ƒ = 2025 MHz, 3GPP signal, channel bandwidth = 3.84MHz,
V
DD
DQ
GSPEAK
OUT
1
peak/average = 10 dB @ 0.01% CCDF
Characteristic
Gain
Symbol
Min
15
Typ
16
Max
—
Unit
dB
G
ps
Drain Efficiency
hD
45
49
—
%
Adjancent Channel Power Ratio
ACPR
—
–30.5
–26
dBc
All published data at T
= 25°C unless otherwise indicated
CASE
ESD: Electrostatic discharge sensitive device—observe handling precautions!
Data Sheet 1 of 8
Rev. 02.1, 2016-06-22
PXAC203302FV
DC Characteristics (each side)
Characteristic
Conditions
Symbol
Min
65
—
Typ
—
Max
—
Unit
V
Drain-Source Breakdown Voltage
Drain Leakage Current
V
GS
= 0 V, I = 10 mA
V(
BR)DSS
DS
V
= 28 V, V = 0 V
I
I
—
1
µA
µA
W
DS
DS
GS
DSS
V
= 63 V, V = 0 V
—
—
10
—
GS
DSS
On-State Resistance (main)
On-State Resistance (peak)
Operating Gate Voltage (main)
(peak)
V
GS
= 10 V, V = 0.1 V
R
R
—
0.088
0.088
2.7
DS
DS(on)
DS(on)
V
GS
= 10 V, V = 0.1 V
—
—
W
DS
V
= 28 V, I
= 28 V, I
= 900 mA
= 0 A
V
GS
2.5
0.6
—
2.8
1.4
1
V
DS
DS
DQ
DQ
V
V
GS
1.1
V
Gate Leakage Current
V
GS
= 10 V, V = 0 V
I
GSS
—
µA
DS
Maximum Ratings
Parameter
Symbol
Value
65
Unit
V
Drain-Source Voltage
Gate-Source Voltage
Operating Voltage
V
DSS
V
–6 to +10
0 to +32
225
V
GS
DD
V
V
Junction Temperature
Storage Temperature Range
T
°C
J
T
STG
–65 to +150
0.62
°C
Thermal Resistance (main, T
(peak, T
= 70°C, 56.2 W CW)
= 70°C, 260 W CW)
R
°C/W
°C/W
CASE
qJC
qJC
R
0.35
CASE
Ordering Information
Type and Version
Order Code
Package Description
H-37275-4, earless flange
H-37275-4, earless flange
Shipping
PXAC203302FV V1 R0
PXAC203302FV V1 R250
PXAC203302FVV1R0XTMA1
PXAC203302FVV1R250XTMA1
Tape & Reel, 50 pcs
Tape & Reel, 250 pcs
Data Sheet
2 of 8
Rev. 02.1, 2016-06-22
PXAC203302FV
Typical Performance (data taken in a production test fixture)
Single-carrier WCDMA Drive-up
VDD = 28 V, IDQ = 900 mA, ƒ = 2025 MHz,
3GPP WCDMA signal, PAR = 10 dB,
BW = 3.84 MHz
Single-carrier WCDMA Broadband
Performance
VDD = 28 V, IDQ = 900 mA, POUT = 47.5 dBm,
3GPP WCDMA signal, PAR = 10 dB
30
25
20
15
10
50
45
40
35
30
-10
-20
-30
-40
-50
-60
-70
60
50
40
30
20
10
0
Efficiency
Gain
ACPU
ACPL
Efficiency
c203302fv_g3
c203302fv_g2
1750
1850
1950
2050
2150
27
32
37
42
47
52
57
Frequency (MHz)
Average Output Power (dBm)
Single-carrier WCDMA Broadband
Performance
CW Performance
VDD = 28 V, IDQ = 900mA
VDD = 28 V, IDQ = 900 mA, POUT = 47.5 dBm,
3GPP WCDMA signal, PAR = 10 dB
2010MHz Gain
2025MHz Gain
1920MHz Gain
1880MHz Gain
2025MHz Eff
2010MHz Eff
1920MHz Eff
1880MHz Eff
24
60
-15
-20
-25
-30
-35
-5
20
16
12
8
50
40
30
20
10
0
-10
-15
-20
-25
Gain
ACPU
ACPL
IRL
4
Efficiency
c203302fv_g4
0
c203302fv_g5
1750
1850
1950
2050
2150
29
33
37
41
45
49
53
57
Frequency (MHz)
Output Power (dBm)
Data Sheet
3 of 8
Rev. 02.1, 2016-06-22
PXAC203302FV
Typical Performance (cont.)
CW Performance Small Signal
CW Performance
at various VDD
Gain & Input Return Loss
VDD = 28 V, IDQ = 900 mA
IDQ = 900 mA, ƒ = 2025 MHz
24V Gain
28V Gain
32V Gain
24V Eff
28V Eff
18
17
16
15
-5
24
60
50
40
30
20
10
0
32V Eff
20
IRL
-10
-15
-20
16
Gain
12
8
Gain
4
Efficiency
0
c203302fv_g7
c203302fv_g6
1825
1875
1925
1975
2025
2075
29
33
37
41
45
49
53
57
Output Power (dBm)
Frequency (MHz)
Load Pull Performance
Main Side Load Pull Performance – Pulsed CW signal: 160 µs, 10% duty cycle, 28 V, I
= 800 mA, Class AB
DQ
P
1dB
Max Output Power
Max Drain Efficiency
Zs
[W]
Zl
[W]
Zl
[W]
Freq
[MHz]
Gain
[dB]
P
P
Gain
[dB]
P
P
OUT
hD
hD
OUT
OUT
OUT
[dBm]
52.5
52.5
52.4
52.1
52.2
[W]
179
176
174
164
168
[dBm]
50.0
50.1
50.4
50.0
50.1
[W]
100
102
108
100
101
[%]
[%]
66.7
65.5
65.6
63.2
62.9
1880
1900
1920
2010
2025
2.78 – j6.42 1.33 – j2.33
2.94 – j6.93 1.31 – j2.40
3.81 – j7.27 1.30 – j2.46
6.13 – j8.11 1.17 – j2.61
8.73 – j8.92 1.29 – j2.65
18.5
18.5
18.5
18.4
18.8
55.1
54.4
53.8
50.6
53.9
3.40 – j1.31
2.82 – j1.21
2.61 – j1.25
2.19 – j1.29
2.19 – j1.35
21.2
21.2
21.0
21.2
21.2
Peak Side Load Pull Performance – Pulsed CW signal: 160 µs, 10% duty cycle, 28 V, V = 1.4 V, Class C
GS
P
1dB
Max Output Power
Max Drain Efficiency
Zs
[W]
Zl
[W]
Zl
[W]
Freq
[MHz]
Gain
[dB]
P
P
Gain
[dB]
P
P
OUT
hD
hD
OUT
OUT
OUT
[dBm]
54.0
54.0
53.9
53.7
53.8
[W]
250
249
247
236
192
[dBm]
52.0
52.1
51.9
52.1
51.9
[W]
159
164
156
162
155
[%]
[%]
1880 1.47 – j3.68 2.40 – j2.40
1900 1.52 – j4.02 2.08 – j2.31
1920 1.54 – j4.21 2.29 – j2.39
2010 2.84 – j4.51 2.51 – j2.67
2025 4.34 – j5.13 2.68 – j2.58
15.4
15.8
15.9
16.1
16.4
54.8
55.8
55.6
54.5
55.2
1.69 – j0.40
1.58 – j0.55
1.44 – j0.58
1.50 – j1.19
1.37 – j1.22
16.5
16.9
17.0
17.2
17.3
65.4
66.9
66.7
64.3
64.6
Data Sheet
4 of 8
Rev. 02.1, 2016-06-22
PXAC203302FV
Reference Circuit , 1880 – 2025 MHz
RO4350, .020 MIL
(61)
RO4350, .020 MIL
(61)
VGS
VDD
C212
C214
C213
C201
C103
C215
C101
R102
C106
C203
C102
C111
C204
C206
RF_IN
RF_OUT
U1
C112
C108
C205
C105
C210
C208
R101
C109
C107
C202
R103
VGSPK
C110
C209
C104
VDD
C207
C211
PXAC203302FV_IN_01
PXAC203302FV_OUT_01
p
x a c 2 0 3 3 0 2 f v _ C D _ 0 6 - 0 9 - 2 0 1 5
Reference circuit assembly diagram (not to scale)
Data Sheet
5 of 8
Rev. 02.1, 2016-06-22
PXAC203302FV
Reference Circuit (cont.)
Reference Circuit Assembly
DUT
PXAC203302FC V1
Test Fixture Part No.
PCB
LTA/PXAC203302FC V1
Rogers 4350, 0.508 mm [0.020”] thick, 2 oz. copper, εr = 3.66, ƒ = 1880 – 2025 MHz
Find Gerber files for this test fixture on the Infineon Web site at http://www.infineon.com/rfpower
Components Information
Component
Input
Description
Manufacturer
P/N
C101, C110
Capacitor, 10 µF
Taiyo Yuden
UMK325C7106MM-T
ATC600F150JT250XT
ATC600F1R0BT250XT
ATC600F2R7BT250XT
ATC600F1R6BT250XT
ATC600F0R5BT250XT
ATC600F0R8BT250XT
ERJ-3GEYJ100V
C102, C103, C104, C105 Capacitor, 15 pF
ATC
C106, C111
C107
Capacitor, 1 pF
Capacitor, 2.7 pF
Capacitor, 1.6 pF
Capacitor, 0.5 pF
Capacitor, 0.8 pF
Resistor, 10 W
ATC
ATC
C108
ATC
C109
ATC
C112
ATC
R101, R102
R103
Panasonic Electronic Components
Resistor, 50 W
Richardson
Anaren
C16A50Z4
U1
Hybrid Coupler
X3C19P1-05S
Output
C201, C202
C203
Capacitor, 15 pF
Capacitor, 1.6 pF
Capacitor, 6.8 pF
Capacitor, 0.3 pF
Capacitor, 10 µF
ATC
ATC600F150JT250XT
ATC600F1R6BT250XT
ATC600F6R8BT250XT
ATC600F0R3BT250XT
UMK325C7106MM-T
ATC
C204, C205
C206
ATC
ATC
C207, C208, C209,
C212, C213, C214
Taiyo Yuden
C210
Capacitor, 0.5 pF
Capacitor, 220 µF
ATC
ATC600F0R5BT250XT
SK221M050ST
C211, C215
Cornell Dubilier Electronics (CDE)
Pinout Diagram (top view)
D1
D2
Pin
D1
D2
G1
G2
S
Description
Drain device 1 (Main)
Drain device 2 (Peak)
Gate device 1 (Main)
Gate device 2 (Peak)
Source (flange)
S
Main
G1
Peak
G2
H- 372 75- 4_ fl- Dmp _pd _01 _08 -1 3-2 01 4
Lead connections for PXAC203302FV
Data Sheet
6 of 8
Rev. 02.1, 2016-06-22
PXAC203302FV
Package Outline Specifications
Package H-37275-4
13.72
[.540]
2X 45° X 1.19
[45° X .047]
2x (2.03
[.080])
C
L
3.226±0.508
[.127±.020]
D1
D2
10.160
[.400]
C
L
9.14
[.360]
(16.61
[.654])
G1
G2
C
C
L
L
+0.38
4X R0.51
–0.13
4X 11.68
[.460]
+.015
R.020
–.005
[
]
24.40
[1.000]
31.242±0.28
[1.230±.011]
2.13
[.084] SPH
+0.25
4.57
–0.13
+.010
.180
C
-.005
[
]
L
1.63
[.064]
C
66065-A0004-C250-01-0027 H-37275-4-X
37275-4-r02_PO_12-22-2014
h
-
32.26
[1.270]
S
Diagram Notes—unless otherwise specified:
1. Interpret dimensions and tolerances per ASME Y14.5M-1994.
2. Primary dimensions are mm. Alternate dimensions are inches.
3. All tolerances 0.127 [.005] unless specified otherwise.
4. Pins: D1, D2 – drains; G1, G2 – gates; S – source.
5. Lead thickness: 0.127 + 0.051 mm [0.005 0.002 inch].
6. Gold plating thickness: 1.14 0.38 micron [45 15 microinch].
Find the latest and most complete information about products and packaging at the Infineon Internet page
http://www.infineon.com/rfpower
Data Sheet
7 of 8
Rev. 02.1, 2016-06-22
PXAC203302FV V1
Revision History
Revision
Date
Data Sheet Type
Advance
Page
Subjects (major changes since last revision)
01
02
2014-10-08
2015-06-09
All
Data Sheet reflects advance specification for product development
Production
All
All
Data Sheet reflects released product specification
Revised all data and includes updated final specs, typical performance graphs, loadpull, refer-
ence circuit, package outline
02.1
2016-06-22
Production
2
Updated ordering information
We Listen toYour Comments
Any information within this document that you feel is wrong, unclear or missing at all?
Your feedback will help us to continuously improve the quality of this document.
Please send your proposal (including a reference to this document) to:
(highpowerRF@infineon.com)
To request other information, contact us at:
+1 877 465 3667 (1-877-GO-LDMOS) USA
or +1 408 776 0600 International
Edition 2016-06-22
Published by
Infineon Technologies AG
85579 Neubiberg, Germany
© 2014 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics.
With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the
application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind,
including without limitation, warranties of non-infringement of intellectual property rights of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com/rfpower).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in question,
please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written approval of In-
fineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support device
or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be
implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is
reasonable to assume that the health of the user or other persons may be endangered.
Data Sheet
8 of 8
Rev. 02.1, 2016-06-22
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