Q67000-A9303 [INFINEON]
1-A DC Motor Driver for Servo Driver Applications; 1 -A DC电机驱动器伺服驱动器应用
| 型号： | Q67000-A9303 |
| 厂家： | 
Infineon |
| 描述： | 1-A DC Motor Driver for Servo Driver Applications |
| 文件： | 总14页 (文件大小：137K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
1-A DC Motor Driver for Servo Driver Applications
TLE 4206
Overview
Features
• Optimized for headlight beam control applications
• Current-peak-blanking (no electrolytic capacitor at VS)
• Delivers up to 0.8 A continuous
• Low saturation voltage; typ.1.2 V total @ 25 °C; 0.4 A
P-DIP-16-5
• Output protected against short circuit
• Overtemperature protection with hysteresis
• Over- and undervoltage lockout
• No crossover current
• Internal clamp diodes
• Enhanced power packages
Type
Ordering Code
Package
TLE 4206
Q67000-A9303
P-DIP-16-5
P-DSO-14-4
P-DSO-14-4
TLE 4206 G Q67006-A9299
Description
The TLE 4206 is a fully protected H-Bridge Driver designed specifically for automotive
headlight beam control and industrial servo control applications.
The part is built using the Siemens bipolar high voltage power technology DOPL.
The standard enhanced power P-DSO-14 package meets the application requirements
and saves PCB-board space and costs. A P-DIP-16 package is also available.
The servo-loop-parameter pos.- and neg. Hysteresis, pos.- and neg. deadband and
angle-amplification are programmable with external resitors.
An internal window-comparator controls the input line. In the case of a fault condition,
like short circuit to GND, short circuit to supply-voltage, and broken wire, the
TLE 4206 stops the motor immediately (brake condition).
The “programable current-peak-blanking” disables the servo-loop during the VS voltage
drop caused by the stall current spike. So there is no need of an electrolytic blocking
capacitor at the VS-terminal.
Furthermore the built in features like over- and undervoltage-lockout, short-circuit-
protection and over-temperature-protection will open a wide range of automotive- and
industrial applications.
Semiconductor Group
1
1998-02-01
TLE 4206
P-DSO-14-4
P-DIP-16-5
FB
HYST
N.C.
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
REF
FB
HYST
GND
GND
GND
OUT1
CPB
1
2
3
4
5
6
7
14
13
12
11
10
9
REF
RANGE
N.C.
RANGE
GND
GND
GND
OUT2
VS
GND
GND
GND
OUT1
CPB
GND
GND
GND
OUT2
VS
8
AEP02261
AEP02262
Figure 1 Pin Configuration (top view)
Pin Definitions and Functions
Pin No.
Pin No.
Symbol
Function
P-DSO-14-4
P-DIP-16-5
1
2
1
2
FB
Feedback Input
Hysteresis I/O
Ground
HYST
GND
3, 4, 5,
4, 5, 6,
10, 11, 12
11, 12, 13
6
7
OUT1
CPB
Power Output 1
7
8
Current Peak Blanking Input
Power Supply Voltage
Power Output 2
8
9
VS
9
10
15
16
3, 14
OUT2
RANGE
REF
13
14
Range Input
Reference Input
N.C.
Not connected
Semiconductor Group
2
1998-02-01
TLE 4206
VS
8
TLE 4206G
13
Range-
AMP
RANGE
Half-
Bridge
6
9
OUT1
OUT2
14
1
REF
FB
Servo-
AMP
Protection
and Logic
Half-
Bridge
2
Hyst-
AMP
HYST
3,4,5,
10,11,12
7
CPB
GND
AEB02258
Figure 2 Block Diagram (Pin numbers are valid for TLE 4206 G in P-DSO-14-4)
Semiconductor Group
3
1998-02-01
TLE 4206
Absolute Maximum Ratings
Parameter
Symbol Limit Values Unit
min. max.
Remarks
Voltages
Supply voltage
VS
VS
VI
– 0.3 45
– 1
– 0.3 20
V
V
V
–
Supply voltage
–
t < 0.5 s; IS > – 2 A
Logic input voltages
(FB, REF, RANGE, HYST,
CPB)
–
Currents
Output current (OUT1, OUT2) IOUT
–
–
1
A
A
internally limited
–
Output current (Diode)
IOUT
IIN
– 1
Input current
– 2
– 6
2
6
mA
mA
(FB, REF, RANGE, HYST)
t < 2 ms; t/T < 0.1
Temperatures
Junction temperature
Storage temperature
Tj
– 40
– 50
150
150
°C
°C
–
–
Tstg
Thermal Resistances
Junction pin
(P-DSO-14-4)
Rthj-pin
RthjA
Rthj-pin
RthjA
–
–
–
–
25
65
15
60
K/W
K/W
K/W
K/W
measured to pin 5
Junction ambient
(P-DSO-14-4)
–
Junction pin
(P-DSO-16-5)
measured to pin 5
–
Junction ambient
(P-DSO-16-5)
Note: Maximum ratings are absolute ratings; exceeding any one of these values may
cause irreversible damage to the integrated circuit.
Semiconductor Group
4
1998-02-01
TLE 4206
Operating Range
Parameter
Symbol
Limit Values
Unit Remarks
min.
max.
Supply voltage
VS
8
18
V
After VS rising
above VUV ON
Supply voltage increasing VS
Supply voltage decreasing VS
– 0.3
– 0.3
– 0.8
– 50
– 40
VUV ON
VUV OFF
0.8
V
Outputs in tristate
V
Outputs in tristate
Output current
IOUT1-2
A
–
–
–
Input current (FB, REF)
Junction temperature
IIN
Tj
500
µA
°C
150
Semiconductor Group
5
1998-02-01
TLE 4206
Electrical Characteristics
8 V < VS < 18 V; IOUT1-2 = 0 A; – 40 °C < Tj < 150 °C
(unless otherwise specified)
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Current Consumption
Supply current
Supply current
IS
IS
–
–
12 20
20 30
mA –
mA IOUT1 = 0.4 A
I
OUT2 = – 0.4 A
mA IOUT1 = 0.8 A
OUT2 = – 0.8 A
Supply current
IS
–
30 50
I
Over- and Under Voltage Lockout
UV Switch ON voltage
UV Switch OFF voltage
UV ON/OFF Hysteresis
OV Switch OFF voltage
OV Switch ON voltage
OV ON/OFF Hysteresis
VUV ON
VUV OFF
VUVHY
–
6
–
–
7.4 8
6.9 –
0.5 –
20.5 23
V
V
V
V
V
V
VS increasing
VS decreasing
VUV ON – VUV OFF
VS increasing
VS decreasing
VOV OFF – VOV ON
VOV OFF
VOV ON
VOVHY
17.5 20
–
–
0.5 –
Semiconductor Group
6
1998-02-01
TLE 4206
Electrical Characteristics (cont’d)
8 V < VS < 18 V; IOUT1-2 = 0 A; – 40 °C < Tj < 150 °C
(unless otherwise specified)
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Outputs OUT1-2
Saturation Voltages
Source (upper )
VSAT U
VSAT U
VSAT U
VSAT L
VSAT L
VSAT L
–
–
–
–
–
–
0.85 1.15 V
0.90 1.20 V
1.10 1.50 V
0.15 0.23 V
0.25 0.40 V
0.45 0.75 V
Tj = 25 °C
Tj = 25 °C
Tj = 25 °C
Tj = 25 °C
Tj = 25 °C
Tj = 25 °C
I
OUT = – 0.2 A
Source (upper )
OUT = – 0.4 A
Sink (upper)
OUT = – 0.8 A
Sink (lower)
OUT = 0.2 A
Sink (lower)
OUT = 0.4 A
Sink (lower)
OUT = 0.8 A
I
I
I
I
I
VSAT = VSAT U + VSAT L
VSAT = VSAT U + VSAT L
VSAT = VSAT U + VSAT L
Total drop
Total drop
Total drop
I
I
I
OUT = 0.2 A
OUT = 0.4 A
OUT = 0.8 A
VSAT
VSAT
VSAT
–
–
–
1.0 1.4
1.2 1.7
1.6 2.5
V
V
V
Clamp Diodes
Forward voltage; upper
Upper leakage current
Forward voltage; lower
VFU
ILKU
VFL
–
–
–
1
–
1.5
5
V
IF = 0.4 A
mA IF = 0.4 A
IF = 0.4 A
0.9 1.4
V
Semiconductor Group
7
1998-02-01
TLE 4206
Electrical Characteristics (cont’d)
8 V < VS < 18 V; IOUT1-2 = 0 A; – 40 °C < Tj < 150 °C
(unless otherwise specified)
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Input-Interface
Input REF
Quiescent voltage
VREFq
RREF
–
–
200 –
mV IREF = 0 µA
Input resistance
6
–
kΩ 0 V < VREF < 0.5 V
Input FB
Quiescent voltage
Input resistance
VFBq
RFB
–
–
200 –
mV IFB = 0 µA
6
–
kΩ 0 V < VFB < 0.5 V
Input/Output HYST
Current Amplification
AHYST
0.8
0.95 1.1
−
– 20 µA < IHYST
< – 10 µA;
A
HYST = IHYST / (IREF – IFB)
10 µA < IHYST
< 20 µA;
I
V
REF = 250 µA
HYST = VS / 2
REF = IFB = 250 µA
HYST = VS / 2
Current Offset
IHYSTIO
– 2
0.5 3
µA
I
V
–
–
–
–
Threshold voltage High
Deadband voltage High
Deadband voltage Low
Threshold voltage Low
Hysteresis Window
V
V
V
V
V
V
HYH / VS
DBH / VS
DBL / VS
HYL / VS
HYW / VS
–
–
–
–
3
52
–
%
%
%
%
%
%
50.4 –
49.6 –
48
4
–
5
(VHYH – VHYL)/ VS
(VDBH – VDBL)/ VS
Deadband Window
DBW / VS 0.4
0.8 1.2
Semiconductor Group
8
1998-02-01
TLE 4206
Electrical Characteristics (cont’d)
8 V < VS < 18 V; IOUT1-2 = 0 A; – 40 °C < Tj < 150 °C
(unless otherwise specified)
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Input RANGE
Input current
IRANGE
VOFFH
VOFFL
– 1
– 100 0
300 400 500 mV refer to GND
–
1
µA 0 V < VRANGE < VS
Switch-OFF voltage High
Switch-OFF voltage Low
100 mV refer to VS
Input CPB (Current Peak Blanking)
Charge current
Low voltage
ICPBCH
VCPBL
–
–
6.5 –
µA VHYL > VHYST
CPB = 0 V
;
V
20 100 mV VHYL < VHYST
< VHYH
High voltage threshold
Clamp voltage
VCPBH
VCPBC
tCPB
5
–
–
5.7 6.5
6.2 –
V
V
V
V
HYL > VHYST
HYL > VHYST
Blanking time
40
–
ms CCPB = 47 nF
Thermal Shutdown
Thermal shutdown junction TjSD
temperature
150 175 200 °C
–
–
–
Thermal switch-on junction TjSO
temperature
120
–
–
170 °C
Temperature hysteresis
∆T
30
–
K
Semiconductor Group
9
1998-02-01
TLE 4206
+VB
+VB
Dr
1N4001
CS
470 nF
Dz
36 V
VS
8
RHYH
100 kΩ
TLE 4206G
RR
RANGE 13
Range-
AMP
Half-
Bridge
50 kΩ
6 OUT1
9 OUT2
RREF
1 kΩ
RREF
VREFIN
PFB
REF 14
FB 1
Servo-
AMP
Protection
and Logic
50 kΩ
50 kΩ
M
Half-
Bridge
RFB
1 kΩ
HYST 2
Hyst-
AMP
3,4,5,
10,11,12
RHYL
7
100 kΩ
CPB
GND
CCPB
GND
47 nF
AES02259
Figure 3 Application Circuit (Pin numbers are valid for TLE 4206G in P-DSO-14-4)
Semiconductor Group
10
1998-02-01
TLE 4206
VMotor =VOUT1 -VOUT2
Motor
Status
Turn
CW
(VREF -VFB)/VS
-2.0%
-0.4%
Brake
0.4%
2.0%
Turn
CCW
DBW
DBL
DBH
HYW
HYL
HYH
AED02260
Expressions:
HY = Hysteresis
DB = Deadband
H
L
= High
= Low
W = Window
Figure 4 Hysteresis, Phaselag and Deadband-Definitions
Semiconductor Group
11
1998-02-01
TLE 4206
VS(t )
VOFFH
VHYH
VFB(t )
VDBH
VDBL
VHYL
VREF(t )
VOFFL
t
Start-Command
Stop-Command
VCPBC
VCPB(t )
VCPBH
VCPBL
t
tCPB
tCPB
Blanking-Time
tCPB
tCPB
VOUT2
H
t
t
L
VOUT1
H
Brake
CCW Brake CW
Brake
CW Brake CCW
Motor Status
L
Testconditions: VS =VB; no revers polarity voltage diode
RHYH =RHYL= 100 kΩ;
RREF =RFB = 50 kΩ
AED02314
Figure 5 Timing and Phaselag
Semiconductor Group
12
1998-02-01
TLE 4206
Package Outlines
P-DSO-14-4
(Plastic Dual Small Outline Package)
0.35 x 45˚
1)
4 -0.2
+0.06
0.19
1.27
0.1
0.4 +0.8
0.35 +0.15 2)
0.2 14x
8
±0.2
6
14
1
7
1)
8.75 -0.2
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Does not include dambar protrusion of 0.05 max. per side
GPS05093
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Data Book “Package Information”.
Dimensions in mm
SMD = Surface Mounted Device
Semiconductor Group
13
1998-02-01
TLE 4206
P-DIP-16-5
(Plastic Dual In-line Package)
±0.38
7.87
0.25 +0.1
2.54
1.7 max
1)
±0.25
±0.1
6.35
0.46
0.25
16x
±1
8.9
16
1
9
8
1)
±0.25
19.05
Index Marking
1) Does not include plastic or metal protrusion of 0.25max per side
GPD05585
Sorts of Packing
Package outlines for tubes, trays etc. are contained in our
Dimensions in mm
Data Book “Package Information”.
Semiconductor Group
14
1998-02-01
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