TLE6389-2GV50 概述
Step-Down DC/DC Controller 降压型DC / DC控制器 DC/DC转换器 开关式稳压器或控制器
TLE6389-2GV50 规格参数
是否Rohs认证: | 符合 | 生命周期: | Active |
零件包装代码: | SOIC | 包装说明: | SOP, SOP14,.25 |
针数: | 14 | Reach Compliance Code: | compliant |
ECCN代码: | EAR99 | HTS代码: | 8542.39.00.01 |
风险等级: | 5.71 | 其他特性: | CAN ALSO CONFIGURED AS PFM |
模拟集成电路 - 其他类型: | SWITCHING CONTROLLER | 控制模式: | CURRENT-MODE |
控制技术: | PULSE WIDTH MODULATION | 最大输入电压: | 60 V |
最小输入电压: | 5 V | 标称输入电压: | 13.5 V |
JESD-30 代码: | R-PDSO-G14 | JESD-609代码: | e3 |
长度: | 8.75 mm | 湿度敏感等级: | 3 |
功能数量: | 1 | 端子数量: | 14 |
最大输出电流: | 2.3 A | 封装主体材料: | PLASTIC/EPOXY |
封装代码: | SOP | 封装等效代码: | SOP14,.25 |
封装形状: | RECTANGULAR | 封装形式: | SMALL OUTLINE |
峰值回流温度(摄氏度): | NOT SPECIFIED | 认证状态: | Not Qualified |
座面最大高度: | 1.73 mm | 子类别: | Switching Regulator or Controllers |
表面贴装: | YES | 切换器配置: | SINGLE |
最大切换频率: | 420 kHz | 端子面层: | Matte Tin (Sn) |
端子形式: | GULL WING | 端子节距: | 1.27 mm |
端子位置: | DUAL | 处于峰值回流温度下的最长时间: | NOT SPECIFIED |
宽度: | 4 mm | Base Number Matches: | 1 |
TLE6389-2GV50 数据手册
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PDF下载Step-Down DC/DC Controller
TLE 6389
1
Overview
Features
1.1
• Input voltage range from < 5V up to 60V
• Output voltage: 5V fixed or adjustable (7V to 15V)
• Output voltage accuracy: 3%
• Output current up to 2.3A
• 100% maximum duty cycle
• Less than 120µA quiescent current at low loads1)
• 2µA max. shutdown current at device off (TLE 6389-2 GV)
• Fixed 360kHz switching frequency
• Frequency synchronization input for external clocks
• Current Mode control scheme
• Integrated output under voltage Reset circuit
• On chip low battery detector (on chip comparator)
• Automotive temperature range -40°C to 150 °C
• Green Product (RoHS compliant)
• AEC qualified
1) dependend on external components
RSENSE
47mΩ
=
M1
VIN
L1 = 47 µH
VOUT
IOUT
CIN1
100 µF
=
COUT
100 µF
=
CBDS
220 nF
=
D1
M1: Infineon BSO613SPV
11
BDS
VS
14
12
GDRV
2
Infineon BSP613P
CS
3
9
8
FB
13
7
D1: MotorolaMBRD360
VOUT
RSI1
400kΩ
=
C
220nF
=
L1: EPCOS B82479-A1473-M
Coilcraft DO3340P-473
IN2
SO
TLE6389-3 GV50
SI
C
IN1: Electrolythic
COMP
C
IN2: Ceramic
RSI2
=
SI_GND SI_ENABLE
SYNC GND RO
10
2.2nF 680Ω
COUT: Low ESR Tantalum
100kΩ
6
1
5
4
ON OFF
Type
Package
Description
TLE 6389-2 GV
TLE 6389-2 GV50
TLE 6389-3 GV50
PG-DSO-14-1
PG-DSO-14-1
PG-DSO-14-1
adjustable
5V, RO-Hysteresis <<
5V, RO-Hysteresis 1V
Datasheet Rev. 2.1
1
2007-08-13
TLE 6389
1.2
Short functional description
The TLE 6389 step-down DC-DC switching controllers provide high efficiency over loads
ranging from 1mA up to 2.5A. A unique PWM/PFM control scheme operates with up to
a 100% duty cycle, resulting in very low dropout voltage. This control scheme eliminates
minimum load requirements and reduces the supply current under light loads to 120µA,
depending on dimensioning of external components. In addition the adjustable version
TLE6389-2 GV can be shut down via the Enable input reducing the input current to
<2µA. The TLE 6389 step-down controllers drive an external P-channel MOSFET,
allowing design flexibility for applications up to 12.5W of output power. A high switching
frequency and operation in continuous-conduction mode allow the use of tiny surface-
mount inductors. Output capacitor requirements are also reduced, minimizing PC board
area and system costs. The output voltage is preset at 5V (TLE6389-2 GV50 and
TLE6389-3 GV50) and adjustable for the TLE6389-2 GV. The version TLE6389-2 GV50
features a reset function with a threshold between 4.5V and 4.8V, including a small
hysteresis of typ. 50mV. In the version TLE6389-3 GV50 the device incorporates a reset
with a typ. 1V hysteresis. Input voltages of all TLE 6389 can be up to 60V.
1.3
Pin Configuration (top view)
ENABLE /
1
14 CS
SI_ENABLE
FB
VOUT
GND
2
3
4
5
6
7
13 VS
12 GDRV
11 BDS
10 RO
SYNC
SI_GND
SI
9
8
SO
COMP
Datasheet Rev. 2.1
2
2007-08-13
TLE 6389
1.4
Basic block diagram
ENA
SI-
VS
SI
BLE
GND
RO
SO
VOUT
BDS
Battery Sense and
Undervoltage Reset
Internal Power
Supply and
Biasing
FB
CS
PWM / PFM
Regulator
G
Driver
DRV
COMP
Clock generator
Voltage
Reference
Block
SYNC
TLE 6389GV
GND
Datasheet Rev. 2.1
3
2007-08-13
TLE 6389
1.5
Pin Definitions and Functions
Symbol Function
Pin No
1
ENABLE Active-High enable input (only at adjustable version, TLE6389-2 GV)
for the device.
The device is shut down when ENABLE is driven low. In this shut down-
mode the reference, the output and the external MOSFET are turned off.
Connect to logic high for normal operation.
1
2
SI_ENA Active-High enable input (only at 5V version, TLE6389-2 GV50 and
BLE
TLE6389-3 GV50) for SI_GND input.
SI_GND is switched to high impedance when SI_ENABLE is low. High
level at SI_ENABLE connects SI_GND to GND with low impedance. SO is
undefined when SI_ENABLE is low.
FB
Feedback input.
1. For adjustable version (-2GV) connect this pin to an external voltage
divider from the output to GND (see the determining the output voltage,
application section).
2. At the 5V fixed output voltage version (-3GV50 and -2GV50) the FB is
connected internally to an on-chip voltage divider. It does not have to be
connected externally to the output.
3
VOUT
Buck output voltage input.
Input for the internal supply. Connect always to the output of the buck
converter (output capacitor).
4
5
GND
SYNC
Ground connection. Analog signal ground.
Input for external frequency synchronization.
An external clock signal connected to this pin allows switching frequency
synchronization of the device. The internal oscillator is clocked then by the
frequency applied at the SYNC input.
6
7
SI_GND SI-Ground input.
Ground connection for SI comparator resistor divider. Depending on
SI_ENABLE this input is switched to high impedance or low ohmic to GND.
SI
Sense comparator input.
Input of the low-battery comparator. This input is compared to an internal
1.25V reference where SO gives the result of the comparison. Can be
used for any comparison, not necessarily as battery sense.
8
9
COMP
SO
Compensation input.
Connect via RC-compensation network to GND.
Sense comparator output.
Open drain output from SI comparator at the adjustable version (TLE6389-
2 GV),
Pull down structure with an internal 20kΩ pull up resistor to VOUT at the
5V version (TLE6389-2 GV50 and TLE6389-3 GV50).
Datasheet Rev. 2.1
4
2007-08-13
TLE 6389
Pin No
Symbol Function
10
RO
Reset output.
Open drain output from undervoltage reset comparator at the adjustable
version (TLE6389-2 GV),
Pull down structure with an internal 20kΩ pull up resistor to VOUT at the
5V version (TLE6389-2 GV50 and TLE6389-3 GV50).
11
12
13
14
BDS
GDRV
VS
Buck driver supply input.
Connect a ceramic capacitor between BDS and VS to generate clamped
gate-source voltage to supply the driver of the PMOS power stage.
Gate drive output.
Connect to the gate of the external P-Channel MOSFET. The voltage at
GDRV swings between the levels of VS and BDS.
Device supply input.
Connect a 220nF ceramic cap close to the pin in addition to the low ESR
tantalum input capacitance.
CS
Current-sense input.
Connect current-sense resistor between VS and CS. The voltage drop
over the sense-resistor determines the peak current flowing in the buck
circuit. The external MOSFET is turned off when the peak current is
exceeded.
Datasheet Rev. 2.1
5
2007-08-13
TLE 6389
2
Absolute Maximum Ratings
Item
Parameter
Symbol Limit Values Unit Remarks
min.
max.
Device supply input VS
Voltage
2.1
2.2
VVS
IVS
-0.3
–
61
–
V
–
–
Current
Current sense input CS
Voltage
2.3
2.4
VCS
ICS
-0.3
–
61
–
V
–
|VVS - VCS| < 0.3V
Current
Gate drive output GDRV
2.5
Voltage
VGDRV
– 0.3 61
V
-0.3V < |VVS -
V
GDRV| < 6.8V;
-0.3V < |VBDS
-
VGDRV| < 6.8V
2.6
Current
IGDRV
–
–
–
limited internally
Buck driver supply input BDS
2.7
2.8
Voltage
VBDS
– 0.3 61
V
-0.3V < |VVS -
V
BDS| < 6.8V
Current
IBDS
–
–
–
Feedback input FB
Voltage
2.9
VFB
– 0.3 6.8
V
2.10
Current
IFB
–
–
–
Enable input SI_ENABLE
TLE6389-2 GV50,
TLE6389-3 GV50
2.11
2.12
Voltage
VSI_ENAB – 0.3 61
LE
V
Current
ISI_ENABL
–
–
–
E
SI-Ground input SI_GND
2.13
2.14
Voltage
VSI_GND – 0.3 61
ISI_GND
V
–
Current
–
–
Enable input ENABLE
Voltage
2.15
2.16
VENABLE – 0.3 61
IENABLE
V
–
TLE6389-2 GV
2007-08-13
Current
–
–
Datasheet Rev. 2.1
6
TLE 6389
2
Absolute Maximum Ratings (cont’d)
Item
Parameter
Symbol Limit Values Unit Remarks
min. max.
Sense comparator input SI
2.17
2.18
Voltage
Current
VSI
ISI
– 0.3 61
V
–
–
–
Sense comparator output SO
2.19
2.20
Voltage
Current
VSO
ISO
– 0.3 6.8
V
–
–
–
limited internally
Buck output voltage input VOUT
2.21
2.22
Voltage
VVOUT
VVOUT
– 0.3 15
– 0.3 6.8
V
V
TLE6389-2 GV
TLE6389-2 GV50,
TLE6389-3 GV50
Voltage
2.23
Current
IVOUT
–
–
mA
Compensation input COMP
2.24
2.25
Voltage
VCOMP
ICOMP
– 0.3 6.8
V
mA
Current
–
–
Reset output RO
Voltage
2.26
2.27
VRO
IRO
– 0.3 6.8
V
mA
Current
–
–
limited internally
Frequency synchronization input SYNC
2.28
2.29
Voltage
VSYNC
ISYNC
– 0.3 6.8
V
mA
Current
–
–
ESD-Protection
2.30
2.31
2.32
Electrostatic discharge VESD
–1.5
-2
1.5
2
kV
kV
V
HBM1),
voltage
pin VOUT
VESD
HBM1), all pins
except VOUT
CDM2)
VESDCDM –500 500
Datasheet Rev. 2.1
7
2007-08-13
TLE 6389
2
Absolute Maximum Ratings (cont’d)
Item
Parameter
Symbol Limit Values Unit Remarks
min.
max.
Temperatures
2.33
2.34
1)
Junction temperature
Storage temperature
Tj
Tstg
-40
-50
150
150
°C
°C
–
–
ESD susceptibility HBM according to EIA/JESD 22-A 114B.
ESD susceptibility CDM according to JESD 22-C101.
2)
Note: Stresses above the ones listed here may cause permanent damage to the device.
Exposure to absolute maximum rating conditions for extended periods may affect
device reliability.
Note: Integrated protection functions are designed to prevent IC destruction under fault
conditions described in the data sheet. Fault conditions are considered as
“outside” normal operating range. Protection functions are not designed for
continuous repetitive operation.
Datasheet Rev. 2.1
8
2007-08-13
TLE 6389
3
Operating Range
Parameter
Item
Symbol Limit Values Unit Remarks
min.
5
7
max.
60
15
3.1
3.2
Supply voltage range
Output voltage adjust
range TLE 6389-2 GV
VVS
VOUT
V
V
TLE 6389-2 GV
3.3
3.4
3.5
3.6
Sense Resistor
RSENSE 10
47
mΩ Calculation see
section 7
PMOS, on+off delay
ton+off
delay
-
tmin-
ns
tmin= VVOUT
(VVS*fSW)
/
300 1)
Buck driver supply
capacitor
Buck inductance
CBDS
220
47
-
nF
µH
L1
L1
-
recommended
value
3.7
3.8
3.9
Buck inductance
Buck output capacitor COUT
Junction temperature
Thermal Resistance
Junction ambient
Junction pin
22
100
-
150
µH
µF
°C
100
– 40
Tj
3.10
3.11
1)
Rthj-a
Rthj-p
140
50
K/W Footprint only
K/W –
A too high PMOS on+off delay might cause an instable output voltage
Note: Within the functional range the IC operates as described in the circuit description.
The electrical characteristics are specified within the conditions given in the
related electrical characteristics table.
Datasheet Rev. 2.1
9
2007-08-13
TLE 6389
4
Electrical Characteristics
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Current Consumption1) TLE6389-2 GV50 and TLE6389-3 GV50
4.1
4.2
Current
IVS
80
150 µA
VVS = 48V;
PFM mode;
consumption of VS
70
85
30
µA
µA
VVS = 13.5V;
PFM mode;
Tj = 25 °C
4.3
4.4
Current
consumption of
SI_ENABLE
Current
consumption of
VOUT
ISI_ENABL
E
9
VVS = 48V;
VSI_ENABLE = 48V;
PFM mode;
IVOUT
95
130 µA
VSI_ENABLE = L;
VVOUT = 5.5V;
VVS=13.5V;
PFM mode;
Tj = 25°C
4.5
4.6
140 220 µA
VSI_ENABLE = H;
VVOUT = 5.5V;
VVS = 13.5V;
VSI > VSI, high
;
PFM mode;
Current
consumption of SI
ISI
0.2 0.5
µA
VVS = 13.5V;
VSI_ENABLE = H;
VSI = 10V ;
PFM mode;
Datasheet Rev. 2.1
10
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Current Consumption1) TLE6389-2 GV (variable)
4.7
Current
consumption of VS
IVS
80
150 µA
VVS = 48V;
VENABLE = H;
PFM mode;
VOUT > 7V
4.8
Current
consumption of VS
70
85
µA
VVS = 13.5V;
VENABLE = H;
PFM mode;
Tj = 25 °C;
VOUT > 7V
4.9
Current
2
µA
µA
VENABLE=0V;
Tj < 105°C
VVS = 48V;
VENABLE = H;
PFM mode;
consumption of VS
4.10
Current
consumption of
ENABLE
IEN
9
30
4.11
4.12
4.13
Current
IVOUT
140 220 µA
VOUT = 8V;
VVS = 13.5V;
VENABLE = H;
VSI > VSI, high
PFM mode;
consumption of
VOUT
;
Current
consumption of SI
ISI
0.2 0.5
0.2 0.5
µA
µA
VVS = 13.5V;
VENABLE = H;
VSI = 10V ;
PFM mode;
Tj = 25°C
Current
consumption of FB
IFB
VVS = 13.5V;
VFB = 1.25V;
VENABLE = H;
PFM mode;
Tj = 25°C
Datasheet Rev. 2.1
11
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Buck Controller
4.14
Output voltage
VVOUT
4.85 5.00 5.15 V
TLE6389-2 GV50,
TLE6389-3 GV50;
VVS=13.5V& 48V;
PWM mode
IOUT = 0.5 to 2A;
RSENSE = 22mΩ;
R
M1 = 0.25Ω;
RL1 = 0.1Ω;
4.15
4.16
4.75 5.00 5.25 V
TLE6389-2 GV50,
TLE6389-3 GV50;
VVS = 24V;PFM;
IOUT = 15mA;
RSENSE = 22mΩ;
R
M1 = 0.25Ω;
RL1 = 0.1Ω;
3.8
V
TLE6389-3 GV50;
VVS decreasing
from 5.8V to 4.2V;
ILOAD = 0mA to
500mA;
RSENSE = 22mΩ;
R
M1 = 0.4Ω;
RL1 = 0.1Ω;
4.17
4.18
FB threshold
voltage
Output voltage
VFB, th
VVOUT
1.225 1.25 1.275
V
TLE6389-2 GV
9.7
10.0 10.3 V
TLE6389-2 GV;
Calibrated divider,
see section 7.3;
VVS = 13.5V & 48V;
IOUT = 0.5 to 2A;
PWM Mode;
RSENSE = 22mΩ;
R
M1 = 0.25Ω;
RL1 = 0.1Ω;
Datasheet Rev. 2.1
12
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
4.19
Output voltage
VVOUT
9.5
10.0 10.5 V
TLE6389-2 GV;
Calibrated divider,
see section 7.3;
VVS = 24V;
IOUT = 15mA;
PFM Mode;
RSENSE = 22mΩ;
R
M1 = 0.25Ω;
RL1 = 0.1Ω;
4.20
4.21
Buck output
voltage adjust
range
VVOUT
VFB,
th
7
V
V
TLE6389-2 GV,
supplied by VS
only, complete
current to supply
the IC drawn from
VS,
no reset function 2)
Buck output
voltage adjust
range
VVOUT
7
15
TLE6389-2 GV,
current to supply
the IC drawn from
VS and VOUT, as
specified, 2)
4.22
4.23
Buck output
VVOUT
0.97*
VOUT
1.03*
VOUT
TLE6389-2 GV,
voltage accuracy
PWM mode 2)
_nom
_nom
Buck output
voltage accuracy
VVOUT
0.95*
VOUT
1.05*
VOUT
TLE6389-2 GV,
PFM mode 2)
_nom
_nom
Datasheet Rev. 2.1
13
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
min. typ. max.
35
Unit Test Condition
4.24
Line regulation
| ∆VVOUT
|
|
mV
mV
%
TLE6389-2 GV50,
TLE6389-3 GV50,
VVS = 9V to 16V;
IOUT = 1A;
RSENSE = 22mΩ;
PWM mode
4.25
4.26
Line regulation
Line regulation
| ∆VVOUT
50
TLE6389-2 GV50,
TLE6389-3 GV50,
VVS = 16V to 32V;
IOUT = 1A;
RSENSE = 22mΩ;
PWM mode
∆VVOUT
/
2.5
TLE6389-2 GV,
VVS = 12V to 36V;
VVOUT=10V
VVOUT
IOUT = 1A;
RSENSE = 22mΩ;
PWM mode
Datasheet Rev. 2.1
14
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
min. typ. max.
40
Unit Test Condition
4.27
Load regulation
∆VVOUT
∆ILOAD
/
mV/ TLE6389-2 GV50,
A
TLE6389-3 GV50,
IOUT = 0.5A to 2A;
VVS = 5.8V & 48V;
RSENSE = 22mΩ
4.28
4.29
4.30
4.31
8*
mV/ TLE6389-2 GV,
VOUT
A
IOUT = 0.5 to 2A;
/
VVS= 13.5V & 48V;
RSENSE = 22mΩ
_nom
V
Gate driver,
PMOS off
VVS
VGDRV
–
0
0.2
8.2
4
V
VENABLE/SI_ENABLE
= 5 V
CBDS = 220 nF
CGDRV = 4.7nF
Gate driver,
PMOS on
VVS
VGDRV
–
6
V
V
VENABLE/SI_ENABLE
= 5 V
CBDS = 220 nF
CGDRV = 4.7nF3)
Gate driver,
UV lockout
VVS
–
2.75
Decreasing (VVS-
VBDS
IGDRV
IGDRV
tr
VBDS) until GDRV
is permanently at
VS level
4.32
4.33
4.34
Gate driver,
peak charging
current
1
A
PMOS dependent;
2)
Gate driver,
peak discharging
current
1
A
PMOS dependent;
2)
Gate driver,
gate voltage, rise
time
45
60
ns
VENABLE/SI_ENABLE
= 5 V
CBDS = 220 nF
CGDRV = 4.7nF
Datasheet Rev. 2.1
15
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
4.35
Gate driver,
gate voltage, fall
time
tf
50
65
ns
VENABLE/SI_ENABLE
= 5 V
CBDS = 220 nF
CGDRV = 4.7nF
4.36
Peak current limit VLIM
=
–
50
70
90
mV
threshold voltage
VVS
VCS
4.37
4.38
Oscillator
frequency
Maximum duty
cycle
Minimum on time
SYNC capture
range
SYNC trigger level VSYNC,h 4.0
high
SYNC trigger level
low
fOSC
290 360 420 kHz PWM mode only
dMAX
100
%
PWM mode only
PWM mode only
4.39
4.40
tMIN
∆fsync
220 400 ns
250
530 kHz PWM mode only
2)
4.41
4.42
V
2)
0.8
V
Reset Generator
4.43
4.44
4.45
Reset threshold
VVOUT, RT 3.5
4.5
3.65 3.8
4.65 4.8
V
TLE6389-3 GV50;
VOUT decreasing
TLE6389-3 GV50;
VOUT increasing
V
V
V
Reset headroom
Reset threshold
VRT,HEAD 80
mV
TLE6389-2 GV50;
VOUT(VS=6V,
ILOAD=1A)
-VVOUT,RT
4.46
4.47
VVOUT, RT 4.5
4.65 4.8
50
V
TLE6389-2 GV50;
V
VOUT increasing/
decreasing
Reset threshold
hysteresis
∆VVOUT,
RT
mV
TLE6389-2 GV50
2)
Datasheet Rev. 2.1
16
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
min. typ. max.
1.12
Unit Test Condition
4.48
4.49
4.50
Reset threshold
VFB, RT
V
TLE6389-2 GV;
VOUT decreasing
TLE6389-2 GV;
VOUT increasing
V
1.17
V
V
Reset output pull
up resistor
RRO
10
20
40
kΩ
TLE6389-2 GV50,
TLE6389-3 GV50;
Internally
connected to VOUT
4.51
Reset output High VRO, H
voltage
0.8*
VVOUT
V
TLE6389-2 GV50,
TLE6389-3 GV50;
IRO=0mA
4.52
4.53
4.54
Reset output Low VRO,L
voltage
0.2 0.4
V
IRO, L=1mA;
2.5V < VVOUT < VRT
Reset output Low VRO,L
voltage
0.2 0.4
V
IRO, L=0.2mA;
1V < VVOUT < 2.5V
TLE6389-2 GV
TLE6389-3 GV50
Reset delay time
trd
17
70
21
82
25
ms
4.55
4.56
Reset delay time
trd
100 ms
TLE6389-2 GV50
2)
Reset reaction time trr
10
µs
Overvoltage Lockout
4.57
Overvoltage
threshold
VVOUT, OV
VOUT
_nom
V
+0.1
V
TLE6389-2 GV50,
TLE6389-3 GV50;
VVOUT increasing
/
4.58
Overvoltage
threshold
VFB, OV
VFB,t
h_nom
/V
+0.0
2
V
TLE6389-2 GV;
V
VOUT increasing
Datasheet Rev. 2.1
17
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
ENABLE Input
4.59
4.60
Enable ON-
VENABLE, 4.5
ON
V
V
threshold
Enable OFF-
threshold
VENABLE,
OFF
0.8
SI_ENABLE Input
4.61
4.62
Enable ON-
VENABLE, 4.5
ON
V
V
threshold
Enable OFF-
threshold
VENABLE,
OFF
0.8
SI_GND Input
4.63
Switch ON
resistance
RSW
50
100 230
Ω
VSI_ENABLE = 5V;
ISI_GND = 3mA;
Battery Voltage Sense
4.64
4.65
4.66
Sense threshold
VSI, low
VSI, high
VSI, hys
1.22 1.25 1.28 V
VVS decreasing
VVS increasing
Sense threshold
1.33
V
Sense threshold
hysteresis
50
10
80
120 mV
4.67
Sense output pull RSO
up resistor
20
40
kΩ
TLE6389-2 GV50,
TLE6389-3 GV50;
Internally con-
nected to VVOUT
4.68
4.69
Sense out output
High voltage
VSO,H
VSO,L
0.8*
VVOUT
V
V
ISO,H =0mA
Sense out output
Low voltage
0.2 0.4
ISO,L = 1mA;
2.5V < VVOUT
;
VSI < 1.13 V
4.70
0.4
VVOUT
/V
V
ISOL=0.2mA;
1V < VVOUT < 2.5V;
VSI < 1.13 V
Datasheet Rev. 2.1
18
2007-08-13
TLE 6389
4
Electrical Characteristics (cont’d)
5V < VVS < 48V; -40°C < Tj < 150°C;
All voltages with respect to ground; positive current defined flowing into the pin; unless otherwise specified
Item
Parameter
Symbol
Limit Values
Unit Test Condition
min. typ. max.
Thermal Shutdown
2)
4.71
Thermal shutdown TjSD
150 175 200 °C
junction
temperature
2)
4.72
Temperature
hysteresis
∆T
30
K
1)
The device current measurements for IVS and IFB exclude MOSFET driver currents.
Not subject to production test - specified by design
For 4V < VVS < 6V: VGDRV ≈ 0V.
2)
3)
Datasheet Rev. 2.1
19
2007-08-13
TLE 6389
5
Typical Performance Characteristics
Current consumption IVS vs. temperature Tj Current consumption IVOUT vs. temperature
at enabled device and VVS=13.5V
Tj at enabled device and VVOUT=5.5V
90
180
IVS
IVOUT
µA
80
µA
170
70
60
50
40
30
20
160
150
140
130
120
110
-50
-20
10
40
70
100 130 160
-50
-20
10
40
70
100 130 160
Tj
Tj
°C
°C
Current consumption IVS vs. temperature Tj Current consumption IVOUT vs. temperature
at enabled device and VVS=48V
Tj at enabled device and VVOUT=10V(-2GV)
110
160
IVS
IVOUT
µA
µA
100
150
90
80
70
60
50
40
140
130
120
110
100
90
-50
-20
10
40
70
100 130 160
-50
-20
10
40
70
100 130 160
Tj
Tj
°C
°C
Datasheet Rev. 2.1
20
2007-08-13
TLE 6389
Internal oscillator frequency fOSC
vs. temperature Tj
Peak current limit threshold voltage VLIM
vs. temperature Tj
380
110
fOSC
VLIM
kHz
370
mV
100
360
350
340
330
320
310
90
80
70
60
50
40
-50
-20
10
40
70
100 130 160
-50
-20
10
40
70
100 130 160
Tj
Tj
°C
°C
Minimum on time tMIN (blanking)
vs. temperature Tj
Gate driver supply VVS - VBDS
vs. temperature Tj
350
8.6
tMIN
VVS-VBDS
ns
V
325
8.4
300
275
250
225
200
175
8.2
8.0
7.8
7.6
7.4
7.2
-50
-20
10
40
70
100 130 160
-50
-20
10
40
70
100 130 160
Tj
Tj
°C
°C
Datasheet Rev. 2.1
21
2007-08-13
TLE 6389
Output voltage VVOUT vs. temperature Tj in Lower Reset threshold VFB,RT
PFM mode (VVS=24V,ILoad=15mA,-3GV50) vs. temperature Tj (-2GV)
5.15
VVOUT
1.14
1.13
1.12
1.11
1.10
1.09
1.08
1.07
VFB,RT
V
V
5.10
5.05
5.00
4.95
4.90
4.85
4.80
-50
-20
10
40
70
100 130 160
-50
-20
10
40
70
100 130 160
Tj
Tj
°C
°C
Lower Reset threshold VVOUT, RT
vs. temperature Tj (-3GV50)
Internal pull up resistors RRO and RSO
vs. temperature Tj (-3GV50)
3.72
45
VVOUT,RT
RRO
V
kΩ
RSO
3.70
40
35
30
25
20
15
10
k
Ω
3.68
3.66
3.64
3.62
3.60
3.58
-50
-20
10
40
70
100 130 160
-50
-20
10
40
70
100 130 160
Tj
Tj
°C
°C
Datasheet Rev. 2.1
22
2007-08-13
TLE 6389
Lower Sense threshold VSI, low
vs. temperature Tj
Output Voltage vs. Load Current,
TLE6389-2 GV50
7
1.28
TLE 6389-2 GV50
VOUT
VSI,low
RSENSE = 50mΩ
VVS = 13.5V
V
6
V
App. Circuit Fig. 3
1.27
5
4
3
2
1
0
1.26
1.25
1.24
1.23
1.22
1.21
0
0.25 0.5 0.75 1.0 1.25 1.5 1.75
ILOAD
-50
-20
10
40
70
100 130 160
Tj
A
°C
Output Current vs. Load Current,
On resistance of SI_GND switch RSW
vs. temperature Tj
TLE6389-3 GV50
280
7
TLE 6389-3 GV50
RSW
VOUT
RSENSE = 50mΩ
VVS = 13.5V
Ω
V
App. Circuit Fig. 3
240
6
5
4
3
2
1
0
200
160
120
80
40
0
-50
-20
10
40
70
100 130 160
0
0.25 0.5 0.75 1.0 1.25 1.5 1.75
ILOAD
Tj
°C
A
Datasheet Rev. 2.1
23
2007-08-13
TLE 6389
Output Voltage vs Load Current
1.4
TLE 6389-2 GV
SENSE = 50mΩ
VOUT
R
VOUT,nom
V
VS = 13.5V
App. Circuit Fig. 3
1.2
1.0
0.8
0.6
0.4
0.2
0
0
0.25 0.5 0.75 1.0 1.25 1.5 1.75
ILOAD
A
Datasheet Rev. 2.1
24
2007-08-13
TLE 6389
6
Detailed circuit description
In the following, some internal blocks of the TLE6389 are described in more detail. For
the right choice of the external components please refer to the section application
information.
6.1
PFM/PWM Step-down regulator
To meet the strict requirements in terms of current consumption demanded by all Body-
and 42V PowerNet applications a special PFM (Pulse Frequency Modulation) - PWM
(Pulse Width Modulation) control scheme for highest efficiency is implemented in the
TLE 6389 regulators. Under light load conditions the output voltage is able to increase
slightly and at a certain threshold the controller jumps into PFM mode. In this PFM
operation the PMOS is triggered with a certain on time (depending on input voltage,
output voltage, inductance- and sense resistor value) whenever the buck output voltage
decreases to the so called WAKE-threshold. The switching frequency of the step down
regulator is determined in the PFM mode by the load current. It increases with increasing
load current and turns finally to the fixed PWM frequency at a certain load current
depending on the input voltage, current sense resistor and inductance. The diagram
below shows the buck regulation circuit of the TLE 6389 .
VS
CS
VFB, OV
VREF
VREF
VDIODE
+
-
+
-
+
-
Current-
sense
Over-
Over-
Voltage
Lockout
Temp.
Amplifier
Shutdown
VS
Blanking
VREF
VFB
+
-
>1
R
S
+
GDRV
&
Q
Error
PWM
Comparator
Amplifier
Level-
shift
Wake-
Comparator
Slope-
compensation
VREF
BDS
PFM
-
VFB, WK
MUX
PWM
SYNC
MODE
Oscillator
Figure 1 Buck control scheme
The TLE 6389 uses a slope-compensated peak current mode PWM control scheme in
which the feedback or output voltage of the step down circuit and the peak current of the
current through the PMOS are compared to form the OFF signal for the external PMOS.
Datasheet Rev. 2.1
25
2007-08-13
TLE 6389
The ON-trigger is set periodically by the internal oscillator when acting in PWM mode
and is given by the output of the WAKE-comparator when operating in PFM mode. The
Multiplexer (MUX) is switched by the output of the MODE-detector which distinguishes
between PFM and PWM by tracking the output voltage (goto PFM) and by tracking the
gate trigger frequency (goto PWM). In PFM mode the peak current limit is reduced to
prevent overshoots at the output of the buck regulator. In order to avoid a gate turn off
signal due to the current peak caused by the parasitic capacitance of the catch diode the
blanking filter is necessary. The blanking time is set internally to 200ns and determines
(together with the PMOS turn on and turn off delay) the minimum duty cycle of the
device. In addition to the PFM/PWM regulation scheme an overvoltage lockout and
thermal protection are implemented to guarantee safe operation of the device and of the
supplied application circuit.
6.2
Battery voltage sense
To detect undervoltage conditions at the battery a sense comparator block is available
within the TLE 6389. The voltage at the SI input is compared to an internal reference of
typ. 1.25V. The output of the comparator drives a NMOS structure giving a low signal at
SO as soon as the voltage at SI decreases below this threshold. In the 5V fixed version
an internal pull up resistor is connected from the drain of the NMOS to the output of the
buck converter, in the variable version SO is open drain.
The sense in voltage divider can be switched to high impedance by a low signal at the
SI_ENABLE to avoid high current consumption to GND (TLE6389-2 GV50 and
TLE6389-3 GV50 only).
Of course the sense comparator can be used for any input voltage and does not have to
be used for the battery voltage sense only.
6.3
Undervoltage Reset
The output voltage is monitored continuously by the internal undervoltage reset
comparator. As soon as the output voltage decreases below the thresholds given in the
characteristics the NPN structure pulls RO low (latched). In the 5V fixed version an
internal pull up resistor is connected from the collector of the NPN to the output of the
buck converter, in the variable version RO is open collector.
At power up RO is kept low until the output voltage has reached its reset threshold and
stayed above this threshold for the power on reset delay time.
Datasheet Rev. 2.1
26
2007-08-13
TLE 6389
7
Application information
Note: The following information is given as a hint for the implementation of the device
only and shall not be regarded as a description or warranty of a certain
functionality, condition or quality of the device.
7.1
General
The TLE 6389 step-down DC-DC controllers are designed primarily for use in
Automotive applications where high input voltage range requirements have to be met.
Using an external P-MOSFET and current-sense resistor allows design flexibility and the
improved efficiencies associated with high-performance P-channel MOSFETs. The
unique, peak current-limited, PWM/PFM control scheme gives these devices excellent
efficiency over wide load ranges, while drawing around 100µA current from the battery
under no load condition. This wide dynamic range optimizes the TLE 6389 for
automotive applications, where load currents can vary considerably as individual circuit
blocks are turned on and off to conserve energy. Operation to a 100% duty cycle allows
the lowest possible dropout voltage, maintaining operation during cold cranking. High
switching frequencies and a simple circuit topology minimize PC board area and
component costs.
7.2
Typical application circuits
Note: These are very simplified examples of an application circuit. The function must be
verified in the real application
.
RSENSE
47mΩ
=
M1
VIN
L1 = 47 µH
VOUT
IOUT
CIN1
100 µF
=
COUT
100 µF
=
CBDS
220 nF
=
D1
M1: Infineon BSO613SPV
11
BDS
VS
14
CS
12
GDRV
2
InfineonBSP613P
D1: MotorolaMBRD360
L1: EPCOS B82479-A1473-M
Coilcraft DO3340P-473
3
9
8
FB
13
7
VOUT
RSI1=
400kΩ
C
220nF
=
IN2
TLE6389-2 GV50
TLE6389-3 GV50
SO
SI
C : Electrolythic
IN1
COMP
C : Ceramic
COINU2T : Low ESR Tantalum
RSI2=
SI_GND SI_ENABLE
SYNC GND RO
10
2.2nF 680Ω
100kΩ
6
1
5
4
ON OFF
Figure 2 Application circuit TLE6389-2 GV50 and TLE6389-3 GV50
Datasheet Rev. 2.1
27
2007-08-13
TLE 6389
RSENSE
47mΩ
=
M1
VIN
L1 = 47 µH
VOUT
to e.g. 5V rail
RSO
RRO
CIN1
100 µF
=
COUT
100 µF
=
=
=
CBDS
220 nF
=
D1
20kΩ
RFB1=
M1: InfineonBSO613SPV
Infineon BSP613P
330kΩ
11
BDS
VS
14
CS
12
GDRV
3
D1: Motorola MBRD360
L1: EPCOS B82479-A1473-M
Coilcraft DO3340P-473
VOUT
13
7
SO
9
toµC
RSI1
400kΩ
=
C
220nF
=
IN2
FB
COMP
TLE6389-2 GV
2
8
C : Electrolythic
2.2nF
680Ω
IN1
SI
SI_GND ENABLE
C : Ceramic
COINU2T: Low ESR Tantalum
RSI2
=
SYNC GND
RO
10
RFB2
=
100kΩ
6
1
5
4
47kΩ
ON OFF
toµC
Figure 3 Application circuit TLE6389-2 GV
7.3
Output voltage at adjustable version - feedback divider
The output voltage is sensed either by an internal voltage divider connected to the VOUT
pin (TLE6389-2 GV50 and TLE6389-3 GV50, fixed 5V versions) or an external divider
from the Buck output voltage to the FB pin (TLE6389-2 GV, adjustable version). Pin
VOUT has to be connected always to the Buck converter output regardless of the
selected output voltage for the -2GV version.
To determine the resistors of the feedback divider for the desired output voltage VOUT at
the TLE6389-2 GV select RFB2 between 5kΩ and 500kΩ and obtain RFB1 with the
following formula:
VOUT
VFB, th
RFB1 = RFB2 ---------------- – 1
VFB is the threshold of the error amplifier with its value of typical 1.25V which shows that
the output voltage can be adjusted in a range from 1.25V to 15V. However the integrated
Reset function will only be operational if the output voltage level is adjusted to >7V.
Also the current consumption will be increased in PFM mode in the range between
1.25V and 7V.
Datasheet Rev. 2.1
28
2007-08-13
TLE 6389
7.4
SI_Enable
Connecting SI_ENABLE to 5V causes SI_GND to have low impedance. Thus the SI
comparator is in operation and can be used to monitor the battery voltage. SO output
signal is valid. Connecting SI_ENABLE to GND causes SI_GND to have high
impedance. Thus the SI comparator is not able to monitor the battery voltage. SO output
signal is invalid.
7.5
Battery sense comparator - voltage divider
The formula to calculate the resistor divider for the sense comparator is basically the
same as for the feedback divider in section before. With the selected resistor RSI2, the
desired threshold of the input voltage VIN, UV and the lower sense threshold VSI, low the
resistor RSI1 is given to:
VIN, UV
VSI, low
RSI1 = RSI2 ------------------ – 1
For high accuracy and low ohmic resistor divider values the On-resistance of the
SI_GND NMOS (typ. 100Ω) has to be added to RSI2.
7.6
Undervoltage reset - delay time
The diagram below shows the typical behavior of the reset output in dependency on the
input voltage VIN, the output voltage VVOUT or VFB.
Datasheet Rev. 2.1
29
2007-08-13
TLE 6389
VIN
< trr
t
VVOUT
VFB
VVOUT, RT
VFB,RT
trr
t
trd
trd
trd
VRO
trd
t
thermal
under
over
load
shutdown
voltage
Figure 4 Reset timing
7.7 100% duty-cycle operation and dropout
The TLE 6389 operates with a duty cycle up to 100%. This feature allows to operate with
the lowest possible drop voltage at low battery voltage as it occurs at cold cranking. The
MOSFET is turned on continuously when the supply voltage approaches the output
voltage level, conventional switching regulators with less than 100% duty cycle would fail
in that case.
The drop- or dropout voltage is defined as the difference between the input and output
voltage levels when the input is low enough to drop the output out of regulation. Dropout
depends on the MOSFET drain-to-source on-resistance, the current-sense resistor and
the inductor series resistance. It is proportional to the load current:
Vdrop = ILOAD (RDS(ON)PMOS + RSENSE + RINDUCTANCE
)
Datasheet Rev. 2.1
30
2007-08-13
TLE 6389
7.8
SYNC Input and Frequency Control
The TLE 6389’s internal oscillator is set for a fixed PWM switching frequency of 360kHz
or can be synchronized to an external clock at the SYNC pin. When the internal clock is
used SYNC has to be connected to GND. SYNC is a negative-edge triggered input that
allows synchronization to an external frequency ranging between 270kHz and 530kHz.
When SYNC is clocked by an external signal, the converter operates in PWM mode until
the load current drops below the PWM to PFM threshold. Thereafter the converter
continues operation in PFM mode.
7.9
Shutdown Mode
Connecting ENABLE to GND places the TLE6389-2 GV in shutdown mode. In
shutdown, the reference, control circuitry, external switching MOSFET, and the oscillator
are turned off and the output falls to 0V. Connect ENABLE to voltages higher than 4.5V
for normal operation. As this input operates analog the voltage applied at this pin should
have a slope of 0.5V/3µs to avoid undefined states within the device.
7.10
Buck converter circuit
A typical choice of external components for the buck converter circuit is given in figure
2 and 3. For basic operation of the buck converter the input capacitors CIN1, CIN2, the
driver supply capacitor CBDS, the sense resistor RSENSE, the PMOS device, the catch
diode D1, the inductance L1 and the output capacitor COUT are necessary. In addition for
low electromagnetic emission a Pi-filter at the input and/or a small resistor in the path
between GDRV and the gate of the PMOS may be necessary.
7.10.1
Buck inductance (L1) selection in terms of ripple current:
The internal PWM/PFM control loop includes a slope compensation for stable operation
in PWM mode. This slope compensation is optimized for inductance values of 47µH and
Sense resistor values of 47mΩ for the 5V output voltage versions. When choosing an
inductance different from 47µH the Sense resistor has to be changed also:
RSENSE
3-Ω---
------------------- = ( 0 , 5 . . . 1 , 0 )×10
H
L1
Increasing this ratio above 1000 Ω/H may result in sub harmonic oscillations as well-
known for peak current mode regulators without integrated slope compensation.
Datasheet Rev. 2.1
31
2007-08-13
TLE 6389
To achieve the same effect of slope compensation in the adjustable voltage version also
the inductance in µH is given by
–4
H
–4
H
--------
--------
2,0 × 10
VOUT
R
< L1 < 4,0 × 10
VOUT
R
SENSE
SENSE
VΩ
VΩ
The inductance value determines together with the input voltage, the output voltage and
the switching frequency the current ripple which occurs during normal operation of the
step down converter. This current ripple is important for the all over ripple at the output
of the switching converter.
(VIN – VOUT) VOUT
∆I = ------------------------------------------------------
fSW VIN L1
In this equation fsw is the actual switching frequency of the device, given either by the
internal oscillator or by an external source connected to the SYNC pin. When picking
finally the inductance of a certain supplier (Epcos, Coilcraft etc.) the saturation current
has to be considered. The saturation current value of the desired inductance has to be
higher than the maximum peak current which can appear in the actual application.
7.10.2
Determining the current limit
The peak current which the buck converter is able to provide is determined by the peak
current limit threshold voltage VLIM and the sense resistor RSENSE. With a maximum peak
current given by the application (IPEAK, PWM=ILOAD+0.5∆I) the sense resistor is calculated
to
VLIM
RSENSE = ------------------------------------
2 IPEAK, PWM
The equation above takes account for the foldback characteristic of the current limit as
shown in the Fig. ’Output Voltage vs. Load Current’ on page 24/25 by introducing a factor
of 2. It must be assured by correct dimensioning of RSENSE that the load current doesn’t
reach the foldback part of the characteristic curve.
Datasheet Rev. 2.1
32
2007-08-13
TLE 6389
7.10.3
PFM and PWM thresholds
The crossover thresholds PFM to PWM and vice versa strongly depend on the input
voltage VIN, the Buck converter inductance L1, the sense resistor value RSENSE and the
turn on and turn off delays of the external PMOS.
For more details on the PFM to PWM and PWM to PFM thresholds please refer to the
application note “TLE6389 - Determining PFM/PWM current thresholds”.
7.10.4
Buck output capacitor (COUT) selection:
The choice of the output capacitor effects straight to the minimum achievable ripple
which is seen at the output of the buck converter. In continuous conduction mode the
ripple of the output voltage can be estimated by the following equation:
1
VRipple = ∆I
R
ESRCOUT + -----------------------------------
8 fSW COUT
From the formula it is recognized that the ESR has a big influence in the total ripple at
the output, so low ESR tantalum capacitors are recommended for the application.
One other important thing to note are the requirements for the resonant frequency of the
output LC-combination. The choice of the components L and C have to meet also the
specified range given in section 3 otherwise instabilities of the regulation loop might
occur.
7.10.5
Input capacitor (CIN1) selection:
At high load currents, where the current through the inductance flows continuously, the
input capacitor is exposed to a square wave current with its duty cycle VOUT/VI. To
prevent a high ripple to the battery line a capacitor with low ESR should be used. The
maximum RMS current which the capacitor has to withstand is calculated to:
2
VOUT
IRMS = ILOAD -------------- 1 +
VIN
1
∆I
-- -----------------------
LOAD
3
2 I
For low ESR an e.g. Al-electrolytic capacitance in parallel to an ceramic capacitance
could be used.
Datasheet Rev. 2.1
33
2007-08-13
TLE 6389
7.10.6
Freewheeling diode / catch diode (D1)
For lowest power loss in the freewheeling path Schottky diodes are recommended. With
those types the reverse recovery charge is negligible and a fast hand over from
freewheeling to forward conduction mode is possible. Depending on the application (12V
battery systems) 40V types could be also used instead of the 60V diodes. Also for high
temperature operation select a Schottky-diode with low reverse leakage.
A fast recovery diode with recovery times in the range of 30ns can be also used if smaller
junction capacitance values (smaller spikes) are desired.
7.10.7
Buck driver supply capacitor (CBDS)
The voltage at the ceramic capacitor is clamped internally to 7V, a ceramic type with a
minimum of 220nF and voltage class 16V would be sufficient.
7.10.8
Input pi-filter components for reduced EME
At the input of Buck converters a square wave current is observed causing
electromagnetical interference on the battery line. The emission to the battery line
consists on one hand of components of the switching frequency (fundamental wave) and
its harmonics and on the other hand of the high frequency components derived from the
current slope. For proper attenuation of those interferers a π-type input filter structure is
recommended which is built up with inductive and capacitive components in addition to
the Input caps CIN1 and CIN2. The inductance can be chosen up to the value of the Buck
converter inductance, higher values might not be necessary, the additional capacitance
should be a ceramic type in the range up to 100nF.
Inexpensive input filters show due to their parasitrics a notch filter characteristic, which
means basically that the low pass filter acts from a certain frequency as a high pass filter
and means further that the high frequency components are not attenuated properly. To
slower down the slopes at the gate of the PMOS switch and get down the emission in the
high frequency range a small gate resistor can be put between GDRV and the PMOS
gate.
7.10.9
Frequency compensation
The external frequency compensation pin should be connected via a 2.2nF (>10V)
ceramic capacitor and a 680 Ω (1/8W) resistor to GND. This node should be kept free
from switching noise.
Datasheet Rev. 2.1
34
2007-08-13
TLE 6389
7.11
Components recommendation - overview
Device Type
Supplier
various
various
EPCOS
EPCOS
Coilcraft
Coilcraft
Coilcraft
Infineon
Infineon
Infineon
various
Motorola
Motorola
various
EPCOS
various
Remark
CIN1
CIN2
L1
Electrolytic /Foil type
100µF, 60V
Ceramic
220nF, 60V
B82464-A4473
B82479-A1473-M
DO3340P-473
DO5022P-683
DS5022P-473
BSO 613SPV
BSP 613P
47µH, 1.6A, 145mΩ
47µH, 3.5A, 47mΩ
47µH, 3.8A, 110mΩ
68µH, 3.5A, 130mΩ
47µH, 4.0A, 97mΩ
M1
60V, 3.44A, 130mΩ, NL
60V, 2.9A, 130mΩ, NL
60V, 9A, 250mΩ, LL
220nF, 16V
SPD09P06PL
Ceramic
CBDS
D1
MBRD360
Schottky, 60V, 3A
Schottky, 40V, 3A
Schottky, 40V, 3A
Low ESR Tantalum, 100µF, 10V
see 7.10.9.
MBRD340
SS34
COUT
B45197-A2107
Ceramic
CCOMP
7.12
Layout recommendation
The most sensitive points for Buck converters - when considering the layout - are the
nodes at the input, output and the gate of the PMOS transistor and the feedback path.
For proper operation and to avoid stray inductance paths the external catch diode, the
Buck inductance and the input capacitor CIN1 have to be connected as close as possible to
the PMOS device. Also the GDRV path from the controller to the MosFet has to be as short
as possible. Best suitable for the connection of the cathode of the catch diode and one
terminal of the inductance would be a small plain located next to the drain of the PMOS.
The GND connection of the catch diode must be also as short as possible. In general the
GND level should be implemented as surface area over the whole PCB as second layer,
if necessary as third layer. The feedback path has to be well grounded also, a ceramic
capacitance might help in addition to the output cap to avoid spikes.
To obtain the optimum filter capability of the input pi-filter it has to be located also as
close as possible to the input. To filter the supply input of the device (VS) the ceramic cap
should be connected directly to the pin.
As a guideline an EMC optimized application board / layout is available.
Datasheet Rev. 2.1
35
2007-08-13
TLE 6389
8
Package Outlines
0.35 x 45˚
C
1)
-0.2
4
B
1.27
±0.25
0.64
0.1
+0.10 2)
0.41
±0.2
-0.06
6
M
0.2 A B 14x
M
0.2
C
14
8
1
7
1)
8.75-0.2
A
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
GPS01230
Dimensions in mm
Figure 5
Outline PG-DSO-14-1 (Plastic Green Dual Small Outline)
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products
and to be compliant with government regulations the device is available as a green
product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable
for Pb-free soldering according to IPC/JEDEC J-STD-020).
Datasheet Rev. 2.1
36
2007-08-13
TLE 6389
9
Revision History
Version
Rev. 2.0
Rev. 2.1
Date
Changes
2006-08-24 Final Datasheet TLE 6389-2/-3
2007-08-13 Initial version of RoHS-compliant derivate of TLE 6389-2/-3
– page 1: AEC certified statement added
– page 1 and page 36: RoHS compliance statement and
green product feature added
– page 1 and page 36: Package changed to RoHS
compliant version
– Legal Disclaimer updated
Datasheet Rev. 2.1
37
2007-08-13
Edition 2007-08-13
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2007 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
TLE6389-2GV50 替代型号
型号 | 制造商 | 描述 | 替代类型 | 文档 |
TLE6389-2GV | INFINEON | TLE6389 降压直流-直流开关控制器在 1mA 到 2.5A 负载范围内具有高效率。独 | 完全替代 | |
TLE6389GV | INFINEON | Step - Down DC/DC Controller | 类似代替 | |
TLE6389G50-1 | INFINEON | Step - Down DC/DC Controller | 功能相似 |
TLE6389-2GV50 相关器件
型号 | 制造商 | 描述 | 价格 | 文档 |
TLE6389-3G V50 | INFINEON | TLE6389 降压直流-直流开关控制器在 1mA 到 2.5A 整个负载范围具有高效率。独特 PWM/PFM 控制方案具有高达 100% 占空比,从而实现极低的压差。此控制方案无最低负载要求,将轻负载电流降低至 120μA,具体数值取决于外部元件尺寸。此外,可调节型号 TLE6389-2GV 可以通过启用输入关断,使输入电流降低至 <2μA。TLE6389 降压控制器驱动外部 P 通道 MOSFET,支持灵活设计输出功率高达 12.5W 的应用。高开关频率和连续导通模式下工作,支持使用小型表面安装电感器。同时降低输出电容要求,最大限度减小 PC 板面积,降低系统成本。输出电压预先设定为 5V(TLE6389-2GV50 和 TLE6389-3GV50),TLE6389-2GV 输出电压可调节。TLE6389-2GV50 型号具有复位功能,阈值介于 4.5V 和 4.8V 之间,包括少量迟滞,迟滞典型值为 50mV。在 TLE6389-3GV50 型号中,器件复位具有典型值为 1V 的迟滞。所有 TLE6389 输入电压均可高达 60V。 | 获取价格 | |
TLE6389-3GV50 | INFINEON | Switching Controller, Current-mode, 2.3A, 420kHz Switching Freq-Max, PDSO14, PLASTIC, SOP-14 | 获取价格 | |
TLE63892GV50NTMA1 | INFINEON | Switching Controller, Current-mode, 2.3A, 420kHz Switching Freq-Max, PDSO14, PLASTIC, SOP-14 | 获取价格 | |
TLE63892GV50XUMA1 | INFINEON | Switching Controller, Current-mode, 2.3A, 420kHz Switching Freq-Max, PDSO14, PLASTIC, SOP-14 | 获取价格 | |
TLE63892GV50XUMA2 | INFINEON | Switching Controller, Current-mode, 2.3A, 420kHz Switching Freq-Max, PDSO14, PLASTIC, SOP-14 | 获取价格 | |
TLE63892GVNTMA1 | INFINEON | Switching Controller, Current-mode, 2.3A, 420kHz Switching Freq-Max, PDSO14, PLASTIC, SOP-14 | 获取价格 | |
TLE63893GV50XUMA2 | INFINEON | Switching Controller, | 获取价格 | |
TLE6389G33 | INFINEON | Step - Down DC/DC Controller | 获取价格 | |
TLE6389G33-1 | INFINEON | Step - Down DC/DC Controller | 获取价格 | |
TLE6389G50 | INFINEON | Step - Down DC/DC Controller | 获取价格 |
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