TLE7245G [INFINEON]
Buffer/Inverter Based Peripheral Driver, 1A, PDSO24, PLASTIC, SOP-24;
| 型号： | TLE7245G |
| 厂家： | 
Infineon |
| 描述： | Buffer/Inverter Based Peripheral Driver, 1A, PDSO24, PLASTIC, SOP-24 驱动 光电二极管 接口集成电路 |
| 文件： | 总36页 (文件大小：916K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Datasheet, V2.0, October 2006
SPIDER - TLE 7245G
SPI Driver for Enhanced Relay Control
Eight Channel Low-Side Switch
Automotive Power
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Table of Contents
Page
Product Summary . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.1 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
1.2 Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6
2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2.1 Pin Assignment SPIDER - TLE 7245G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
2.2 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7
3 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
3.1 Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
4 Block Description and Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . .11
4.1 Power Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11
4.1.1 Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1.2 Input Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.1.3 Inductive Output Clamp . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
4.1.4 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1.5 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4.1.6 Command Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.2 Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
4.2.1 Over Load Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
4.2.2 Over Temperature Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2.3 Reverse Polarity Protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
4.2.5 Command Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.3 Diagnostic Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22
4.3.1 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.3.2 Command Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.4 Serial Peripheral Interface (SPI) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25
4.4.1 SPI Signal Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.4.2 Daisy Chain Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.4.3 Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
4.4.4 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
4.4.5 SPI Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
4.4.6 Register Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
5 Package Outlines SPIDER - TLE 7245G . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33
6 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34
Datasheet
2
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
P-DSO-24-3
The SPIDER - TLE 7245G is an eight channel low-
side power switch in P-DSO-24-3 package providing
embedded protective functions. It is especially
designed for standard relays in automotive
applications.
A serial peripheral interface (SPI) is utilized for
control and diagnosis of the device and the load. For
direct control, there is an input pin available.
The power transistors are built by N-channel vertical
power MOSFETs. The device is monolithically
integrated in Smart Power Technology.
Product Summary
Supply voltage
Vdd
VVSO
4.5 … 5.5 V
3.0 … 5.5 V
1.5 Ω
200 mA
1 A
1 µA
48 V
5 MHz
Supply voltage for SO buffer
On-State resistance at 25 °C
Nominal load current
Over load current limitation
Output leakage current per channel at 25 °C
Drain to source clamping voltage
SPI clock frequency
RDS(ON, typ)
IL(nom, max)
IDS(LIM, min)
IDS(OFF, max)
VDS(CL, min)
fSCLK(max)
Type
Ordering Code
on request
Package
P-DSO-24-3
SPIDER - TLE 7245G
Datasheet
3
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Basic Features
• 16 bit SPI for diagnostics and control
• SPI providing daisy chain capability
• 3.3 V and 5 V compatible SPI
• A configurable input pin offers complete flexibility for PWM operation
• Stable behavior at under voltage
Protective Functions
• Short circuit protection
• Over load protection, configurable behavior (limitation or shutdown)
• Thermal shutdown, configurable behavior (latch or restart)
• Electrostatic discharge protection (ESD)
Diagnostic Functions
• Diagnostic information via SPI
• Open load detection in OFF-state
• Shorted to GND detection in OFF-state
• Over temperature in ON-state
• Over load in ON-state
Applications
• Especially designed for driving relays in automotive applications
• All types of capacitive, resistive and inductive loads
Datasheet
4
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Overview
1
Overview
The SPIDER - TLE 7245G is an eight channel low-side relay switch (1.5 Ω per channel)
in P-DSO-24-3 package providing embedded protective functions. The 16 bit serial
peripheral interface (SPI) is utilized for control and diagnosis of the device and the loads.
The SPI interface provides daisy-chain capability in order to assemble multiple devices
in one SPI chain by using the same number of micro-controller pins.
The SPIDER - TLE 7245G is equipped with one input pin that can be individually routed
to the output control of each channel thus offering complete flexibility in design and PCB-
layout. The input mapping as well as the boolean operation between input signal an
output control signal is configured via SPI.
The device provides full diagnosis of the load, which is open load, short to GND as well
as short circuit to Vbat detection and over load / over temperature indication. The SPI
diagnosis flags indicate latched fault conditions that may have occurred.
Each output stage is protected against short circuit. In case of over load, the current of
the affected channel is limited. There is a temperature sensor available for each channel
to protect the device in case of over temperature. The shut down behavior in case of over
load or over temperature can be configured via SPI for each channel individually.
1.1
Block Diagram
VDD
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
IN
input map
boolean operation
output control
RST
reset / stand-by
temperature
sensor
CS
SCLK
SI
VSO
SO
control,
diagnostic
and
short circuit
detection
hardware
configuration
SPI
protective
functions
gate
control
output monitor
open load
detection
diagnosis register
GND
Overview.emf
Figure 1
Block Diagram
Datasheet
5
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Overview
1.2
Terms
Following figure shows all terms used in this datasheet.
Vbat
Idd
ID0
ID1
ID2
ID3
ID4
ID5
ID6
ID7
VDD
VSO
RST
IN
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
IV SO
IRST
IIN
Vdd
VVSO
VRST
VIN
VCS
VSCLK
VDS0
VDS1
VDS2
VDS3
VDS4
VDS5
VDS6
VDS7
SPIDER -
TLE 7245G
ICS
CS
ISCLK
ISI
SCLK
SI
ISO
VSI
SO
GND
VSO
IGND
Terms.emf
Figure 2
Terms
In all tables of electrical characteristics is valid: Channel related symbols without channel
number are valid for each channel separately (e.g. VDS specification is valid for
VDS0 … VDS7).
All SPI register bits are marked as follows: ADDR.PARAMETER(e.g. CTL.OUT0). In SPI
register description, the values in bold letters (e.g. 0) are default values.
Datasheet
6
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Pin Configuration
2
Pin Configuration
2.1
Pin Assignment SPIDER - TLE 7245G
(top view)
CS
IN
1
24
23
22
21
20
19
18
17
16
15
14
13
RST
2
VDD
OUT1
OUT0
GND
GND
GND
GND
OUT7
OUT6
SI
OUT2
OUT3
GND
GND
GND
GND
OUT4
OUT5
VSO
SO
3
4
5
6
7
8
9
10
11
12
SCLK
P-DSO-24 .emf
Figure 3
2.2
Pin Configuration P-DSO-24-3
Pin Definitions and Functions
Pin
Symbol
I/O
Function
Power Supply
23
11
VDD
VSO
–
–
–
Power supply
Power supply for SO buffer
Ground
5, 6, 7, 8, GND
17, 18, 19,
20
Power Stages
21
22
3
OUT0
OUT1
OUT2
O
O
O
Drain of power transistor channel 0
Drain of power transistor channel 1
Drain of power transistor channel 2
Datasheet
7
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Pin Configuration
Pin
4
9
10
15
Symbol
OUT3
OUT4
OUT5
OUT6
OUT7
I/O
O
O
O
O
Function
Drain of power transistor channel 3
Drain of power transistor channel 4
Drain of power transistor channel 5
Drain of power transistor channel 6
Drain of power transistor channel 7
O
Inputs
24
2
RST
IN
I
I
Reset input pin (active low)
Input multiplexer input pin
SPI
1
13
CS
SCLK
SI
I
I
I
SPI Chip select (active low)
Serial clock
Serial data in
14
12
SO
O
Serial data out
Datasheet
8
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Electrical Characteristics
3
Electrical Characteristics
3.1
Maximum Ratings
Stresses above the ones listed here may affect device reliability or may cause permanent
damage to the device.
Unless otherwise specified: Vdd = 4.5 V to 5.5 V, Tj = -40 °C to 150 °C
Pos.
Parameter
Symbol
Limit Values
Unit Test
Conditions
min.
max.
Power Supply
3.1.1
3.1.2
3.1.3
Power supply voltage
VSO supply voltage
Power supply voltage for full Vbat(SC)
short circuit protection
(single pulse)
Vdd
VVSO
-0.3
-0.3
0
5.5
Vdd + 0.3 V
V
1)
20
28
V
OVL= 0 2)
OVL= 1
Power Stages
3.1.4
3.1.5
3.1.6
Load current
Voltage at power transistor VDS
Maximum energy
dissipation one channel
single pulse
ID
-1
1
48
A
V
mJ
3)
EAS
T
j(0) = 85 °C
D(0) = 0.2 A
j(0) = 150 °C
65
30
I
T
I
D(0) = 0.2 A
3)
Maximum energy
EAR
mJ
dissipation one channel
repetitive pulses
T
j(0) = 150 °C
1 · 104 cycles
1 · 106 cycles
18
11
I
I
D(0) = 0.17 A
D(0) =0.17 A
Logic Pins
3.1.7
3.1.8
3.1.9
Voltage at input pin
Voltage at reset pin
Voltage at chip select pin
VIN
VRST
VCS
-0.3
-0.3
-0.3
-0.3
5.5
5.5
5.5
5.5
V
V
V
V
3.1.10 Voltage at serial clock pin VSCLK
Datasheet
9
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Electrical Characteristics
Unless otherwise specified: Vdd = 4.5 V to 5.5 V, Tj = -40 °C to 150 °C
Pos.
Parameter
Symbol
Limit Values
Unit Test
Conditions
min.
-0.3
-0.3
max.
5.5
5.5
3.1.11 Voltage at serial input pin
3.1.12 Voltage at serial output pin VSO
VSI
V
V
Temperatures
3.1.13 Junction Temperature
3.1.14 Dynamic temperature
increase while switching
Tj
∆Tj
-40
150
60
°C
°C
3.1.15 Storage Temperature
ESD Susceptibility
3.1.16 ESD susceptibility HBM
Tstg
-55
-2
150
2
°C
VESD
kV according to
EIA/JESD
22-A 114B
1)
Vdd + 0.3 V < 5.5 V
2) Details on configuration of protective function OLCR.OVL can be found in Section 4.2.5
3) Pulse shape represents inductive switch off: ID(t) = ID(0) × (1 - t / tpulse); 0 < t < tpulse
Datasheet
10
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Block Description and Electrical Characteristics
4
Block Description and Electrical Characteristics
4.1
Power Stages
The SPIDER - TLE 7245G is an eight channel low-side relay switch. The power stages
are built by N-channel vertical power MOSFET transistors.
4.1.1
Power Supply
The SPIDER - TLE 7245G is supplied by power supply line Vdd which is used for the
digital as well as the analog functions of the device including the gate control of the
power stages. There is a power-on reset function implemented for the supply line. After
start-up of the power supply, all SPI registers are reset to their default values. A capacitor
at pins VDD to GND is recommended.
The voltage at pin VSO is used by the driver of the SO line at the SPI. It is designed to
be functional at a wide voltage range.
There is a reset pin available. At low level at this pin, all registers are set to their default
values and the quiescent supply current is minimized.
4.1.2
Input Circuit
There is an input pin available at SPIDER - TLE 7245G to control the output stages.
channel 2
channel 1
channel 0
OR
gate
IN
control
IIN
&
MAP0
OUT0
BOL0
SLE0
channel 7
channel 6
channel 5
channel 4
channel 3
gate
control
OR
&
OUT3
BOL3
MAP3
SLE3
InputLogic.emf
Figure 4
Input Mapping and Boolean Operator
Datasheet
11
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Block Description and Electrical Characteristics
The input signal can be configured to be used as control signal of the output stages for
each channel separately. The channels 0 to 3 differ from the channels 4 to 7 in the
mapping behavior. Please refer to Figure 4 for details.
The current sink to ground at the input pin ensures that the channels switch off in case
of open pin. The zener diode protects the input circuit against ESD pulses.
4.1.3
Inductive Output Clamp
When switching off inductive loads, the potential at pin OUT rises to VDS(CL) potential,
because the inductance intends to continue driving the current. The voltage clamping is
necessary to prevent destruction of the device, see Figure 5 for details. Nevertheless,
the maximum allowed load inductance is limited.
Vbat
L,
RL
ID
OUT
VDS
VDS( CL)
GND
OutputClamp .emf
Figure 5
Output Clamp Implementation
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the SPIDER -
TLE 7245G. This energy can be calculated with following equation:
V
bat – VDS(CL)
RL ⋅ ID
bat – V
L
------------------------------------
------
(1)
(2)
E = VDS(CL)
⋅
⋅ ln 1 – ----------------------------------- + ID
⋅
RL
RL
V
DS(CL)
The equation simplifies under the assumption of RL = 0:
Vbat
2
1
--
E = LID ⋅ 1 – -----------------------------------
2
V
bat – V
DS(CL)
The energy, which is converted into heat, is limited by the thermal design of the
component.
Datasheet
12
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Block Description and Electrical Characteristics
4.1.4
Timing Diagrams
The power transistors are switched on and off with a dedicated slope via the OUTbits of
the serial peripheral interface SPI. The switching times tON and tOFF are designed
equally.
CS
SPI:ON
SPI:OFF
t
tON
tOFF
VDS
80%
20%
t
SwitchOn.emf
Figure 6
Switching a Resistive Load
When the input mapping is configured accordingly, a high signal at the input pin is
equivalent to a SPI ON command.
Datasheet
13
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Block Description and Electrical Characteristics
4.1.5
Electrical Characteristics
Unless otherwise specified: Vdd = 4.5 V to 5.5 V, Tj = -40 °C to 150 °C
typical values: Vdd = 5.0 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
min. typ. max.
Unit Test
Conditions
Power Supply
4.1.1 Power supply voltage Vdd
4.1.2 Power supply current Idd(ON)
4.5
5.5
5
V
mA
3
all channels ON
4.1.3 Power supply reset
Idd(RST)
10 µA
V
V
V
V
V
RST = 0 V
IN = 0 V
current
SCLK = 0 V
SI = 0 V
CS = Vdd
4.1.4 Power-on reset
threshold voltage
Vdd(PO)
4.5
V
Output Characteristics
4.1.5 On-State resistance RDS(ON)
Ω
IL = 500 mA
per channel
Vdd = 5 V
1.5
Tj = 25 °C 1)
Tj = 150 °C
3.0
4.1.6 Output leakage
current in stand-by
mode
ID(RST)
µA
VDS = 13.5 V
1
2
5
Tj = 25 °C 1)
Tj = 125 °C
Tj = 150 °C 1)
(per channel)
4.1.7 Output clamping
voltage
VDS(CL)
48
60
V
Input Characteristics
4.1.8 L level of pin IN
4.1.9 H level of pin IN
4.1.10 Input voltage
hysteresis at pin IN
4.1.11 L-input pull-down
current through pin IN
4.1.12 H-input pull-down
current through pin IN
VIN(L)
VIN(H)
∆VIN
0
2.0
1.0
Vdd
V
V
V
1)
1)
0.1
50
IIN(L)
IIN(H)
10
20
100 µA
100 µA
V
V
IN = 1 V
IN = 5 V
Datasheet
14
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Block Description and Electrical Characteristics
Unless otherwise specified: Vdd = 4.5 V to 5.5 V, Tj = -40 °C to 150 °C
typical values: Vdd = 5.0 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
min. typ. max.
Unit Test
Conditions
Reset
4.1.13 L level of pin RST
4.1.14 H level of pin RST
VRST(L)
VRST(H)
0
2
0
1
Vdd
10 µA
V
V
4.1.15 L-input pull-up current IRST(L)
V
V
RST = 1 V
RST = 2 V
through pin RST
4.1.16 H-input pull-up
current through pin
RST
IRST(H)
20
10
50
75
100 µA
Thermal Resistance
1) 2)
4.1.17 Junction to ambient
Rthja
K/W
all channels active
Timings
4.1.18 Power-on wake up
twu(PO)
200 µs
time
4.1.19 Reset duration
4.1.20 Turn-on time
tRST(L)
tON
µs
µs
V
bat = 14 V
V
DS = 20% Vbat
I
DS = 500 mA,
resistive load
SLE= 0
SLE= 1
15
60
4.1.21 Turn-off time
DS = 80% Vbat
tOFF
µs
Vbat = 14 V
V
IDS = 500 mA,
resistive load
SLE= 0
SLE= 1
15
60
1) Not subject to production test, specified by design
2) Device mounted on PCB (100 mm × 100 mm × 1.5 mm). PCB without blown air. All channels with balanced
loads.
Note: Characteristics show the deviation of parameter at the given supply voltage and
junction temperature. Typical values show the typical parameters expected from
manufacturing.
Datasheet
15
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Block Description and Electrical Characteristics
4.1.6
Command Description
IMCR
Input Mapping Configuration Register
Reset Value: 08H
7
6
5
4
3
2
1
0
MAP7
MAP6
MAP5
MAP4
MAP3
MAP2
MAP1
MAP0
rw
rw
rw
rw
rw
rw
rw
rw
Field
Bits
Type Description
MAPn
(n = 7-0)
n
rw
Input Mapping Configuration Channel n
0
Channel n can not be controlled with input pin
(default value).
1
Channel n can be controlled with input pin,
depending on additional set-up.
BOCR
Boolean Operator Configuration Register
Reset Value: 00H
7
6
5
4
3
2
1
0
BOL7
BOL6
BOL5
BOL4
BOL3
BOL2
BOL1
BOL0
rw
rw
rw
rw
rw
rw
rw
rw
Field
BOLn
(n = 7-0)
Bits
n
Type Description
Boolean Operator Configuration Channel n
rw
0
Logic “OR” for channel n (default value).
Logic “AND” for channel n.
1
Datasheet
16
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Block Description and Electrical Characteristics
SRCR
Slew Rate Configuration Register
Reset Value: 00H
7
6
5
4
3
2
1
0
SLE7
SLE6
SLE5
SLE4
SLE3
SLE2
SLE1
SLE0
rw
rw
rw
rw
rw
rw
rw
rw
Field
Bits
Type Description
SLEn
(n = 7-0)
n
rw
Slew Rate Configuration Channel n
0
1
Channel n is switched fast (default value).
Channel n is switched slowly.
CTL
Output Control Register
Reset Value: 00H
7
6
5
4
3
2
1
0
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
rw
rw
rw
rw
rw
rw
rw
rw
Field
OUTn
(n = 7-0)
Bits
n
Type Description
Output Control Channel n
rw
0
Channel n is switched off (default value).
Channel n is switched on, depending on
additional set-up.
1
Datasheet
17
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Protection Functions
4.2
Protection Functions
The device provides embedded protective functions. Integrated protection functions are
designed to prevent IC destruction under fault conditions described in this datasheet.
Fault conditions are considered as “outside” normal operating range. Protection
functions are not designed for continuous repetitive operation.
There is an over load and over temperature protection implemented in the SPIDER -
TLE 7245G. The behavior of the protective functions can be set-up via SPI. Following
figure gives an overview about the protective functions.
IN
OUTn
Tn
temperature
monitor
OVTn
T
input mapping
&
gate control
&
current
OUTn
BOLn
MAPn
OVLn
delay
limitation
CLn
GND
Protection.emf
Figure 7
4.2.1
Protective Functions
Over Load Protection
The SPIDER - TLE 7245G is protected in case of over load or short circuit of the load.
The behavior in case of over load can be configured as follows:
a) The current is limited to IDS(LIM). After time td(fault), the according over load flag Ln is
set. The channel may shut down due to over temperature.
b) The current is limited to IDS(LIM). After time td(off), the over loaded channel nswitches
off and the according over load flag Ln is set.
The over load flag (CLn) of the affected channel is cleared by a low-high transition of the
input signal. For timing information, please refer to Figure 8 for details.
Datasheet
18
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Protection Functions
OLCR.OVL = 0
OLCR.OVL = 1
IN
IN
t
t
ID
ID
ID( lim)
ID( lim)
td(fault)
td(off)
t
t
L = 1b
L = 0b
L = 1b
L = 0b
OverLoadTiming .emf
Figure 8
4.2.2
Over Load Behavior
Over Temperature Protection
A temperature sensor for each channel causes an overheated channel nto switch off
immediately to prevent destruction. The behavior in case of over temperature can be
configured as follows:
a) After cooling down, the channel is switched on again with thermal hysteresis ∆Tj.
b) The affected channel stays switched off until the over temperature flag is cleared.
The over temperature flag of the affected channel is cleared by a low-high transition of
the input signal.
4.2.3
Reverse Polarity Protection
In case of reverse polarity, the intrinsic body diode of the power transistor causes power
dissipation. The reverse current through the intrinsic body diode has to be limited by the
connected load. The Vdd supply pin must be protected against reverse polarity externally.
The over-temperature protection as well as other protective functions are not active
during reverse polarity.
Datasheet
19
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Protection Functions
4.2.4
Electrical Characteristics
Unless otherwise specified: Vdd = 4.5 V to 5.5 V, Tj = -40 °C to 150 °C
typical values: Vdd = 5.0 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
min. typ. max.
Unit Test
Conditions
Over Load Protection
4.2.1 Over load current
ID(lim)
1
2
A
OVL= 0
OVL= 1
limitation
4.2.2 Over load shut-down td(off)
10
50 µs
delay time
Over Temperature Protection
1)
1)
4.2.3 Over temperature
Tj(OT)
170
200 °C
shut-down threshold
4.2.4 Thermal hysteresis
∆Tj(OT)
10
K
1) Not subject to production test, specified by design
Datasheet
20
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Protection Functions
4.2.5
Command Description
OLCR
Over Load Configuration Register
Reset Value: 00H
7
6
5
4
3
2
1
0
OVL7
OVL6
OVL5
OVL4
OVL3
OVL2
OVL1
OVL0
rw
rw
rw
rw
rw
rw
rw
rw
Field
Bits
Type Description
OVLn
(n = 7-0)
n
rw
Over Load Configuration Channel n
0
Channel n limits the current in case of over load
(default value).
1
Channel n shuts down in case of over load.
OTCR
Over Temperature Configuration Register
Reset Value: 00H
7
6
5
4
3
2
1
0
OVT7
OVT6
OVT5
OVT4
OVT3
OVT2
OVT1
OVT0
rw
rw
rw
rw
rw
rw
rw
rw
Field
OVTn
(n = 7-0)
Bits
n
Type Description
Over Temperature Configuration Channel n
rw
0
Autorestart (default value)
Latched shut down
1
Datasheet
21
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Diagnostic Features
4.3
Diagnostic Features
The SPI of SPIDER - TLE 7245G provides diagnosis information about the device and
about the load. There are following diagnosis flags implemented:
• The diagnosis information of the protective functions (flags CLn and Tn) of channel n
is latched in the diagnosis flag Pn.
• The open load diagnosis of channel nis latched in the diagnosis flag OLn.
• The short to gnd monitor information of channel nis latched in the diagnosis flag SGn.
All flags are cleared after a successful SPI transmission.
There is an output state monitor implemented in the device that indicates the switch state
of the device in register STA. Depending on the voltage level at input pin and protective
functions the bits are high or low.
Please see Figure 9 for details:
VDD
VDS( SG)
MUX
IDS( SG)
SPI
CHn
OUTn
SGn
OLn
00
01
10
VDS( OL)
IDS( PD)
STA.
OUTn
gate control
CLn
protective functions
Pn
OR
Tn
GND
diagnosis .emf
Figure 9
Block Diagram Diagnosis
Datasheet
22
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Diagnostic Features
4.3.1
Electrical Characteristics
Unless otherwise specified: Vdd = 4.5 V to 5.5 V, Tj = -40 °C to 150 °C
typical values: Vdd = 5.0 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
Unit Test Conditions
min. typ. max.
OFF State Diagnosis
4.3.1 Open load detection VDS(OL)
Vdd
-
Vdd
-
Vdd
-
V
threshold voltage
2.5
50
2
1.3
4.3.2 Output pull-down
diagnosis current per
channel
ID(PD)
VDS(SG)
ID(SG)
td(fault)
90
150 µA
4.3.3 Short to gnd
detection threshold
voltage
Vdd
-
Vdd
-
Vdd
- V
3.4
3.0
2.6
4.3.4 Output diagnosis
current for short to
gnd per channel
-150 -100 -50 µA
V
DS = 0 V
4.3.5 Fault delay time
50
100 200 µs
Datasheet
23
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Diagnostic Features
4.3.2
STA
Command Description
Output Status Monitor
Reset Value: 00H
7
6
5
4
3
2
1
0
OUT7
OUT6
OUT5
OUT4
OUT3
OUT2
OUT1
OUT0
r
r
r
r
r
r
r
r
Field
OUTn
(n = 7-0)
Bits
n
Type Description
Output Status
r
0
Voltage level at channel n: VDS > VDS(OL)
.
.
1
Voltage level at channel n: VDS < VDS(OL)
Datasheet
24
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Serial Peripheral Interface (SPI)
4.4
Serial Peripheral Interface (SPI)
The diagnosis and control interface is based on a serial peripheral interface (SPI).
The SPI is a full duplex synchronous serial slave interface, which uses four lines: SO, SI,
SCLK and CS. Data is transferred by the lines SI and SO at the data rate given by SCLK.
The falling edge of CS indicates the beginning of a data access. Data is sampled in on
line SI at the falling edge of SCLK and shifted out on line SO at the rising edge of SCLK.
Each access must be terminated by a rising edge of CS. A modulo 8 counter ensures
that data is taken only, when a multiple of 8 bit has been transferred. The interface
provides daisy chain capability.
MSB
MSB
14
14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
LSB
LSB
SO
SI
CS
SCLK
time
SPI.emf
Figure 10
Serial Peripheral Interface
The SPI protocol is described in Section 4.4.5. It is reset to the default values after
power-on reset or a low signal at pin RST.
4.4.1
SPI Signal Description
CS - Chip Select: The system micro controller selects the SPIDER - TLE 7245G by
means of the CS pin. Whenever the pin is in low state, data transfer can take place.
When CS is in high state, any signals at the SCLK and SI pins are ignored and SO is
forced into a high impedance state.
CS High to Low transition:
• The diagnosis information is transferred into the shift register.
CS Low to High transition:
• Command decoding is only done, when after the falling edge of CS exactly a multiple
(1, 2, 3, …) of eight SCLK signals have been detected.
• Data from shift register is transferred into the input matrix register.
• The diagnosis flags are cleared.
SCLK - Serial Clock: This input pin clocks the internal shift register. The serial input (SI)
transfers data into the shift register on the falling edge of SCLK while the serial output
Datasheet
25
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Serial Peripheral Interface (SPI)
(SO) shifts diagnostic information out on the rising edge of the serial clock. It is essential
that the SCLK pin is in low state whenever chip select CS makes any transition.
SI - Serial Input: Serial input data bits are shifted in at this pin, the most significant bit
first. SI information is read on the falling edge of SCLK. The 16 bit input data consist of
two parts (control and data). Please refer to Section 4.4.5 for further information.
SO Serial Output: Data is shifted out serially at this pin, the most significant bit first. SO
is in high impedance state until the CS pin goes to low state. New data will appear at the
SO pin following the rising edge of SCLK. Please refer to Section 4.4.5 for further
information.
4.4.2
Daisy Chain Capability
The SPI of SPIDER - TLE 7245G provides daisy chain capability. In this configuration
several devices are activated by the same CS signal MCS. The SI line of one device is
connected with the SO line of another device (see Figure 11), which builds a chain. The
ends of the chain are connected with the output and input of the master device, MO and
MI respectively. The master device provides the master clock MCLK, which is connected
to the SCLK line of each device in the chain.
device 1
SPI
device 2
SPI
device 3
SPI
SI
SO SI
SO SI
SO
MO
MI
MCS
MCLK
SPI_DasyChain.emf
Figure 11
Daisy Chain Configuration
In the SPI block of each device, there is one shift register where one bit from SI line is
shifted in each SCLK. The bit shifted out can be seen at SO. After 16 SCLK cycles, the
data transfer for one device has been finished. In single chip configuration, the CS line
must go high to make the device accept the transferred data. In daisy chain configuration
the data shifted out at device #1 has been shifted in to device #2. When using three
devices in daisy chain, three times 16 bits have to be shifted through the devices. After
that, the MCS line must go high (see Figure 12).
Datasheet
26
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Serial Peripheral Interface (SPI)
SO device 3
SI device 3
SO device 2
SI device 2
SO device 1
SI device 1
MI
MO
MCS
MCLK
time
SPI_DasyChain2.emf
Figure 12
4.4.3
Data Transfer in Daisy Chain Configuration
Timing Diagrams
tCS(lead)
tCS(lag)
tCS( td)
tSCLK(P)
tSCLK(L)
0.7V
dd
CS
SCLK
SI
0.2V
dd
tSCLK(H)
0.7V
dd
0.2V
dd
tSI(su)
tSI(h)
0.7V
dd
0.2V
dd
tSO(v)
tSO(dis)
0.7V
dd
SO
0.2V
dd
SPI Timing.emf
Figure 13
Timing Diagram
Datasheet
27
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Serial Peripheral Interface (SPI)
4.4.4
Electrical Characteristics
Unless otherwise specified:
V
VSO = 3.0 V to 5.5 V, Vdd = 4.5 V to 5.5 V, Tj = -40 °C to 150 °C
typical values: VVSO = 5.0 V, Vdd = 5.0 V, Tj = 25 °C
Pos. Parameter
Symbol
Limit Values
min. typ. max.
Unit Test
Conditions
Power Supply
4.4.1 Power supply voltage VVSO
3.0
0
5.5
1
V
V
for SO buffer
Input Characteristics (CS, SCLK, SI)
4.4.2 L level of pin
CS VCS(L)
SCLK VSCLK(L)
SI VSI(L)
4.4.3 H level of pin
2
Vdd
V
CS VCS(H)
SCLK VSCLK(H)
SI VSI(H)
4.4.4 L-input pull-up current ICS(L)
10
5
20
20
50 µA
50 µA
50 µA
V
CS = 0 V
CS = 2 V
through CS
1)
4.4.5 H-input pull-up
current through CS
ICS(H)
V
1)
4.4.6 L-input pull-down
current through pin
5
SCLK ISCLK(L)
V
V
SCLK = 1 V
SI = 1 V
SI ISI(L)
4.4.7 H-input pull-down
current through pin
SCLK ISCLK(H)
SI ISI(H)
Output Characteristics (SO)
4.4.8 L level output voltage VSO(L)
4.4.9 H level output voltage VSO(H)
10
0
50 µA
V
V
SCLK = 5 V
SI = 5 V
0.4
V
I
I
SO = -2.5 mA
SO = 2 mA
4.6
2.4
5
3
V
VSO = 5 V
VSO = 3 V
V
4.4.10 Output tristate
leakage current
ISO(OFF)
-10
10 µA
V
CS = Vdd
Datasheet
28
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Serial Peripheral Interface (SPI)
Unless otherwise specified:
VSO = 3.0 V to 5.5 V, Vdd = 4.5 V to 5.5 V, Tj = -40 °C to 150 °C
typical values: VVSO = 5.0 V, Vdd = 5.0 V, Tj = 25 °C
V
Pos. Parameter
Symbol
Limit Values
min. typ. max.
Unit Test
Conditions
Timings
4.4.11 Serial clock frequency fSCLK
0
200
50
5
MHz
ns
ns
4.4.12 Serial clock period
tSCLK(P)
4.4.13 Serial clock high time tSCLK(H)
4.4.14 Serial clock low time tSCLK(L)
50
ns
4.4.15 Enable lead time
(falling CS to rising
SCLK)
tSCLK(lead) 250
ns
4.4.16 Enable lag time
(falling SCLK to rising
CS)
4.4.17 Transfer delay time
(rising CS to falling
CS)
4.4.18 Data setup time
(required time SI to
falling SCLK)
tSCLK(lag)
tCS(del)
tSI(su)
250
250
20
ns
ns
ns
ns
4.4.19 Data hold time (falling tSI(h)
20
SCLK to SI)
1)
4.4.20 Output disable time
(rising CS to SO tri-
state)
tSO(dis)
150 ns
100 ns
4.4.21 Output data valid time tSO(v)
CL = 50 pF 1)
with capacitive load
1) Not subject to production test, specified by design.
Datasheet
29
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Serial Peripheral Interface (SPI)
4.4.5
SPI Protocol
The SPI protocol of the SPIDER - TLE 7245G provides two types of registers. The
control registers and the diagnosis registers. After power-on reset, all register bits set to
default values.
SI
Reset Value: xxxxH
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CMD
0
0
0
ADDR
DATA
Field
CMD
Bits
15:14
Type Description
Command
00
Diagnosis only: The requested data is shifted out
at SO. This command does not change any
register setting.
01
10
11
Read register: The register content of the
addressed register will be sent in the next frame.
Reset registers: All registers are reset to their
default values.
Write register: The data of the SI word will be
written to the addressed register.
ADDR
DATA
10:8
7:0
Address
Pointer to register for read and write command
Data
Data written to or read from register selected by address
ADDR
Datasheet
30
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Serial Peripheral Interface (SPI)
SO
Standard Diagnosis
Reset Value: xxxxH
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
CH7
CH6
CH5
CH4
CH3
CH2
CH1
CH0
Field
CHn
(n = 7-0)
Bits
(2n+1):
2n
Type Description
Standard Diagnosis for Channel n
00
01
10
11
Short circuit to GND
Open load
Over load, over temperature
Normal operation
SO
Second Frame of Read Command
Reset Value: xxxxH
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0
1
0
0
0
ADDR
DATA
Field
ADDR
Bits
10:8
Type Description
Address
Pointer to register for read and write command
DATA
7:0
Data
Data written to or read from register selected by address
ADDR
Note: Reading a register needs two SPI frames. In the first frame the RD command is
sent. In the second frame the output at SPI signal SO will contain the requested
information. A new command can be executed in the second frame.
Datasheet
31
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Serial Peripheral Interface (SPI)
4.4.6
Register Overview
Name W/R
Addr
7
6
5
4
3
2
1
0
default
1)
IMCR W/R
BOCR W/R
OLCR W/R
OTCR W/R
SRCR W/R
001B MAP7 MAP6 MAP5 MAP4 MAP3 MAP2 MAP1 MAP0 08H
010B BOL7 BOL6 BOL5 BOL4 BOL3 BOL2 BOL1 BOL0 00H
011B OVL7 OVL6 OVL5 OVL4 OVL3 OVL2 OVL1 OVL0 00H
100B OVT7 OVT6 OVT5 OVT4 OVT3 OVT2 OVT1 OVT0 00H
101B SLE7 SLE6 SLE5 SLE4 SLE3 SLE2 SLE1 SLE0 00H
110B OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0 00H
111B OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1 OUT0 00H
STA
CTL
R
W/R
1) The default values are set after reset.
Datasheet
32
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Package Outlines SPIDER - TLE 7245G
5
Package Outlines SPIDER - TLE 7245G
0.35 x 45˚
1)
7.6-0.2
+0.09
0.23
0.4 +0.8
1.27
0.1
2)
0.35 +0.15
0.2 24x
0.3
10.3
24
13
1
12
1)
15.6 -0.4
Index Marking
1) Does not include plastic or metal protrusion of 0.15 max. per side
2) Lead width can be 0.61 max. in dambar area
Dimensions in mm
Figure 14
P-DSO-24-3 (Plastic Dual Small Outline Package )
Datasheet
33
V2.0, 2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Revision History
6
Revision History
Version Date
Changes
V2.0
06-10-12 first released Datasheet
Datasheet
34
2006-10-12
SPI Driver for Enhanced Relay Control
SPIDER - TLE 7245G
Edition 2006-10-12
Published by Infineon Technologies AG,
St.-Martin-Strasse 53,
D-81541 München, Germany
© Infineon Technologies AG 2006.
All Rights Reserved.
Attention please!
The information herein is given to describe certain components and shall not be considered as warranted
characteristics.
Terms of delivery and rights to technical change reserved.
We hereby disclaim any and all warranties, including but not limited to warranties of non-infringement, regarding
circuits, descriptions and charts stated herein.
Infineon Technologies is an approved CECC manufacturer.
Information
For further information on technology, delivery terms and conditions and prices please contact your nearest
Infineon Technologies Office in Germany or our Infineon Technologies Representatives worldwide.
Warnings
Due to technical requirements components may contain dangerous substances. For information on the types in
question please contact your nearest Infineon Technologies Office.
Infineon Technologies Components may only be used in life-support devices or systems with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system, or to affect the safety or effectiveness of that device or system. Life support
devices or systems are intended to be implanted in the human body, or to support and/or maintain and sustain
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
Datasheet
35
2006-10-12
h t t p : / / w w w . i n f i n e o n . c o m
Published by Infineon Technologies AG
相关型号：
©2020 ICPDF网 联系我们和版权申明