TLE8110EE [INFINEON]
Smart Multichannel Low Side Switch with Parallel Control and SPI Interface; 智能多通道低边开关与控制并行和SPI接口
| 型号： | TLE8110EE |
| 厂家： | 
Infineon |
| 描述： | Smart Multichannel Low Side Switch with Parallel Control and SPI Interface |
| 文件： | 总72页 (文件大小：1256K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
Data Sheet, Rev. 1.0, June 2009
TLE8110EE
Smart Multichannel Low Side Switch with Parallel
Control and SPI Interface
coreFLEX
Automotive Power
FLEX
Smart Multi-Channel Switch
1
Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2
2.1
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
3
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
Terms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1
3.2
3.3
4
General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
4.1
4.2
4.3
5
5.1
5.2
Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Description Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
Electrical Characteristics Power Supply . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6
6.1
6.2
Reset and Enable Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Description Reset and Enable Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
Electrical Characteristics Reset Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7
Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Description Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Description of the Clamping Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
Electrical Characteristics Power Outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
Parallel Connection of the Power Stages . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
7.1
7.2
7.3
7.4
8
8.1
8.2
Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Description Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Electrical Characteristics Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
9
9.1
9.2
Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Description Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
Electrical Characteristics Parallel Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
10
10.1
Protection Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
Electrical Characteristics Overload Protection Function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36
11
16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Description 16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Timing Diagrams . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Electrical Characteristics 16 bit SPI Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42
11.1
11.2
11.3
12
Control of the device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Internal Clock . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
SPI Interface. Signals and Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Description 16 bit SPI Interface Signals . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44
Daisy Chain Capability . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
SPI Protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
16-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45
2x8-bit protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
16- and 2x8-bit protocol mixed. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
safeCOMMUNICATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Encoding of the commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
Modulo-8 Counter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
TOR - Transmission or Diagnosis Error Bit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
12.1
12.2
12.2.1
12.2.2
12.2.3
12.2.3.1
12.2.3.2
12.2.3.3
12.2.4
12.2.4.1
12.2.4.2
12.2.4.3
Data Sheet
2
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
12.3
Register and Command - Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
CMD - Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
CMD_RSD - Command: Return Short Diagnosis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54
CMD_RSDS - Command: Return Short Diagnosis and Device Status . . . . . . . . . . . . . . . . . . . . 55
CMD_RPC - Command: Return Pattern Check . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
CMD_RINx - Command: Return Input Pin (INx) -Status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58
DCC - Diagnosis Registers and compactCONTROL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60
DRx - Diagnosis Registers Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
DRx - Return on DRx Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
DMSx/OPSx - Diagnosis Mode Set / Output Pin Set Commands . . . . . . . . . . . . . . . . . . . . . . . . 64
OUTx - Output Control Register CHx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66
ISx - INPUT or Serial Mode Control Register, Bank A and Bank B . . . . . . . . . . . . . . . . . . . . . . . . . 66
PMx - Parallel Mode Register CHx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
DEVS - Device Settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
12.3.1
12.3.1.1
12.3.1.2
12.3.1.3
12.3.1.4
12.3.2
12.3.2.1
12.3.2.2
12.3.2.3
12.3.3
12.3.4
12.3.5
12.3.6
13
14
Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
Revision History (Book) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71
Data Sheet
3
Rev. 1.0, 2009-06-15
Smart Multichannel Low Side Switch with Parallel
Control and SPI Interface
TLE8110EE
coreFLEX
1
Overview
Features
•
•
•
•
•
•
•
•
Overvoltage, Overtemperature, ESD -Protection
Direct Parallel PWM Control of all Channels
safeCOMMUNICATION (SPI and Parallel)
Efficient Communication Mode: compactCONTROL
Compatible with 3.3V- and 5V- Micro Controllers I/O ports
clampSAFE for highly efficient parallel use of the channels
Green Product (RoHS compliant)
AEC Qualified
PG-DSO-36-41
Application
Power Switch Automotive and Industrial Systems switching Solenoids, Relays and Resistive Loads
•
Description
10 - channel Low-Side Switch in Smart Power Technology [SPT] with Serial Peripheral Interface [SPI] and 10 open
drain DMOS output stages. The TLE8110EE is protected by embedded protection functions and designed for
automotive and industrial applications. The output stages are controlled via Parallel Input Pins for PWM use or SPI
Interface . The TLE8110EE is particularly suitable for Engine Management and Powertrain Systems.
Type
Package
Marking
TLE8110EE
PG-DSO-36-41
TLE8110EE
Data Sheet
4
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Overview
Table 1
Product Summary
Parameter
Analogue Supply voltage
Digital Supply Voltage
clamping voltage (CH 1-10)
On resistance
typical at Tj=25°C and IDnom
Symbol
VDD
VCC
Value
Unit
4.50 … 5.50
3.00 … 5.50
55
0.30
0.25
0.60
0.60
0.50
1.20
1.50
1.70
0.75
2.60
3.70
1.70
V
V
V
Ω
Ω
Ω
Ω
Ω
Ω
A
A
A
A
A
A
VDS(AZ)typ
RON1-4
RON5-6
RON7-10
RON1-4
RON5-6
RON7-10
IDnom
IDnom
IDnom
IDSD(low)
IDSD(low)
IDSD(low)
On resistance
maximum at Tj=150°C and IDnom
Nominal Output current (CH 1-4)
Nominal Output current (CH 5-6)
Nominal Output current (CH 7-10)
Output Current Shut-down Threshold (CH 1-4) min.
Output Current Shut-down Threshold (CH 5-6) min.
Output Current Shut-down Threshold (CH 7-10) min.
VBatt
VDD = typ. 5V
Supply IC
VCC = typ. 3.3….5V
RST
TLE8110 EE
Micro
I/O
I/O
EN
Controller
4 to 6
IN1
OUT1
Injectors
or Solenoids
General purpose
Channels in
parallel connection
I/O
IN10
OUT10
SPI_SI
SPI_SO
SPI_CLK
SPI_CS
SPI_SO
SPI_SI
General purpose
Channels for Relays
SPI_CLK
SPI_CS
Appl _Diag_10ch_TLE8110 .vsd
Figure 1
Block Diagram TLE8110EE
Data Sheet
5
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Block Diagram
2
Block Diagram
VDD
RST
EN
IN1
IN2
IN3
IN4
IN5
IN6
IN7
IN8
IN9
IN10
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
OUT8
OUT9
OUT10
analogue
control,
diagnostic
and protective
functions
temperature
sensor
Input Control
(TTL or CMOS)
short circuit
detection
gate
control
input
register
S_CS
S_CLK
S_SI
SPI
(TTL or
CMOS)
Logic
control
unit
open load
detection
diagnosis
register
S_SO
short to GND
detection
control
register
VCC
Block_diag_10ch_TLE8110.vsd
GND
Figure 2
Block Diagram
2.1
Description
Communication
The TLE8110EE is a 10-channel low-side switch in PG-DSO-36-41 package providing embedded protective
functions. The 16 bit serial peripheral interface (SPI) can be utilized for control and diagnosis of the device and
the loads. The SPI interface provides daisy-chain capability in order to assemble multiple devices in one SPI chain
by using the same number of micro-controller pins.
The analogue and the digital part of the device is supplied by 5V. Logic Input and Output Signals are then
compatible to 5V logic level [TTL - level]. Optionally, the logic part can be supplied with lower voltages to achieve
signal compatibility with e.g. 3.3V logic level [CMOS - level].
The TLE8110EE is equipped with 10 parallel input pins that are routed to each output channel. This allows control
of the channels for loads driven by Pulse Width Modulation (PWM). The output channels can also be controlled
by SPI.
Reset
The device is equipped with one Reset Pin and one Enable. Reset [RST] serves the whole device, Enable [EN]
serves only the Output Control Unit and the Power Stages.
Diagnosis
The device provides diagnosis of the load, including open load, short to GND as well as short circuit to VBatt
detection and over-load / over-temperature indication. The SPI diagnosis flags indicates if latched fault conditions
may have occurred.
Data Sheet
6
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Block Diagram
Protection
Each output stage is protected against short circuit. In case of over load, the affected channel is switched off. The
switching off reaction time is dependent on two switching thresholds. Restart of the channel is done by clearing
the Diagnosis Register. This feature protects the device against uncontrolled repetitive short circuits. The reaction
to a short-circuit and over-temperature can alternatively changed to further modes, such as semi- or auto - restart
of the affected channel.
There is a temperature sensor available for each channel to protect the device in case of over temperature. In case
of over temperature the affected channel is switched off and the Over-Temperature Flag is set. Restart of the
channel is done by deleting the Flag. This feature protects the device against uncontrolled temperature toggling.
Parallel Connection of Channels
The device is featured with a central clamping structure, so-called CLAMPsafe. This feature ensures a balanced
clamping between the channels and allows in case of parallel connection of channels a high efficient usage of the
channel capabilities. This parallel mode is additionally featured by best possible parameter- and thermal matching
of the channels and by controlling the channels accordingly.
Data Sheet
7
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Pin Configuration
3
Pin Configuration
3.1
Pin Assignment
1
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
Figure 3
Pin Configuration
3.2
Pin Definitions and Functions
Pin
1
Symbol
GND
Function
Ground
2
3
4
5
6
7
8
P_IN1
P_IN2
EN
Parallel Input Pin 1. Default assignment to Output Channel 1.
Parallel Input Pin 2. Default assignment to Output Channel 2.
Enable Input Pin. If not needed, connect with Pull-up resistor to VCC.
Reset Input Pin. (low active). If not needed, connect with Pull-up resistor to VCC.
Parallel Input Pin 3. Default assignment to Output Channel 3.
Parallel Input Pin 4. Default assignment to Output Channel 4.
Analogue Supply Voltage
RST
P_IN3
P_IN4
VDD
9
P_IN5
VCC
S_SO
S_CLK
S_CS
S_SI
P_IN6
P_IN7
P_IN8
GND
Parallel Input Pin 5. Default assignment to Output Channel 5.
Digital Supply Voltage
Serial Peripheral Interface [SPI], Serial Output
Serial Peripheral Interface [SPI], Clock Input
Serial Peripheral Interface [SPI], Chip Select (active Low)
Serial Peripheral Interface [SPI], Serial Input
Parallel Input Pin 6. Default assignment to Output Channel 6.
Parallel Input Pin 7. Default assignment to Output Channel 7.
Parallel Input Pin 8. Default assignment to Output Channel 8.
Ground
10
11
12
13
14
15
16
17
18
Data Sheet
8
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Pin Configuration
Pin
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
Symbol
GND
OUT9
OUT10
N.C.
Function
Ground
Drain of Power Transistor Channel 9
Drain of Power Transistor Channel 10
internally not connected, connect to Ground
Ground
Drain of Power Transistor Channel 6
Drain of Power Transistor Channel 4
Drain of Power Transistor Channel 3
Parallel Input Pin 9. Default assignment to Output Channel 9.
Parallel Input Pin 10. Default assignment to Output Channel 10.
Drain of Power Transistor Channel 2
Drain of Power Transistor Channel 1
Drain of Power Transistor Channel 5
Ground
internally not connected, connect to Ground
Drain of Power Transistor Channel 8
Drain of Power Transistor Channel 7
Ground
GND
OUT6
OUT4
OUT3
P_IN9
P_IN10
OUT2
OUT1
OUT5
GND
N.C.
OUT8
OUT7
GND
Cooling GND
Tab
Cooling Tab; internally connected to GND
Data Sheet
9
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Pin Configuration
3.3
Terms
VBatt
PG-DSO-36
1
GND
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
19
GND
OUT7
OUT8
IOUT7
IP_IN1
IP_IN2
IEN
VP_IN1
VP_IN2
VEN
VRST
VP_IN3
VP_IN4
VVDD
VOUT7
VOUT8
2
P_IN1
P_IN2
EN
IOUT8
3
4
N.C.
GND
IRST
IP_IN3
IP_IN4
IVDD
5
RST
IOUT5
IOUT1
IOUT2
IP_IN10
IP_IN9
VOUT5
VOUT1
VOUT2
VP_IN10
VP_IN9
VOUT3
VOUT4
VOUT6
6
P_IN3
P_IN4
VDD
OUT5
OUT1
OUT2
7
8
GND
IP_IN5
VP_IN5
VVCC
VS_SO
VS_CLK
VS_CS
VS_SI
VP_IN6
9
P_IN5
VCC
P_IN10
P_IN9
OUT3
OUT4
OUT6
GND
IVCC
10
11
12
13
14
15
16
17
18
IS_SO
IS_CLK
IS_CS
IS_SI
IOUT3
IOUT4
IOUT6
S_SO
S_CLK
S_CS
Heat-Slug /
Exposed Pad
(back-side)
S_SI
IP_IN6
IP_IN7
P_IN6
N.C.
IOUT10
VP_IN7
VOUT10
P_IN7
P_IN8
GND
OUT10
OUT9
GND
IOUT9
IP_IN8
VP_IN8
VOUT9
Top View
Terms_TLE8110.vsd
Figure 4
Terms
Data Sheet
10
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
General Product Characteristics
4
General Product Characteristics
4.1
Absolute Maximum Ratings1)
Absolute Maximum Ratings
Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Max.
Unit Conditions
Min.
Supply Voltages
4.1.1
4.1.2
4.1.3
4.1.4
Digital Supply voltage
Digital Supply voltage
Analogue Supply voltage
Analogue Supply voltage
VCC
VCC
VDD
VDD
-0.3
-0.3
-0.3
-0.3
5.5
6.2
5.5
6.2
V
V
V
V
permanent
t < 10s
permanent
t < 10s
Power Stages
4.1.5
4.1.6
4.1.7
4.1.8
Load Current (CH 1 to 10 )
Reverse Current Output (CH 1-10)
Total Ground Current
Continous Drain Source Voltage
(Channel 1 to 10)
IDn
IDn
IGND
VDSn
-
IDSD(low)
-
20
45
A
A
A
V
–
–
–
–
-IDSD(low)
-20
-0.3
4.1.9
maximum Voltage for short circuit
protection on Output
VDSn
-
24
V
one event on one
single channel.
Single Clamping Energies1) 2)
4.1.10
4.1.11
4.1.12
4.1.13
4.1.14
4.1.15
Maximum Energy Dissipation per
EAS
EAS
EAS
EAS
EAS
EAS
-
-
-
-
-
-
28
43
37
54
10
32
mJ
mJ
mJ
mJ
mJ
mJ
ID = 3.8A
Channel. Single Pulse.
Channel 1-4.
Tj = 150°C
Maximum Energy Dissipation per
Channel. Single Pulse.
Channel 1-4.
Maximum Energy Dissipation per
Channel. Single Pulse.
Channel 5-6.
Maximum Energy Dissipation per
Channel. Single Pulse.
Channel 5-6.
Maximum Energy Dissipation per
Channel. Single Pulse.
Channel 7-10.
ID = 1.5A
Tj = 150°C
ID = 4.8A
Tj = 150°C
ID = 1,7A
Tj = 150°C
ID = 2.3A
Tj = 150°C
Maximum Energy Dissipation per
Channel. Single Pulse.
Channel 7-10.
ID = 0.75A
Tj = 150°C
Logic Pins (SPI, INn, EN, RST)
4.1.16 Input Voltage at all Logic Pin
Vx
-0.3
5.5
V
permanent
1) Not subject to production test, specified by design.
Data Sheet
11
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
General Product Characteristics
Absolute Maximum Ratings (cont’d)
Tj = -40 °C to +150 °C; all voltages with respect to ground, positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit Conditions
Min.
-0.3
-0.3
Max.
6.2
45
4.1.17
4.1.18
Input Voltage at all Logic Pin
Input Voltage at Pin 27, 28 (IN9, 10, )
Vx
Vx
V
V
t < 10s
permanent
Temperatures
4.1.19
Junction Temperature
Tj
Tj
-40
-40
150
175
°C
°C
–
4.1.20
Junction Temperature
max. 100hrs
cumulative
4.1.21
ESD Robustness
4.1.22
Storage Temperature
Tstg
-55
-4
150
4
°C
–
Electro Static Discharge Voltage
“Human Body Model - HBM”
VESD
kV
All Pins
HBM3)
1.5KOhm, 100pF
4.1.23
4.1.24
Electro Static Discharge Voltage
“Charged Device Model - CDM”
Electro Static Discharge Voltage
“Charged Device Model - CDM”
VESD
VESD
-500
-750
500
750
V
V
All Pins
CDM4)
Pin 1, 18, 19, 36
(corner pins)
CDM4)
1) Only one single channel at one time.
2) triangular test pulse
3) ESD susceptibility, HBM according to EIA/JESD 22-A114-B
4) ESD susceptibility, Charged Device Model “CDM” EIA/JESD22-C101-C
Note:Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute
maximum rating conditions for extended periods may affect device reliability.
Note:Integrated protection functions are designed to prevent IC destruction under fault conditions described in the
data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are
not designed for continuous repetitive operation.
4.2
Functional Range
Pos.
Parameter
Symbol
Limit Values
Max.
Unit
Conditions
Min.
Supply Voltages
4.2.1
4.2.2
4.2.3
Analogue Supply Voltage
Digital Supply Voltage
Digital Supply Voltage
VDD
VCC
VCC
4.5
3
VDD
5.5
VDD
5.5
V
V
V
–
–
leakage Currents
(ICC) might increase
if VCC > VDD.
Power Stages
4.2.4
Ground Current
IGND_typ
9
A
resistive loads1)
Data Sheet
12
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
General Product Characteristics
Pos.
Parameter
Symbol
Limit Values
Max.
Unit
Conditions
Min.
Temperatures
4.2.5
4.2.6
Junction Temperature
Junction Temperature
Tj
Tj
-40
-40
150
175
°C
°C
-
1) for 100hrs
1) Not subject to production test, specified by design.
Note:Within the functional range the IC operates as described in the circuit description. The electrical
characteristics are specified within the conditions given in the related electrical characteristics table.
4.3
Thermal Resistance
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
-
-
Typ.
1.75
25.00
Max.
3.60
-
4.3.1
4.3.2
Junction to Soldering Point
Junction to Ambient
RthJSP
RthJA
K/W
K/W
Pvtot = 3W1)2)3)
Pvtot = 3W1)2)3)
1) Not subject to production test, specified by design.
2) Homogenous power distrubution over all channels (All Power stages equally heated), dependent on cooling set-up
3) refer to Figure 5
Data Sheet
13
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
General Product Characteristics
Dimensions: 76.2 x 114.3 x 1.5 mm³ , FR4
Metalization: JEDEC 2s2p (JESD 51-7) + (JESD 51-5)
Thermal Vias: Diameter 0.3 mm; plating 25 µm; 24 pcs. for PG-DSO-36-41
70µm modeled (traces)
35µm, 90% metalization
70µm, 5% metalization
P_DSO_36_41_PCB.vsd
Figure 5
PG-DSO-36-41 PCB set-up
Data Sheet
14
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Supply
5
Power Supply
5.1
Description Power Supply
The TLE8110EE is supplied by analogue power supply line VDD which is used for the analogue functions of the
device, such as the gate control of the power stages. The digital power supply line VCC is used to supply the digital
part and offers the possibility to adapt the logic level of the serial output pins to lower logic levels.
VCC
VDD
EN
RST
VCC
VDD
Under
Under
Voltage
Monitor
Voltage
Monitor
or
or
input
register
OUTx
Input
analogue
control,
diagnostic
and protective
functions
and
Serial
Inter-
face
Logic
control
unit
diagnosis
register
Fault
Detection
Gate Control
control
register
GND
Block_diag_Supply_Reset.vsd
Figure 6
Block Diagram Supply and Reset
Description Supply
The Supply Voltage Pins are monitored during the power-on phase and under normal operating conditions for
under voltage.
If during Power-on the increasing supply voltage exceeds the Supply Power-on Switching Threshold, the internal
Reset is released after an internal delay has expired.
In case of under voltage, a device internal reset is performed. The Switching Threshold for this case is the Power-
on Switching threshold minus the Switching Hysteresis.
In case of under voltage on the analogue supply line VDD the outputs are turned off but the content of the registers
and the functionality of the logic part is kept alive. In case of under voltage on the digital supply VCC line, a complete
reset including the registers is performed.
After returning back to normal supply voltage and an internal delay, the related functional blocks are turned on
again. For more details, refer to the chapter “Reset”
The device internal under-voltage set will set the TOR bit and the related bits in SDS (Short Diagnosis and Device
Status) to allow the micro controller to detect this reset. For more information, refer to the chapter “Control of the
Device”.
Figure 7
removed
Data Sheet
15
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Supply
5.2
Electrical Characteristics Power Supply
Electrical Characteristics: Power Supply
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Digital Supply and Power-on Reset
5.2.1
5.2.2
a)
Digital Supply Voltage
VCC
3
-
-
15
5.5
20
V
µA
Digital Supply Current during Reset ICCstb
fSCLK = 0Hz,
S_CS = VCC,
Tj=85°C 1)
(VCC < VCCpo
)
V
CC = 2.0V
V
DD > VCC
b)
-
20
40
µA
fSCLK = 0Hz,
S_CS = VCC,
Tj=150°C
V
CC = 2.0V
DD > VCC
V
5.2.3
a)
Digital Supply Current during Reset ICCstb
( VRST < VRSTl
-
-
-
-
2
5
µA
fSCLK = 0Hz,
S_CS = VCC,
Tj=85°C1)
)
V
DD > VCC
5
15
2
µA
fSCLK = 0Hz,
S_CS = VCC,
Tj=150°C
b)
V
DD > VCC
5.2.4
a)
Digital Supply Operating Current
CC = 3.3V
ICC
0.15
0.5
mA
mA
fSCLK = 0Hz,
V
Tj=150°C.
all Channels ON
1)
5
fSCLK = 5MHz,
Tj=150°C.
b)
all Channels ON
1)2)
5.2.5
a)
Digital Supply Operating Current
CC = 5.5V
ICC
-
-
0.25
0.8
2
mA
mA
fSCLK = 0Hz,
Tj=150°C.
V
all Channels ON
10
fSCLK = 5MHz,
b)
Tj=150°C.
all Channels ON
1)2)
5.2.6
Digital Supply Power-on Switching VCCpo
1.9
2.8
3
V
VCC increasing
Threshold
1)
5.2.7
5.2.8
Digital Supply Switching Hysteresis VCChy
removed
100
300
500
mV
Data Sheet
16
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Supply
Electrical Characteristics: Power Supply
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
5.2.9
removed
Analogue Supply and Power-on Reset
5.2.10 Analogue Supply Voltage
VDD
IDDstb
4.5
-
-
10
5.5
20
V
µA
-
5.2.11 Analogue Supply Current during
fSCLK = 0Hz,
Reset
(VDD< VDDpo
Tj=85°C 1)
a)
)
VDD = 2V
-
15
40
µA
f
SCLK = 0Hz,
Tj=150°C
DD = 2V
b)
V
5.2.12 Analogue Supply Current during
IDDstb
-
-
-
1
2
8
5
µA
µA
mA
fSCLK = 0Hz,
Reset
Tj=85°C 1)
a)
( VEN< VENl
)
15
25
fSCLK = 0Hz,
Tj=150°C
b)
5.2.13 Analogue Supply Operating Current IDD
fSCLK = 0...5MHz1)
Tj=150°C
all Channels ON
5.2.14 Analogue Supply Power-on
Switching Threshold
5.2.15 Analogue Supply Switching
Hysteresis
5.2.16 Analogue Supply Power-on Delay
Time
VDDpo
VDDhy
tVDDpo
3
4.2
4.5
V
V
DD increasing
1)
100
-
200
100
400
200
mV
µs
V
DD increasing 1)
5.2.17 removed
1) Parameter not subject to production test. Specified by design.
2) C = 50pF connected to S_SO
Data Sheet
17
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Reset and Enable Inputs
6
Reset and Enable Inputs
6.1
Description Reset and Enable Inputs
The TLE8110EE contains one Reset- and one Enable Input Pin as can be seen in Figure 6.
Description:
Reset Pin [RST] is the main reset and acts as the internal under voltage reset monitoring of the digital supply
voltage VCC: As soon as RST is pulled low, the whole device including the control registers is reset.
The Enable Pin [EN] resets only the Output channels and the control circuits. The content of the all registers is
kept. This functions offers the possibility of a “soft” reset turning off only the Output lines but keeping alive the SPI
communication and the contents of the control registers. This allows the read out of the diagnosis and setting up
the device during or directly after Reset.
6.2
Electrical Characteristics Reset Inputs
Electrical Characteristics: Reset Inputs
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Reset Input Pin [RST]
6.2.1
6.2.2
6.2.3
6.2.4
Low Level of RST
High Level of RST
RST Switching Hysteresis
Reset Pin pull-down Current
VRSTl
-0.3
VCC *0.4
20
20
2.4
-
-
VCC *0.2
VCC
300
85
V
V
mV
µA
µA
-
VRSTh
VRSThy
IRSTresh
IRSTresl
-
1)
100
40
-
VRST=5V
-
VRST=0.6V1)
6.2.5
6.2.6
removed
1)
Minimum Reset Duration time RST tRSTmin
1
-
-
µs
Enable Input Pin [EN]
6.2.7
6.2.8
6.2.9
Low Level of EN
High Level of EN
EN Switching Hysteresis
VENl
-0.3
VCC *0.4
20
5
2.4
-
-
-
60
35
-
VCC *0.2
V
V
mV
µA
µA
µs
-
VENh
VENhy
IENresh
IENresl
tENrr
VCC
300
85
-
-
1)
6.2.10 Enable Pin pull-down Current
VEN=5V
VEN=0.6V1)
1)
6.2.11 Enable Reaction Time
(reaction of OUTx)
6.2.12 Minimum Enable Duration time EN tENmin
1) Parameter not subject of production test. Specified by design.
4
-
1)
1.2
-
-
µs
Data Sheet
18
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Reset and Enable Inputs
VDD
t
Enable
Enable
valid
not valid
VEN
Device OFF
OUTx OFF
Device ON
VENh
VENl
T<
tENmin
VENhy
t
OUTx
Enable of
Output
Device
operating
t
tENrr
tVDDpo
External _reset. vsd
Figure 8
Timing
Data Sheet
19
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
7
Power Outputs
7.1
Description Power Outputs
The TLE8110EE is a 10 channel low-side powertrain switch. The power stages are built by N-channel power
MOSFET transistors. The device is a universal multichannel switch but mostly suited for the use in Engine
Management Systems [EMS]. Within an EMS, the best fit of the channels to the typical loads is:
•
•
•
Channel 1 to 4 for Injector valves or mid-sized solenoids with a nominal current requirement of 1.5A.
Channel 5 to 6 for mid-sized solenoids or Injector valves with a nominal current requirement of 1.7A
Channel 7 to 10 for small solenoids or relays with a nominal current requirement of 0.75A
Channel 1 to 10 provide enhanced clamping capabilities of typically 55V best suited for inductive loads such as
injector valves. It is recommended in case of an inductive load, to connect an external free wheeling- or clamping
diode, where-ever possible to reduce power dissipation.
All channels can be connected in parallel. Channels 1 to 4, 5 to 6 and 7 to 10 are prepared by matching for parallel
connection with the possibility to use a high portion of the capability of each single channel also in parallel mode
(refer to Chapter 7.4).
Channel 5 and 6 have a higher current shut down threshold to allow to connect in parallel mode a load with a high
inrush-current, such as a lambda sensor heater.
VCC
VDD
RST
EN
OUT1
OUT2
OUT3
OUT4
IN1
IN2
IN3
gate
control CH1
gate
control CH2
temperature
sensor
OUT5
OUT6
INx
short circuit
detection
input
register
Serial and
OUT7
OUT8
OUT9
OUT10
Parallel Input
control
open load
detection
diagnosis
register
(for details , see
Chapter „Control
of the device“ )
short to GND
detection
control
register
GND
Block _diag_10ch_TLE8x10_Outputs.vsd
Figure 9
Block Diagram of Control and Power Outputs
Data Sheet
20
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
7.2
Description of the Clamping Structure
When switching off inductive loads, the potential at pin OUT rises to VDS(CL) potential, because the inductance
intends to continue driving the current. The voltage clamping is necessary to prevent destruction of the device,
see Figure 10 for the principle clamping circuit. Nevertheless, the maximum allowed load inductance is limited.
Vbat
L,
RL
ID
OUT
V
DS
V
DScl
GND
OutputClamp.vsd
Figure 10 Principle Clamping Structure
Maximum Load Inductance
During demagnetization of inductive loads, energy has to be dissipated in the device. This energy can be
calculated with following equation:
V
batt – VDScl
RL ⋅ IL
batt – V
L
RL
E = VDS(CL) ⋅ ------------------------------- ⋅ ln 1 – -------------------------------- + IL ⋅ ------
(1)
RL
V
DScl
Following equation simplifies under the assumption of RL = 0:
VDScl
DScl – VBatt
2
1
2
E = --LIL ⋅ --------------------------------
(2)
V
The maximum energy, which is converted into heat, is limited by the thermal design of the component.
The Repetitive Clamping Energies EAR as defined in the following Chapter 7.3, Item 7.3.4 (and following items)
are representing cummulated operating scenarios for one channel group with:
•
•
•
normal operating condition with a typical battery voltage of VBatt = 16V and an ambient temperature of
typically Ta = 125°C.
cold operation with a typical battery voltage of typically VBatt = 13.5V and an ambient temperature of
typically Ta = -40°C.
generator defect with a typical battery voltage of VBatt = 18V and an ambient temperature of typically Ta =135°C.
The Power Dissipation Pv is typically considered with Pv = 3W during normal operation. This power dissipation
changes during the other operating conditions according the thermal behaviour of RDSon and the load Resistance
RL. The interaction of both, together with an assumed typical Rthja = 7.5K/W, the given average junction
temperature Tj is considered as the start temperature for the clamping process.
Due to the fact, that the maximum possible Repetitive Clamping Energy EAR varies with the Load Current ID,
partially optional operating points are specified within the scenarios. Those optional operating points are not
considered as cummulative clamping pulses to the scenario.
Data Sheet
21
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
7.3
Electrical Characteristics Power Outputs
Electrical Characteristics: Diagnostics
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Output Channel Resistance
7.3.1
7.3.2
7.3.3
On State Resistance CH1 to 4
RDSon
-
-
-
-
-
-
0.3
-
Ohm
Ohm
Ohm
Ohm
Ohm
Ohm
I
Dnom=1,5A;
Tj=25°C1)
Dnom=1,5A;
Tj=150°C
Dnom=1.7A;
Tj=25°C1)
Dnom=1.7A;
Tj=150°C
Dnom=0.75A;
Tj=25°C1)
Dnom=0.75A;
0.45
0.25
0.35
0.6
0.6
-
I
On State Resistance CH 5 to 6
On State Resistance CH7 to 10
RDSon
I
0.5
-
I
RDSon
I
0.85
1.2
I
Tj=150°C
Clamping Energy
Channel 1-4
7.3.4
Maximum Energy Dissipation per EAR
-
-
15
mJ
ID = 1.25A
Channel. Repetitive Pulses.
Operating Mode
Tj=145°C
1)
600Mio. pulses over life time.
Or Item 7.3.5
7.3.5
7.3.6
Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Operating Mode
-
-
-
-
21
25
mJ
mJ
ID = 0.87A
Tj=145°C
1)
600Mio. pulses over life time.
Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Cold Operation:
0.5Mio. pulses over life time
cumulated. Or Item 7.3.7
ID = 1.73A
Tj=-20°C
1)
7.3.7
7.3.8
Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Cold Operation
-
-
-
-
20
18
mJ
mJ
ID = 0.87A
Tj=-20°C
1)
3Mio. pulses over life time
cumulated.
Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Generator Defect
300k pulses over life time
cumulated. Or Item 7.3.9
ID =1.45A
Tj=150°C
1)
Data Sheet
22
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
Electrical Characteristics: Diagnostics (cont’d)
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
7.3.9
Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Generator Defect
300k pulses over life time
cumulated.
-
-
27
mJ
ID = 0.98A
Tj=150°C
1)
7.3.10 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Jump Start
-
-
-
-
33
mJ
mJ
ID = 1.82A
Tj=95°C
1)
20k pulses over life time
cumulated, max 1 min per cycle. Or
Item 7.3.11
7.3.11 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Jump Start
50
ID = 1.23A
Tj=95°C
1)
20k pulses over life time
cumulated, max 1 min per cycle.
Channel 5-6
7.3.12 Maximum Energy Dissipation per EAR
-
-
-
-
-
-
-
-
24
23
31
59
mJ
mJ
mJ
mJ
ID = 1.7A
Channel. Repetitive Pulses.
Tj=145°C
1)
Operating Mode
600Mio. pulses over life time.
7.3.13 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Cold Operation
ID = 1.72A
Tj= -20°C
1)
3Mio. pulses over life time
cumulated.
7.3.14 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Generator Defect
IDS = 1.92A
Tj=150°C
1)
300k pulses over life time
cumulated.
7.3.15 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Jump Start
ID = 2.43A
Tj = 95°C
1)
20k pulses over life time
cumulated, max 1 min per cycle.
Data Sheet
23
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
Electrical Characteristics: Diagnostics (cont’d)
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Channel 7-10
7.3.16 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
-
-
13
15
mJ
ID = 0.49A
Tj =145°C
1)
Operating Mode
600Mio. pulses over life time.
7.3.17 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Cold Operation
-
-
-
-
-
-
-
-
mJ
mJ
mJ
ID = 0,54A
Tj = -20°C
1)
0.5Mio pulses over life time
cumulated. Or Item 7.3.18
7.3.18 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Cold Operation
12
17
31
ID = 0.49A
Tj = -20°C
1)
3Mio. pulses over life time
cumulated.
7.3.19 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Generator Defect
ID = 0.55A
Tj = 150°C
1)
300k pulses over life time
cumulated.
7.3.20 Maximum Energy Dissipation per EAR
Channel. Repetitive Pulses.
Jump Start
ID = 0.69A
Tj = 95°C
1)
20k pulses over life time
cumulated, max 1 min per cycle.
Leakage Current
7.3.21
-
-
-
-
-
-
-
-
3
µA
µA
µA
µA
VDS=13.5V;
IDoff
Output Leakage Current in standby
mode, Channel 1 to 4
V
DD=5V,
Tj=85°C1)
8
VDS=13.5V;
V
DD=5V,
Tj=150°C
7.3.22
6
VDS=13.5V;
VDD=5V,
IDoff
Output Leakage Current in standby
mode, Channel 5 to 6
Tj=85°C1)
12
VDS=13.5V;
V
DD=5V,
Tj=150°C
Data Sheet
24
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
Electrical Characteristics: Diagnostics (cont’d)
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
7.3.23
-
-
2
µA
VDS=13.5V;
IDoff
Output Leakage Current in standby
mode, Channel 7 to 10
V
DD=5V,
Tj=85°C1)
-
-
5
µA
V
VDS=13.5V;
V
DD=5V,
Tj=150°C
Clamping Voltage
7.3.24 Output Clamping Voltage, Channel VDScl
45
55
60
1 to 10
Timing
1)
7.3.25 Output Switching Frequency
fOUTx
-
-
-
20
10
kHz
µs
resistive load
duty cyle > 25%.
VDS=20% of Vbatt
Vbatt = 13.5V,
7.3.26 Turn-on Time
tdON
5
I
DS1 to IDS6 = 1A,
I
DS7 to IDS10 = 0.5A,
resistive load
7.3.27 Turn-off Time
tdOFF
-
5
10
µs
VDS=80% of Vbatt
Vbatt = 13.5V,
I
DS1 to IDS6 = 1A,
I
DS7 to IDS10 = 0.5A
resistive load
1) Parameter is not subject to production test, specified by design.
RDS_ON /
Ohm
RON_vs_Tj_CH1-4,6.vsd
RDS_ON vs. Tj: CH 1-4 (VDD=5V)
0,6
0,5
0,4
0,3
0,2
-40 -20
0
20 40 60 80 100 120 140 Tj/°C
Figure 11 CH 1-4: typical behaviour of RDS_ON versus the junction temperaure Tj
Data Sheet
25
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
RDS_ON /
Ohm
RON_vs_Tj_CH5-6.vsd
RDS_ON vs. Tj: CH 5-6 (VDD=5V)
0,5
0,4
0,3
0,2
0,1
-40 -20
0
20 40 60 80 100 120 140 Tj/°C
Figure 12 CH 5-6: typical behaviour of RDS_ON versus the junction temperaure Tj
RDS_ON /
Ohm
1.2
RON_vs_Tj_CH7-10.vsd
RDS_ON vs. Tj: CH 7-10 (VDD=5V)
1.0
0.8
0.6
0.4
-40 -20
0
20 40 60 80 100 120 140 Tj/°C
Figure 13 CH7-10: typical behaviour of RDS_ON versus the junction temperaure Tj
Data Sheet
26
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
VCL_vs_Tj_all_CH.vsd
VCL / V
57
VCLn vs. Tj: all Channels
56
55
54
53
-40 -20
0
20 40 60 80 100 120 140 Tj/°C
Figure 14 All Channels: typical behaviour of the clamping voltage versus the junction temperature
VINx
VINh
VINh
VOUTx
t
VBATT
80%
20%
t
tdON
tdOFF
Timing_Power_Outx _res1.vsd
Figure 15 Timing of Output Channel switching (resistive load)
7.4
Parallel Connection of the Power Stages
The TLE8110EE is equipped with a structure which improves the capability of parallel-connected channels. The
device can be “informed” via the PMx.PMx - bits (see chapter control of the device) which of the channels are
connected in parallel. The input channels can be mapped to the parallel connected output channels in order to
apply the PWM signals. This feature allows a flexible adaptation to different load situations within the same
hardware setup.
In case of overload the ground current and the power dissipation is increasing. The application has to take into
account that all maximum ratings are observed (e.g. operating temperature TJ and total ground current IGND, see
Maximum Ratings). In case of parallel connection of channels with or w/o PM-bit set, the maximum clamping
energy defined by the derating factor must not be exceeded.
All stages are switched on and off simultaneously. The µC has to ensure that the stages which are connected in
parallel have always the same state (on or off). The PM-bit should be set according to the parallel connected power
stages in order to achieve the best possible de-rating factors.
Data Sheet
27
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
The performance during parallel connection of channels is specified by design and not subject to the production
test. The given factors are maximum values.
All channels at the same junction temperature level.
I_FACTOR
The maximum operating current IDSD,OUTxy(sum) is the minimum “Current Shut-down Threshold Low” IDSD(low),n(min)
DSD,OUTxy(sum) = I_FACTOR * SUM[IDSD(low),n(min)] with I_FACTOR = 1.
The typical maximum operating current IDSD,OUTxy(sum) is the “Current Shut-down Threshold Typ” IDSD(typ),n(min)
D,OUTxy(sum) = I_FACTOR * SUM[ID(typ),n
.
•
I
.
•
I
]
E_FACTOR
The Maximum Clamping Energy EARxy(sum) of parallel connected channels is defined as follows:
AR,xy(sum) = E_FACTOR * SUM[EAR,n] at Tj = 150°C and ID = IDnom
•
E
ON-Resistance
The typical ON-Resistance RDSon,xy(sum) of parallel connected channels is sum of the typical RDSon RDSon,n(typ)
defined as follows
•
RDSon,xy(sum) = 1/[1/RDSon,n(typ) + 1/RDSon,n+1(typ)]
Derating Factors1) 2) in case of Parallel Connection of Channels: related PM-Bit set
Channel Group
Parameter
2 CH parallel
3 CH parallel
4 CH parallel
7.4.1 CH 1-4
typical shut down
current before
reaching IDSD(typ),n
ID,OUTxy(sum)
I_FACTOR = 0.95
I_FACTOR =
0.90
I_FACTOR =
0.85
7.4.2
Maximum Clamping E_FACTOR = 0.8
E_FACTOR = 0.7 E_FACTOR = 0.6
Energy
EARxy(sum)
7.4.3
typical ON-
Resistance
RDSon,xy(sum)
RDSon,xy(sum)
RDSon,xy(sum)
RDSon,xy(sum)
7.4.4 CH 5-6
typical shut down
current before
reaching IDSD(typ),n
ID,OUTxy(sum)
I_FACTOR = 0.95
-
-
7.4.5
7.4.6
Maximum Clamping E_FACTOR = 0.8
-
-
-
-
Energy
EARxy(sum)
typical ON-
Resistance
RDSon,xy(sum)
RDSon,xy(sum)
Data Sheet
28
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
Derating Factors1) 2) in case of Parallel Connection of Channels: related PM-Bit set
Channel Group
7.4.7 CH 7-10
Parameter
2 CH parallel
I_FACTOR = 0.95
3 CH parallel
I_FACTOR =
0.90
4 CH parallel
I_FACTOR =
0.85
typical shut down
current before
reaching IDSD(typ),n
ID,OUTxy(sum)
7.4.8
7.4.9
Maximum Clamping E_FACTOR = 0.8
E_FACTOR 0.7 E_FACTOR 0.6
Energy
EARxy(sum)
typical ON-
Resistance
RDSon,xy(sum)
RDSon,xy(sum)
RDSon,xy(sum)
RDSon,xy(sum)
1) The performance during parallel connection of channels is specified by design and not subject to the
production test.
2) All channels at the same junction temperature level.
Derating Factors1)2) in case of Parallel Connection of Channels: related PM-Bit not set
Channel Group
7.4.10 CH 1-4
Parameter
2 CH parallel
I_FACTOR = 0.95 I_FACTOR =
3 CH parallel
4 CH parallel
I_FACTOR =
0.85
typical shut down
current before
reaching IDSD(typ),n
ID,OUTxy(sum)
0.90
7.4.11
MaximumClamping E_FACTOR = 0.5
E_FACTOR =
0.33
E_FACTOR =
0.25
Energy
EARxy(sum)
7.4.12
typical ON-
Resistance
RDSon,xy(sum)
RDSon,xy(sum)
RDSon,xy(sum)
RDSon,xy(sum)
7.4.13 CH 5-6
typical shut down
current before
reaching IDSD(typ),n
ID,OUTxy(sum)
I_FACTOR = 0.95
-
-
7.4.14
7.4.15
MaximumClamping E_FACTOR = 0.5
-
-
-
-
Energy
EARxy(sum)
typical ON-
Resistance
RDSon,xy(sum)
RDSon,xy(sum)
Data Sheet
29
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Power Outputs
Derating Factors1)2) in case of Parallel Connection of Channels: related PM-Bit not set
Channel Group
7.4.16 CH 7-10
Parameter
2 CH parallel
I_FACTOR = 0.95 I_FACTOR =
3 CH parallel
4 CH parallel
I_FACTOR =
0.85
typical shut down
current before
reaching IDSD(typ),n
ID,OUTxy(sum)
0.90
7.4.17
7.4.18
MaximumClamping E_FACTOR = 0.5
E_FACTOR =
0.33
E_FACTOR =
0.25
Energy
EARxy(sum)
typical ON-
Resistance
RDSon,xy(sum)
RDSon,xy(sum)
RDSon,xy(sum)
RDSon,xy(sum)
1) The performance during parallel connection of channels is specified by design and not subject to the
production test.
2) All channels at the same junction temperature level.
Data Sheet
30
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Diagnosis
8
Diagnosis
8.1
Description Diagnosis
The TLE8110EE provides diagnosis information about the device and about the load. Following diagnosis flags
have been implemented for each channel:
•
•
•
The diagnosis information of the protective functions, such as “over current” and“over temperature”
The open load diagnosis
The short to ground information.
Updating the Diagnosis is based on a filter-dependent standard delay time of typ. 150µs. This value is set as a
default.
Refer to Figure 16 for details.
Application Hint:
In specific application cases - such as driving Uni-Polar Stepper Motor - it might be possible, that reverse currents
flow for a short time, which possibly can disturb the diagnosis circuit at neighboring channels and cause wrong
diagnosis results of those channels. To reduce the possibility, that this effect appears in a certain timing range,
the filter time of Channels 7 to 10 can be extended to typ. 2.5ms or typ. 5ms by setting the “Diagnosis Blind Time”
- Bits (DBTx). If Channels 7 to 10 are used for driving loads causing reverse currents, they influence each other
and additionally might affect Channels 5 and 6 . It is recommended to use the channels 7 + 8 and 9 + 10 as pairs
for anti-parallel control signals, such as for the stepper motors. For logic setting details, see chapter “Control of
the Device”
VDD
IDSsg
MUX
00
01
10
Diagnosis
Register
OUTn
Latch
Latch
IDSpd
VDSsg
VDSol
Temp.
Sensor
gate control
n
n
protective functions
OR
Latch
GND
Diagnosis-serial.vsd
Figure 16 Block Diagram of Diagnosis
Data Sheet
31
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Diagnosis
8.2
Electrical Characteristics Diagnosis
Electrical Characteristics: OFF State Diagnosis
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Open Load Diagnosis
8.2.1
8.2.2
8.2.3
Open load detection threshold
voltage
VDSol
2.00
50
2.60
90
-
3.20
150
220
V
-
Output pull-down diagnosis current IDpd
µA
µs
VDS = 13.5 V
per channel (low level)
Open Load Diagnosis Delay Time td
100
DEVS.DBT1=0
DEVS.DBT2=1
or 0
(all channels)
8.2.4
a)
b)
Channel 7-10:
td
1.65
3.3
2.5
5
3.45
7.3
ms
ms
DEVS.DBT1=1
DEVS.DBT2=0
DEVS.DBT1=1
DEVS.DBT2=1
Open Load Diagnosis Delay Time
“Diagnosis Blind Time” see chapter
“Control of the device”
Figure 17, Figure 18
Short to GND Diagnosis
8.2.5
8.2.6
8.2.7
Short to ground detection threshold VDSsg
1.00
-150
100
1.50
-100
-
2.00
-50
V
-
voltage
Output diagnosis current for short IDsg
µA
µs
VDS = 0V
to ground per channel (low level)
Short to GND Diagnosis Delay
Time
td
220
DEVS.DBT1=0
DEVS.DBT2=1
or 0
8.2.8
a)
b)
Channel 7-10:
td
1.65
3.3
2.5
5
3.45
7.3
ms
ms
DEVS.DBT1=1
DEVS.DBT2=0
DEVS.DBT1=1
DEVS.DBT2=1
Short to GND Diagnosis Delay
Time. “Diagnosis Blind Time” see
chapter “Control of the device”,
Figure 17, Figure 18
Data Sheet
32
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Diagnosis
Diagnosis Blind Time[DBT] activation
DBT is triggered by Open Load [OL] or Short-to-Ground [SG] -detection during OFF-condition of CH7-10.
DBT is activated by DEVS.DBT1, DEVS.DBT2 (see „Control of the device“).
INx Signal
Channel 7 - 10
OFF
ON
OL, SG -Diagnosis active
Output
Voltage
Incident - e.g.
temporal „short to GND“
[SG]
Diagnosis Blind Time
[DBT]
triggered by
Diagnosis Blind Time
Diagnostic Register Entry,
because Failure present
after ending DBT
Diagnostic Incident
[DBT]
active
DBT
terr<
tDBT
terr<
tDBT
terr >
tDBT
„Blind“ window finishes as
soon as the error
Diagnosis Register:
11: No Error
disappears within the DBT
10: Over Load
01: Open Load
00: Short to Ground
1 1
1
1
1 1
0 0
DBT.vsd
Figure 17 Diagnosis Blind Time
Channel
OFF
YES
OL, SG-
Error
present?
YES
OL, SG-
Error
detected
DBT
Counter
SET 0 = tDBT
Decrement
DBT Counter
OL, SG-
Error
Reset Counter
(finish DBT-
frame)
No
present?
Yes
No
Counter
t > tDBT
Yes
Failure detected
=> Register Entry
DBT_Flow.vsd
Figure 18 Diagnosis Blind Time - Logic Flow
Data Sheet
33
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Parallel Inputs
9
Parallel Inputs
9.1
Description Parallel Inputs
There are 10 input pins available are on TLE8110EE to control the output stages.
Each input signal controls the output stages of its assigned channel. For example, IN1 controls OUT1, IN2 controls
OUT2, etc.
A “Low”-Signal at INx switches the related Output Channel off. The zener diode protects the input circuit against
ESD pulses.
For details about the Boolean operation, refer to the chapter “Control of the device”, for details about timing refer
to Figure 11.
9.2
Electrical Characteristics Parallel Inputs
Electrical Characteristics: Diagnostics
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Parallel Inputs
9.2.1
9.2.2
9.2.3
Low Level of parallel Input pin
VINxl
-0.3
-
VCC
0.2
VCC
*
V
-
High Level of Parallel Input pin
VINxh
VINxhy
VCC
*
-
V
-
0.4
1)
Parallel Input Pin Switching
Hysteresis
15
60
300
mV
9.2.4 a) Input Pin pull-down Current
.........b)
1) Parameter not subject to production test. Specified by design.
IINxh
IINxl
20
2.4
40
-
85
-
µA
µA
VINx=5V
VINx=0.6V1)
Data Sheet
34
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Protection Functions
10
Protection Functions
The device provides embedded protective functions. Integrated protection functions are designed to prevent IC
destruction under fault conditions described in this Document. Fault conditions are considered “outside” the
normal operating range. Protection functions are not designed for continuous repetitive operation.
There is an over load and over temperature protection implemented in the TLE8110EE.
If a protection function becomes active during the write cycle of Diagnosis Information into the Diagnosis Register,
the information is latched and stored into the diagnosis register after the write process.
In order to achieve a maximum protection, the affected channel with over current or over temperature is switched
off. The device can be configured via serial communication interface in three ways in order to react on this fault
condition:
•
after switching off, turning on again after a delay time: In case of over temperature, when the temperature has
decreased below the temperature shut down threshold. In case of over-current, the affected channel is turning
on after a delay time until the over temperature protection is activated.
after switching off, turning on again the affected channel with the next parallel or serial control command.
Default Setting: after switching off latching the condition and remain off until the Diagnosis Register is cleared
via serial control. In this case, the internal Diagnosis Bits for Over Temperature and Over Current are cleared
with the rising edge of S_CS
•
•
For the failure condition of Reverse Currents, the device contains a “Reverse Current Protection Comparator”
[RCP]. This RCP can optionally be activated by setting the DEVS.RCP Bit.
In case the comparator is activated, it detects a reverse current and switches ON the related output channel. The
channel is kept ON up to a reverse current channel dependent threshold IRCP_off. This threshold is defined by
regulators target value to keep the output voltage at >/~-0.3V. If the current exceeds a defined value, the
comparator switches OFF and other protection functions are protecting the circuit against reverse current. That
means that at higher currents / or in case RCP is de-activated / not activated, the reverse current is flowing through
the body diode of the DMOS. In that case, the voltage drops to typically -0.6V according the voltage of the body
diode. In case the comparator threshold has been exceeded and the RCP has been switched OFF, the functions
remains OFF until the reverse current arrives back to zero reverse current. Only then, the comparator can be
activated again after a delay time tRCP_on_delay
.
This function reduces the un-wanted influence of a reverse current to the analogue part of the circuit (such as the
diagnosis). For more details about the functionality, see Figure 21 and Figure 22 and concerning the settings and
the related registers, refer to Chapter “Control of the Device”.
Figure 19 gives an overview about the protective functions.
RCP
Ref.
-300mV
Logic
Ctrl.
temperature
sensor
OUTx
T
gate
control
Serial
control
short circuit
detection
Block_diag_Protection.vsd
Figure 19 Block Diagram Protection Functions
Data Sheet
35
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Protection Functions
10.1
Electrical Characteristics Overload Protection Function
Electrical Characteristics: Overload Protection Function
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Over Current Protection
10.1.1 Output Current Shut-down
IDSD(low) 2.6
IDSD(low) 3.70
IDSD(low) 1.7
3.8
5
A
A
A
A
-
-
Threshold Low (Channel 1 to 4)
10.1.2 Output Current Shut-down
Threshold Low (Channel 5 to 6)
10.1.3 Output Current Shut-down
Threshold Low (Channel 7 to 10)
10.1.4 Output Current Shut-down
Threshold High (Channel 1 to 4)
4.85
2.3
6.00
2.9
-
-
1)
IDSD(high)
IDSD(high)
IDSD(high)
tOFFcl_h
-
1.5 *
IDSD
(low)
1)
1)
10.1.5 Output Current Shut-down
Threshold High (Channel 5 to 6)
-
1.5 *
IDSD
-
A
(low)
10.1.6 Output Current Shut-down
Threshold High (Channel 7 to 10)
-
1.5 *
IDSD
-
A
(low)
10.1.7 Short Overload shutdown Delay
Time (all Channels)
5
21
40
70
200
µs
µs
µs
valid for “Output
Current Threshold
High” 1)
10.1.8 Long Overload shutdown Delay
Time (all Channels)
tOFFcl_l
10
70
40
-
valid for “Output
Current Threshold
Low”
10.1.9 Automatic Restart Delay Time2) in taONd
1)
case of over current
Over Temperature Protection
10.1.10 Thermal Shut Down Temperature TjSD
1)
1)
1)
175
10
70
190
-
-
205
20
200
°C
K
µs
10.1.11 Thermal Shut Down Hysteresis
TjSDh
10.1.12 Automatic Restart Delay Time2) in taONd
case of over temperature
Data Sheet
36
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Protection Functions
Electrical Characteristics: Overload Protection Function (cont’d)
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Reverse Current Protection
10.1.13 Reverse Current Comparator
IRCP_off
IRCP_off
IRCP_off
-
-
-
-
-0.9
-0.6
-0.45
24
-
-
-
-
A
DEVS.RCP = 11)
Tj = 25°C
Switch-off Current level CH 1 - 4
10.1.14 Reverse Current Comparator
Switch-off Current level CH 5 - 6
10.1.15 Reverse Current Comparator
Switch-off Current level CH 7 - 10
A
DEVS.RCP = 11)
Tj = 25°C
A
DEVS.RCP = 11)
Tj = 25°C
10.1.16 Reverse Current Comparator
tRCP_on_
delay
µs
DEVS.RCP = 11)
Tj = 25°C
switch on delay time
1) Parameter not subject to production test. Specified by design.
2) Only active when LOTCx[1:0] = 10 and as long as no overload or overtemperature condition present. In case
the channel is switched off the delay time is cleared. The application must avoid to exceed the IDSD- and
maximum ratings specification. Otherwise a damage or reduction of the lifetime can be expected.
Data Sheet
37
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Protection Functions
No Reaction on
ON/OFF because
LOCT[1:0] = 00
Channel
ON/OFF
t
ID
IDSD
t
t
t
t
TJ
TjSD
CLn
tOFFd
tOFFd_l
tOFFd_l
taONd
x_CS
LOCT changed to
:
ON Command to Ch given
Diagnosis
Register
Clear
LOTC[1:0] = 01 re-
start after Ch -ON
command
and LOCT changed to :
LOTC [1:0] = 10
auto re -start
LOCT[1:0] = 00 = start
after clear Diagnosis Reg .
No Reaction on
ON/OFF because
LOCT[1:0] = 00
Channel
ON/OFF
t
t
t
t
t
ID
IDSD
TJ
TjSD
TjSDh
td
OTn
x_CS
ON Command to Ch given
LOCT changed to
:
Diagnosis
Register
Clear
and LOCT changed to
:
LOTC[1:0] = 01 re-
start after Ch -ON
command
LOTC [1:0] = 10
auto re -start
LOCT[1:0] = 00 = start
after clear Diagnosis Reg .
Timing_Protection .vsd
Figure 20 Timing (CLn: Over Current Latch; OT: Over Temperature Flag; x_CS: Chip-Select)
Data Sheet 38 Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Protection Functions
ID
Leakage
(neighbour
channel)
RCP not active
RCP active
Reverse
Current
Comparator
Switch-off
Current level
Reverse Current
IRCP_off
ID
0
t
Reverse Current
Comparator
Switch-off
Current level
IRCP_off
Maximum
Rating
-
IDSD(low)
VD
VBatt
0
t
~ - 300mV
tRCP_on_delay
RCP active:
RCP not active:
ID through Body
Diode of DMOS
Regulation to
VD ~ - 300mV;
-ID through DMOS
RCP.vsd
Figure 21 Reverse Current Protection Comparator
Data Sheet
39
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Protection Functions
-40
-0.1
-20
0
20
40
60
80
100
120
140
Tj / °C
CH7-10
CH5-6
-0.3
-0.5
-0.7
-0.9
-1.1
-1.3
-1.5
CH1-4
IRCP_OFF_TC.vsd
IRCP_off /A
Figure 22 Reverse Current Protection Comparator (typical behaviour vs junction temperature)
Data Sheet
40
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
16 bit SPI Interface
11
16 bit SPI Interface
11.1
Description 16 bit SPI Interface
The diagnosis and control interface is based on a serial peripheral interface (SPI).
The SPI is a full duplex synchronous serial slave interface, which uses four lines: S_SO, S_SI, S_CLK and S_CS.
Data is transferred by the lines S_SI and S_SO at the data rate given by S_CLK. The falling edge of S_CS
indicates the beginning of a data access. Data is sampled in on line S_SI at the falling edge of S_CLK and shifted
out on line SO at the rising edge of SCLK. Each access must be terminated by a rising edge of S_CS. A modulo
8 counter ensures that data is taken only, when a multiple of 8 bit has been transferred. If in one transfer cycle not
a multiple of 8 bits have been counted, the data frame is ignored. The interface provides daisy chain capability.
MSB 14
MSB 14
13
13
12
12
11
11
10
10
9
9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
LSB
LSB
S_SO
S_SI
S_CS
S_CLK
time
SPI.vsd
Figure 23 16 bit SPI Interface
The SPI protocol is described in Chapter “Control of the device”. Concerning Reset of the SPI, please refer to the
chapter “Reset”
11.2
Timing Diagrams
t CS lead
t CSlag
t CStd
t
SCLKp
0.7V
dd
S_CS
S_CLK
S_SI
0.2V
dd
t
t
SCLKh
SCLKl
0.7V
dd
0.2V
dd
t
t SIh
SIsu
0.7V
dd
0.2V
dd
t
t SOv
t SOdis
SO(en)
0.7V
dd
S_SO
0.2V
dd
Figure 24 Data Transfer in Daisy Chain Configuration
Data Sheet
41
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
16 bit SPI Interface
11.3
Electrical Characteristics 16 bit SPI Interface
Electrical Characteristics: Diagnostics
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Input Characteristics (CS, SCLK, SI)
11.3.1
11.3.2
L level of pin
H level of pin
V
-
-0.3
-
VCC
0.2
*
S_CS
S_CLK
S_SI
VS_CSl
VS_CLKl
VS_SIl
V
-
VCC
*
-
VCC
300
S_CS
S_CLK
S_SI
VS_CSh
VS_CLKh
VS_SIh
0.4
VS_CShy
VS_CLKhy
VS_SIhy
11.3.3 Hysteresis Input Pins
20
100
mV
-
IS_CLKh
11.3.4 Input Pin pull-down Current
a)
b)
20
2.4
-4
40
-
85
-
µA
µA
µA
µA
VIN=5V
IS_SIh
VIN=0.6V1)
S_CLK
S_SI
IS_CLKl
IS_SIl
IS_CSh
V
S_CS = 2 V,
VCC=3.3V
S_CS = 0 V,
VCC=5V
11.3.5 Input Pin pull-up Current
a)
b)
-
-
IS_CSl
V
S_CS
-20
-40
-85
Output Characteristics (SO)
11.3.6
11.3.7
L level output voltage
H level output voltage
VS_SOl
VS_SOh
0
-
-
0.4
Vcc
V
I
I
S_SO = -2 mA
S_SO = 1.5 mA
Vcc
-
0.4 V
-10
11.3.8
Timings
11.3.9
Output tristate leakage current
IS_SOoff
-
10
µA
VS_SO = Vcc
Serial clock frequency
fS_CLK
0
200
50
50
250
-
-
-
-
-
5
-
-
-
-
MHz
ns
ns
ns
ns
-CL = 50 pF 1)
1)
11.3.10 Serial clock period
11.3.11 Serial clock high time
11.3.12 Serial clock low time
11.3.13 Enable lead time (falling CS to rising
SCLK)
tS_CLK(P)
tSCLK(H)
tSCLK(L)
tCS(lead)
1)
1)
1)
1)
1)
1)
11.3.14 Enable lag time (falling SCLK to rising tCS(lag)
250
250
20
-
-
-
-
-
-
ns
ns
ns
CS)
11.3.15 Transfer delay time (rising CS to falling tCS(td)
CS)
11.3.16 Data setup time (required time SI to
falling SCLK)
tSI(su)
1)
11.3.17 Data hold time (falling SCLK to SI)
11.3.18 Output enable time (falling CS to SO
valid)
tSI(h)
tSO(en)
20
-
-
-
-
ns
ns
200
CL = 50 pF 1)
Data Sheet
42
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
16 bit SPI Interface
Electrical Characteristics: Diagnostics (cont’d)
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
200
11.3.19 Output disable time (rising CS to SO tri- tSO(dis)
-
-
ns
ns
CL = 50 pF 1)
CL = 50 pF 1)
state)
11.3.20 Output data valid time with capacitive tSO(v)
-
-
100
load
1) Not subject to production test, specified by design.
Data Sheet
43
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
12
Control of the device
This chapter describes the SPI-Interface signals, the protocol, registers and commands. Reading this chapter
allows the Software Engineer to control the device. The chapter contains also some information about
communication safety features of the protocol.
12.1
Internal Clock
The device contains an internal clock oscillator.
Electrical Characteristics: Diagnostics
3V < VCC < 5.5V; 4.5V < VDD < 5.5V; Vbatt = 13.5V, Tj = -40 °C to +150 °C, all voltages with respect to ground,
positive current flowing into pin
(unless otherwise specified)
Pos.
Parameter
Symbol
Limit Values
Unit
Conditions
Min.
Typ.
Max.
Parallel Inputs
12.1.1 internal clock oscillator frequency fint_osc
1)
-
500
-
kHz
1) Parameter not subject to production test. Specified by design.
12.2
SPI Interface. Signals and Protocol
12.2.1
Description 16 bit SPI Interface Signals
S_CS - Chip Select:
The system micro controller selects the TLE8110EE by means of the S_CS pin. Whenever the pin is in low state,
data transfer can take place. When S_CS is in high state, any signals at the S_CLK and S_SI pins are ignored
and S_SO is forced into a high impedance state.
S_CS High to Low transition:
•
•
The information to be transferred loaded into the shift register (16-bit Protocol).
S_SO changes from high impedance state to high or low state depending on the logic OR combination
between the transmission or error flag [TOR] (see Chapter 12.2.4.3) and the signal level at pin S_SI. As a
result, even in daisy chain configuration, a high signal indicates a faulty transmission or an existing error on
one of the Output Channels. The transmission error flag is set after RST, so a reset between two SPI
commands is indicated.
S_CS Low to High transition:
•
Command decoding is only done, when after the falling edge of CS exactly a multiple (1, 2, 3, …) of eight
S_CLK signals have been detected. (See Modulo-8 Counter: Chapter 12.2.4.2)
Data Sheet
44
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
S_CLK - Serial Clock:
This input pin clocks the internal shift register. The serial input (S_SI) transfers data is shifted into the register on
the falling edge of S_CLK while the serial output (S_SO) shifts the information out on the rising edge of the serial
clock. It is essential that the S_CLK pin is in low state whenever chip select CS makes any transition.
S_SI - Serial Input:
Serial input data bits are shifted in at this pin, the most significant bit first. The bit at the S_SI Pin is read on the
falling edge of S_CLK.
S_SO Serial Output:
Data is shifted out serially at this pin, the most significant bit first. S_SO is in high impedance state until the S_CS
pin goes to low state.The next bits will appear at the S_SO pin following the rising edge of S_CLK.
12.2.2
Daisy Chain Capability
The SPI-Interface of TLE8110EE provides daisy chain capability. In this configuration several devices are
activated by the same S_CS signal. The S_SI line of one device is connected with the S_SO line of another device
(see Figure 25), which builds a chain. The ends of the chain are connected with the output and input of the master
device, S_SO and S_SI respectively. The master device provides the master clock CLK, which is connected to the
S_CLK line of each device in the chain. By each clock edge on S_CLK, one bit is shifted into the S_SI. The bit
shifted out can be seen at SO. After 16 S_CLK cycles, the data transfer for one device has been finished. In single
chip configuration, the S_CS line must go high to make the device accept the transferred data. In daisy chain
configuration the data shifted out at device 1 has been shifted in to device 2. Example: When using three devices
in daisy chain, three times 16 bits have to be shifted through the devices. After that, the S_CS line must go high
(see Figure 25).
SO device 3
SI device 3
SO device 2
SI device 2
SO device 1
SI device 1
SI
SO
CS
CLK
time
SPI_DasyChain2.emf
Figure 25 Principle example for Data Transfer in Daisy Chain Configuration
Note:Due to the integrated modulo 8 counter, 8 bit and 16 bit devices can be used in one daisy chain.
12.2.3
SPI Protocol
The device contains two protocol styles which are applied dependent of the used commands. There is the
standard 16-bit protocol and the 2x8-bit protocol. Both protocols can appear also be mixed.
12.2.3.1 16-bit protocol
Each Cycle where a serial data or command frame is sent to the S_SI of the SPI interface, a data frame is returned
at the same time by the S_SO The content of the S_SO frame is dependent on the previous command which has
been sent to S_SI. Read Command (R/W = R) returns one cycle later the content of the addresses register. (see
Figure 26 ).
Data Sheet
45
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
S_CS
S_SI
R
ADR / DATA
W
ADR / DATA
Register
R
ADR / DATA
S_SO
dept. of
TOR
TOR
TOR
Short Diagnosis*
previous R/W
SPI_Protocol_Normal_Mode.vsd
* dependent on ADR; In case CMD or DCC is addressed, related content.
Figure 26 16-bit protocol
S_SI
Serial Input
Reset Value: N.A.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
W/R
ADDR
DATA / CMD
Field
W/R
Bits
15
Description
W/R - Write / Read
0
Write register: The register content of the addressed register will be updated after
CS low → high transition. After sending a WRITE command, the device returns
data according the addressed register
Read register: The register content of the addressed register will be sent in the
next frame.
1
ADDR
14:12
11:0
ADDR - Address
Pointer to register for read and write command
DATA/CMD
DATA_CMD - Data / Command
Data written to or read from register selected by address ADDR
S_SO
Serial Output
1)
Reset Value: xxxx xxxx xxxx xxxxB
CS
15
14
13
ADDR
12
11
10
9
8
7
6
5
4
3
2
1
0
TOR PAR
DATA
1) after reset is send a Short Diagnosis and Device Status CMD_CSDS, see Chapter 12.3.1.2.
Field
TOR
Bits
CS
Description
Transmission or Output Error (see Chapter 12.2.4.2)
0
1
Previous transmission was successful, no error, no reset.
Previous transmission failed, Error on one of the Output Channels, under voltage
reset* or first transmission after reset.
* OR operated diagnosis information of all Output Channels. (To read out details
perform CMD_RSDS, see Chapter 12.3.1.2)
Data Sheet
46
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
Field
PAR
Bits
15
Description
PAR - Parity Bit
1: odd number of '1' in data and address field
0: even number of '1' in data and address field
ADDR
DATA
14:12
11:0
Address
Address which has bin addressed
Data
Content of Address or feedback Data
Note: Reading a register needs two SPI frames. In the first frame the RD command is sent. In the second frame the output at
SPI signal SO will contain the requested information. A new command can be executed in the second frame.
12.2.3.2 2x8-bit protocol
Each Cycle where a serial data or command frame is sent to the S_SI of the SPI interface, a data frame is returned
at the same time by the S_SO. The content of the S_SO frame is dependent of the previous command which has
been sent to S_SI and the content of the actual content of S_SI: The first Upper Byte send to S_SI controls the
content of the Lower Byte actual returned by S_SO. The Lower Byte send to S_SI controls the Lower Byte in S_SO
of the next frame. (see Figure 27 ).
Upper
Byte
Lower
Byte
Upper
Byte
Lower
Byte
Upper
Byte
Lower
Byte
Upper
Byte
Upper
Byte
Lower
Byte
Upper
Byte
Lower
Byte
DO
TOR
TOR
TOR
SPI_Protocol_2x8bit.vsd
Figure 27 2x8-bit protocol
Data Sheet
47
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
S_SI
Serial Input
Reset Value: N.A.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Upper Byte
Lower Byte
Field
Upper Byte
Bits
15:8
Description
Upper Byte
contains the command, which is performed after sending 8 bit to S_SI. The action out of
this command is affecting the Lower Byte of S_SO of the actual communication
frame.
Lower Byte
7:0
Lower Byte
contains the command and data, which is performed at the end of the actual
communication frame. The action out of this command is affection the Upper Byte
of S_SO of next communication frame.
S_SO
Serial Output
1)
Reset Value: xxxx xxxx xxxx xxxxB
CS
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TOR
Upper Byte
Lower Byte
1) after reset is send a Short Diagnosis and Device Status CMD_CSDS, see Chapter 12.3.1.2.
Field
TOR
Bits
CS
Description
Transmission or Output Error (see Chapter 12.2.4.2)
0
1
Previous transmission was successful, no error, no reset.
Previous transmission failed, Error on one of the Output Channels, under voltage
reset* or first transmission after reset.
* OR operated diagnosis information of all Output Channels. (To read out details
perform CMD_SDS, see Chapter 12.3.1)
Upper Byte
Lower Byte
15:8
7:0
Upper Byte
contains the data according the command and data in the Lower Byte of the previous
communication Frame.
Lower Byte
contains the data according the command in the Upper Byte of the actual communication
frame
Note: Reading a register needs two SPI frames. In the first frame the RD command is sent. In the second frame the output at
SPI signal SO will contain the requested information. A new command can be executed in the second frame.
12.2.3.3 16- and 2x8-bit protocol mixed.
The 16-bit and 2x8-bit protocols are mixed according the used commands (see Chapter 12.3.1). Specially care
should be taken, changing from the 16-bit protocol to the 2x8-bit protocol. In this case, it is important to send a
NOP command to S_SI. Otherwise, by sending instead a Command, a collision between the S_SO data in the
following frame and the Lower Byte of the 2x8-bit protocol will happen (see Chapter 12.2.3.2).
Data Sheet
48
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
Protocol Change from 2x8-bit to 16-bit
S_CS
S_SI
Upper
Byte
Lower
Byte
CMD
CMD
S_SO
Upper
Byte
Lower
Byte
Upper
0
Data
TOR
TOR
TOR
TOR
TOR
Byte
Protocol Change from 16-bit to 2x8-bit
S_CS
S_SI
Upper
Byte
Lower
Byte
Upper
Lower
Byte
NOP
Byte
S_SO
Lower
Byte
Upper
Byte
Lower
Byte
Data
TOR
0
TOR
Critical Protocol Change from 16-bit to 2x8-bit
S_CS
2x8-bit protocol is
dominant
S_SI
Upper
Byte
Lower
Byte
Upper
Byte
Lower
Byte
CMD
S_SO
Lower
Byte
Upper
Byte
Lower
Byte
Data
Data...
TOR
TOR
collission
SPI_Protocol_16_2x8bit_mixed.vsd
Figure 28 16-bit protocol
12.2.4
safeCOMMUNICATION
The devise contains some safety features, which are improving the protecting of the application against mal-
function in case of disturbance of the communication between the Micro Controller and the Device:
12.2.4.1 Encoding of the commands
The Commands are encoded. In case other bit-patterns, then the defined once are received, the commands are
ignored and the communication error is indicated in the TOR-Bit (see Chapter 12.2.4.3) and can be read out in
detail with the command CMD_RSDS (seeChapter 12.3.1.2).
12.2.4.2 Modulo-8 Counter
The modulo is the integral remainder in integral division. In data communications, a modulo based approach is
used to ensure that user information in SPI protocols is in the correct order. The device has a receiver-side
counter, and a defined counter size. The modulo counter specifies the number of subsequent numbers available.
In case of TLE8110EE Modulo 8 counter specifies 8 serial numbers. The modulo 8 counter ensures that data is
taken only, when a multiple of 8 bit has been transferred. If in one transfer cycle not a multiple of 8 bits have been
counted, the data frame is ignored and a Communication Error is indicated in the TOR-Bit (see Chapter 12.2.4.3)
and in the CMD_RSDS - Feedback (seeChapter 12.3.1.2).
Data Sheet
49
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
12.2.4.3 TOR - Transmission or Diagnosis Error Bit
As described in Chapter 12.2.3.1 and Chapter 12.2.3.2 the Transmission or Diagnosis Error bit [TOR] appears
on S_SO, as soon as CS makes a High-to-LOW transition until the first rising edge of the clock signal. The TOR
contains ONLY error information which has appeared in and since last frame. TOR does not contain any latched
information.
•
•
Command Ignored and Modulo 8: In the next frame after the error, the TOR bit will be set once.
Under voltage: After digital- or analogue under voltage, the TOR of the first transmission contains the error
information. In the following transmissions, the information is not shown anymore. But the under voltage
information is latched in the CMD_CSDS bit until it is cleared (see Chapter 12.3.1).
OR operated Diagnosis or protection error information: If one of those errors has appeared since the last frame,
the information change is shown in the TOR bit. (The error is latched in the related Diagnosis and Error register
and remains there until it is cleared). But the TOR bit will show the information-change only once. In the next
frame, the TOR bit is cleared again
•
The information about the data transmission, TOR contains, is always from the previous transmission. The
Diagnosis information, the Bit contains is the status of the diagnosis until the CS high-to-low transition. Changes
in the diagnosis during the transmission are latched and stored until the next read-out cycle. By read-out of the
TOR-bit, no stored information is cleared. The Error information can be read out in detail, by sending the command
CMD_SDS and can be cleared (NOT Diagnosis Error) by the command CMD_CSDS (see Chapter 12.3.1)
In order to reduce the Micro Controller work load, it is possible to read out the TOR bit also without constructively
data transfer. That means, by just toggling CS, the status can be read out.
To allow using the TOR Bit also in SPI-Daisy-Chain configuration, the TOR-Bit is OR operated with S_SI which
contains the TOR information of the previous device in the Daisy-Chain.
12.3
Register and Command - Overview
This Chapter describes the Registers and Commands. The commands allow to carry through some actions, such
as reading out or clearing the diagnosis or reading out the Input Pins.
Specially highlighted here should be the encoded CMD_DMSx/OPSx commands - compactCONTROL -, a highly
efficient command-set to set a part of the output pins and read out the diagnosis at the same time. Included in this
command set is the possibility to check, if the communication works well as also the possibility to read-out some
of the parallel Input Pins INx. Using this compact command set can reduce the workload of the micro-controller
during run-time significantly.
CMD_RSD is preformed and short diagnostics [SD] is returned after each Write Cycle to any of the writable
registers.
After start-up of the device, the registers are loaded with the default settings as described below in the register
descriptions. The Registers are cleared and set back to the default values, when a low signal is applied to the pin
RST or an under-voltage condition appears at the supply pin VCC what causes an under-voltage reset. If a low
signal at pin EN is applied or an under-voltage condition appears at pin VDD, the Registers are not cleared.
Data Sheet
50
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
Table 1
Name Type Addr
Short Description
Commands
Diagnosis Registers and Compact Control
Output Control Register CHx.
Device Settings
see:
W1) 000B
CMD
Chapter 12.3.1
Chapter 12.3.2
Chapter 12.3.3
Chapter 12.3.6
W1) 001B
DCC
OUTx
W/R 010B
DEVS
W/R 011B
MSCS
W/R 100B
reserved
ISAx
Chapter 12.3.4
Chapter 12.3.4
Chapter 12.3.5
W/R 101B
W/R 110B
W/R 111B
Input or Serial Mode Register CHx Bank A
Input or Serial Mode Register CHx Bank B
Parallel Mode Control of CHx with CHy
ISBx
PMx
1) if a read command is send, the command is ignored and S_SO returns a frame with ’0’.
Table 2
Register Overview
Name
Addr
11
0
10
1
9
1
8
1
7
6
5
4
3
2
1
0
def.1)
W2)
W2)
000B
CMD
Command
---
DCC
Command
001B
---
OUTx
1
1
OUT OUT9 OUT8 OUT7 OUT6 OUT5 OUT4 OUT3 OUT2 OUT1
10
W/R 010B
W/R 011B
C00h
007h
DEVS
RCP DBT2 DBT1 LOTC LOTC LOTC LOTC
70 [1] 70 [0] 16 [1] 16 [0]
0
0
DCC DCC9 DCC
10 18
MSCS
ISAx
ISBx
PMx
reserved
W/R 100B
W/R 101B
W/R 110B
W/R 111B
000h
AAAh
0AAh
000h
IS6
IS5
IS4
IS3
IS9
IS2
IS8
IS1
IS7
0
0
0
0
0
IS10
0
0
0
PM91 PM89 PM78 PM56
0
0
PM34 PM23 PM12
1) Default Values after Reset
2) if a read command is send, the command is ignored and S_SO returns a frame with ’0’.
Data Sheet
51
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
IS1[1:0]:
AND IN/Serial-Mod0 = 11
IN-Mode = 10
Serial-Mode OUT1=1 = 01
Serial-Mode OUT1=0 = 00
DC18[0]:
Diagn. current off = 0
Diagn. Current on = 1
IS1[1:0]
OUT1
OUT2
11
IN1
IN2
IN3
IN4
10
0x
OUT1
OUT2
IS2[1:0]
11
PM12=1
10
0x
PM12=0
OUT3
PM23=1
PM23=0
OUT6
OUT7
CH5
PM56=1
PM56=0
OUT8
PM78=1
PM78=0
IS10[1:0]
OUT10
CH9
11
PM910=1
PM910=0
IN10
10
0x
OUT
10
Logic_Output_Control_CORE10.vsd
Figure 29 Logic Output Control Block Diagram TLE8110EE
Data Sheet
52
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
12.3.1
CMD - Commands
By using the Address Range CMD[14:12]=’000’ commands can be send to the device. The Feedback of the
commands is provided in the next SPI SO Frame.Details about the Feedback on each command is described in
the Chapter 12.3.1.1ff.
It is possible to perform per each Communication Frame ONE Command out of Group-A (see following description
of the Commands) and ONE Command out of Group-B at the same time. Performing more then one Command of
one Group is not possible. For the case, this happens, the commands are ignored.
CMD
Command Register
Reset Value: N.A.
Overview Commands
S_SI
SPI_Serial Input
CMD
11
10
9
8
7
6
5
4
3
2
1
0
RSD
RSDS
RPC
RINx
CSDS
NOP
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
1
0
0
0
0
0
Field
Command Bits Group-B (Bits [7:4])
All other bit combinations are not valid. Command will be ignored then.
Command Type
Description
NOP
0000
W
NOP - no operation.
A frame with ’0000h’ will be returned
CMD_CSDS 0001
W
CMD_CSDS - Command: Clear Short Diagnosis and Device
Status
Clear the Device Status information.
Performing this Clear Command clears the Information in the Reset
and Communication Error Information as long as the incident is not
present anymore. If the incident is still present, the related Bits remain
setted. Performing this command does NOT clear the Diagnosis
Registers. The Diagnosis Information is cleared by the Clear
Diagnosis Commands. (see Chapter 12.3.2)
SO returns a Frame with ’0000h’ after performing CMD_CSDS or in case
this command is carried out together with a command out of
Group-A, the feedback is according the Group-A command
Command Bits Group-A (Bits [3:0])
All other bit combinations are not valid. Command will be ignored then.
Data Sheet
53
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
Field
Command Type
Description
CMD_NOP
0000
W
NOP - no operation.
A frame with ’0000h’ will be returned
CMD_RINx
CMD_RPC
1000
0100
W
W
W
CMD_RINx - Command: Return Input Pin INx -Status
(Chapter 12.3.1.4)
CMD_RPC - Command: Return Pattern Check
(Chapter 12.3.1.3)
CMD_RSDS 0010
CMD_RSDS - Command: Return Short Diagnosis and Device
Status
(Chapter 12.3.1.2)
CMD_RSD
0001
W
CMD_RSD - Command: Return Short Diagnosis
(Chapter 12.3.1.1)
12.3.1.1 CMD_RSD - Command: Return Short Diagnosis
The Command CMD_RSD offers the possibility to read out the OR-operated “short”-Diagnosis within one SO
Feedback Frame. The data to be send is latched at the end of the command frame .
CMD_RSD
W
xxxx
xxxx
CMD_RSD
R/W
R/W
dept. of
previous R/W
TOR
TOR
SD
TOR
xxxx
SPI_Protocol_CMD_RSD.vsd
Figure 30 SPI Feedback on CMD_RSD
S_SO
SPI_Serial Output
CS
15
14
13
0
12
0
11
0
10
0
9
8
7
6
5
4
3
2
1
0
TOR PAR
0
SD10 SD9 SD8 SD7 SD6 SD5 SD4 SD3 SD2 SD1
Data Sheet
54
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
Field
-
Bits
-
Type
-
Description
SD1-10 Short Diagnosis
0
1
Normal Operation
Each SD-Bit contains the NAND-operated Diagnosis Error of each
related Channel. Details can be read in diagnosis registers
SD is returned after each Write Cycle to any of the writable registers.
12.3.1.2 CMD_RSDS - Command: Return Short Diagnosis and Device Status
The Command CMD_RSD offers the possibility to read out the OR-operated “short”-Diagnosis and the device
Status - such as Reset-Information and Communication Error - within one SO Feedback Frame. The data to be
send is latched at the end of the command frame .
CMD_RSDS
S_CS
S_SI
W
xxxx
xxxx
CMD_RSDS
R/W
R/W
S_SO
dept. of
previous R/W
TOR
TOR
SDS
TOR
xxxx
SPI_Protocol_CMD_RSDS.vsd
Figure 31 SPI Feedback on CMD_RSDS
Data Sheet
55
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
S_SO
SPI_Serial Output
CS
15
14
13
0
12
0
11
0
10
0
9
0
8
0
7
6
5
4
3
2
1
0
TOR PAR
0
SDS8 SDS7 SDS6 SDS5 SDS4 SDS3 SDS2 SDS1
Field
-
-
Bits
7:0
0
Type
-
-
Description
SDS - Short Diagnosis and Device Status
SDS1 - Diagnosis Error in Channel 1 to 6
0
1
normal operation
diagnosis failure
-
1
-
SDS2 - Diagnosis Error in Channel 7 to 10
0
1
normal operation
diagnosis failure
-
-
-
2
3
4
-
-
-
SDS3 - Under Voltage on VCC (Digital Supply Voltage)
see Figure 32
SDS4 - Under Voltage on VDD (Analogue Supply Voltage)
see Figure 32
SDS5 - Modulo Counter Error
0
1
normal operation
Previous Modulo Counter Error
-
5
-
SDS6 - Previous Communication Error - Encoded Command Ignored
0
1
normal operation
Previous Communication Error - Encoded Command Ignored
-
-
6
7
-
-
SDS7 - not used = ’0’
always ’0’
SDS8 - not used = ’0’
always ’0’
Data Sheet
56
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
Behaviour of SDS 3 and SDS4 in relation to RST , EN, VDD, VCC and CMD .CSDS
SDS3
VCC
or...
RST
SDS3 0
VCC
1
0
SDS4
EN=1
CMD.CSDS
or...
RST
SDS4 0
VDD
1
1
0
0
CMD.CSDS
CMD.CSDS
SDS4 0
VCC
1
SDS4
EN=0
or...
RST
SDS4 0
VDD
0
0
0
0
CMD.CSDS
CMD.CSDS
SDS4 0
0
SDS4
EN=0Æ1
EN
SDS4
0
1*
CMD.CSDS
0
* During EN = 0, the device internal VDD supply is disabled in order to fulfill low
quiescent current requirements. After the transition from EN=0 to 1, the SDS4
will detect under voltage (it is set SDS4=1) until the clear command CMD.CSDS
it sent (SDS4=0).
SDS3_4_behaviour.vsd
Figure 32 Behaviour of SDS3, 4
Data Sheet
57
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
12.3.1.3 CMD_RPC - Command: Return Pattern Check
The Command CMD_RPC offers the possibility to get returned the previous Command to check if the
communication works well. The data to be send is latched at the end of the command frame .
CMD_RPC
W
xxxx
xxxx
CMD_RPC
R/W
R/W
dept. of
previous R/W
TOR
TOR
CMD_RPC
TOR
xxxx
SPI_Protocol_CMD_RPC.vsd
Figure 33 SPI Feedback on CMD_RPC
S_SO
SPI_Serial Output
CS
15
14
13
0
12
0
11
0
10
1
9
1
8
1
7
0
6
0
5
0
4
0
3
0
2
1
1
0
0
0
PAR=
0
TOR
0
Field
-
Bits
-
Type
-
Description
CMD_RPC is returned
12.3.1.4 CMD_RINx - Command: Return Input Pin (INx) -Status
The Command CMD_RINx offers the possibility to read out the actual status of the Input Pins. This command
allows to check the correct communication on the INx Pins. The data to be send is latched at the end of the
command frame .
Data Sheet
58
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
CMD_RINx
W
xxxx
xxxx
CMD_RINx
R/W
R/W
dept. of
previous R/W
TOR
TOR
INx
TOR
xxxx
SPI_Protocol_CMD_RINx.vsd
Figure 34 SPI Feedback on CMD_RINx
S_SO
SPI_Serial Output
CS
15
14
13
0
12
0
11
0
10
0
9
8
7
6
5
4
3
2
1
0
TOR PAR
0
IN10 IN9
IN8
IN7
IN6
IN5
IN4
IN3
IN2
IN1
Field
-
Bits
-
Type
-
Description
INx Input Pin Status
The Status of the INx Pins is read out at the moment of CS High-to-Low
transition. Details see Figure 35.
0
1
INx = Low corresponding OFF
INx = High corresponding ON
Data Sheet
59
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
OUT1
Control Logic
IN1
IN2
OUT2
OUTn
INx
Temporal INx Register
latched by CMD_PINx and
CS High-to-Low transition
Latch on CS
Transfer on CS to
SPI-SO-Register
CS
CMD_RINx
SI
RINx
SO
INx_readout.vsd
Figure 35 Read-out of INx Pins
12.3.2
DCC - Diagnosis Registers and compactCONTROL
The DCC - Diagnosis and Compact Control Set allows to read out and clear the Diagnosis Registers. Additionally
this Command set offers the possibility to proceed with a compactCONTROL Mode using DMS - Diagnosis Mode
Set and OPS - Output Pin Set Commands. This compactCONTROL Mode offers the possibility to Control the
device with lowest work load on the micro controller side.
If any other pattern then the defined commands is received on S_SI, the command is ignored and rated as a
Communication Error. In this case, this incident is reported in SDS (Chapter 12.3.1.2) and TOR
(Chapter 12.2.4.3).
If an Error in the Output Channels is detected by the diagnosis circuit, the result is latched in the diagnosis registers
related to each channel.
The Diagnosis Register is not deleted, when it is just read out. The Diagnosis Register byte can only be cleared
by using the appropriated command. In this case, the complete Register Bank is cleared. The separation in two
diagnosis register banks allows together with the Device Control Bits “Latch on Over Current or Over Temperature”
[LOTC] a separated handling of the channel groups. The groups of Channel 1 to 6 and 7 to 10 can be treated
separately in this case. For details, see also chapter Chapter 12.3.6.
DCC
Reset Value: N.A.
Diagnosis Registers and Compact Control
Data Sheet
60
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
S_SI
SPI_Serial Input
DCC
11
10
9
8
7
6
5
4
3
2
1
0
DRA
DRB
DRACL
DRBCL
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
0
0
0
0
1
1
0
1
0
1
0
1
0
1
1
0
1
0
0
1
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
DMSCL/OPSx
DMS1/OPSx
DMS2/OPSx
DMS3/OPSx
DMSx/OPS1
DMSx/OPS2
DMSx/OPS3
DMSx/OPS4
DMSx/OPS5
DMSx/OPS6
DMSx/OPS7
DMSx/OPS8
OPSx
OPSx
OPSx
OPSx
DMSx
DMSx
DMSx
DMSx
DMSx
DMSx
DMSx
DMSx
0
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
1
0
0
0
0
0
0
0
Field
Bits
11:0
Type
Description
W
W
W
DRA - Diagnosis Register A (see Chapter 12.3.2.1)
DCC_DRA
Read out Diagnosis Register A. Return the contents in the next SPI
Frame. (see Chapter 12.3.2.2)
11:0
11:0
DRB - Diagnosis Register B (see Chapter 12.3.2.1)
Read out Diagnosis Register B. Return the contents in the next SPI
Frame. (see Chapter 12.3.2.2)
DCC_DRB
DRACL - Diagnosis Register A Clear
DCC_
Clear the contents of the Diagnosis Register A. Return the cleared
contents in the next SPI Frame. If the Diagnosis Error Remains,
the Information remains.(see Chapter 12.3.2.2)
DRACL
DCC_
11:0
11:8
W
W
DRBCL - Diagnosis Register B Clear
DRBCL
Clear the contents of the Diagnosis Register B. Return the cleared
contents in the next SPI Frame. If the Diagnosis Error Remains,
the Information remains. (see Chapter 12.3.2.2)
DCC_
DMSCL/OPSx - Diagnosis Mode Set, Clear / Output Pins Set
On sending this command, the diagnosis registers DRA, DRB as well
as the “virtual” Diagnosis Output Registers DO[7:0] (see
Chapter 12.3.2.3) are cleared. Output Pin Settings are done
according the content of OPSx.
DMSCL
Returns the contents of cleared DR2 on SO in the 2nd byte of the
actual communication frame and the Output Pin Feedback in
the 1st Byte of the next frame. (see Chapter 12.3.2.3)
Data Sheet
61
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
Field
Bits
Type
Description
DCC_
11:8
W
DMS1/OPSx - Diagnosis Mode Set, Register1 / Output Pins Set
On sending this command, the diagnosis registers DR1 is selected.
Output Pin Settings are done according the content of OPSx.
Returns the contents of DR1 on SO in the 2nd byte of the actual
communication frame and the Output Pin Feedback in the 1st
Byte of the next frame. (see Chapter 12.3.2.3)
DMS1
DCC_
DMS2
11:8
11:8
7:0
W
W
W
DMS2/OPSx - Diagnosis Mode Set, Register2 / Output Pins Set
On sending this command, the diagnosis registers DR2 is selected.
Output Pin Settings are done according the content of OPSx.
Returns the contents of DR2 on SO in the 2nd byte of the actual
communication frame and the Output Pin Feedback in the 1st
Byte of the next frame. (see Chapter 12.3.2.3)
DMS3/OPSx - Diagnosis Mode Set, Register3 / Output Pins Set
On sending this command, the diagnosis registers DR3 is selected.
Output Pin Settings are done according the content of OPSx.
Returns the contents of DR3 on SO in the 2nd byte of the actual
communication frame and the Output Pin Feedback in the 1st
Byte of the next frame. (see Chapter 12.3.2.3)
DCC_
DMS3
DCC_
DMSx/OPS1 - Diagnosis Mode Set x/ Output Pin Set Command 1
On sending this command, the diagnosis register is selected
according DMSx. The Output Pins of Channel 7-10 are set
according the following definitions. The OPSx are commands,
no register. The commands are controlling the contents of ISA,
ISB and OUTx.
DMSx/OPSx
OPS[7:0] - Output Pin Set
0000 0001: CH7 input select, 1: parallel* / 0 : Serial
0000 0010: CH8 input select, 1: parallel* / 0 : Serial
0000 0100: CH9 input select, 1: parallel* / 0 : Serial
0000 1000: CH10 input select, 1: parallel* / 0 : Serial
0001 0000: CH7 output set, 1: ON / 0:OFF
0010 0000: CH8 output set, 1: ON / 0:OFF
0100 0000: CH9 output set, 1: ON / 0:OFF
1000 0000: CH10 output set, 1: ON / 0:OFF
(*parallel controlled by INx)
Sending OR operated combinations of above listed options (only
OPSx) are possible in order to control more then one channel at
the same time.
If parallel mode Mode is selected (in “input select”), the serial settings
(in “output select”) are ignored.
In parallel Mode, the selected Channels are controlled via INx Pins.
The default setting of ISB corresponds the command OPS[7:0] = xxxx
1111b. (parallel mode, status of the Outputs according signal on
INx)
Returns the contents the selected DRx register on SO in the 2nd byte
of the actual communication frame and the Output Pin
Feedback [OPF] in the 1st Byte of the next frame. (see
Chapter 12.3.2.3)
Data Sheet
62
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
12.3.2.1 DRx - Diagnosis Registers Contents
DRA[1:0]x / DRB[1:0]x
Diagnosis Register CHx Bank A and Bank B
Reset Value: 0000 0000 0000B = 000h
11
10
9
8
7
6
5
4
3
2
1
0
DRA[1]6
DRA[0]6
DRA[1]5 DRA[0]5 DRA[1]4 DRA[0]4 DRA[1]3 DRA[0]3 DRA[1]2 DRA[0]2 DRA[1]1 DRA[0]1
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
DRB[1]10 DRB[0]10 DRB[1]9 DRB[0]9 DRB[1]8 DRB[0]8 DRB[1]7 DRB[0]7
Field
Bits
Type
Description
DRA[1:0]x / 1:0
R
DRA[1:0]x / DRB[1:0]x
DRB[1:0]x
DRn[1]x/DRn[0]x = 11 no Error
DRn[1]x/DRn[0]x = 10 Over Load, Shorted Load, Over temperature in
ON-Mode
DRn[1]x/DRn[0]x = 01 Open Load in OFF-Mode
DRn[1]x/DRn[0]x = 00 Short to GND in OFF-Mode
default DRx[1:0] = 11B
A new error on the same channel will overwrite older information.
The diagnosis information which is returned by SO is latched when
CS makes a High-to-Low transistion of the frame which sends
out the register.
12.3.2.2 DRx - Return on DRx Commands
x_DRx
W
xxxx
xxxx
x_DRx
R/W
R/W
dept. of
previous R/W
TOR
TOR
DRx
TOR
xxxx
SPI_Protocol_x_DRx.vsd
Figure 36 SPI Feedback on x_DRx commands
Data Sheet
63
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
S_SO
SPI_Serial Output
CS
15
14
13
0
12
1
11
10
9
8
7
6
5
4
3
2
1
0
DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx DRx
[1]x [0]x [1]x [0]x [1]x [0]x [1]x [0]x [1]x [0]x [1]x [0]x
TOR PAR
0
Field
-
Bits
-
Type
-
Description
DRx Contents
0
1
no Diagnosis Error
Diagnosis Error
12.3.2.3 DMSx/OPSx - Diagnosis Mode Set / Output Pin Set Commands
Protocol
Each Cycle where a serial data or command frame is sent to the Serial Input [SI] of the SPI interface, a data frame
is returned immediately by the Serial Output [SO]. The content of the SO frame is dependent of the previous
command which has been sent to SI and the content of the actual content of SI: The first Byte send by S_SI
controls the content of the second byte actual returned by S_SO. The second Byte send by S_SI controls the first
byte in S_SO of the next frame. (see Figure 37)
Upper
Byte
Lower
Byte
Upper
Byte
Lower
Byte
DMSx
OPSx
DO
Lower
Byte
Upper
Byte
Lower
Byte
Upper
Byte
OPF
TOR
TOR
TOR
SPI_Protocol_Short_Mode.vsd
Figure 37 Data Transfer in Diagnosis and Compact Control
S_SI
SPI_Serial Input
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Diagnosis Mode Set DMS[4:0]
-
Output Pin Set OPS[7:0]
serial mode selected
CH10: CH9: CH8: CH7: CH10: CH9: CH8: CH7:
1:ON 1:ON 1:ON 1:ON 0 = 0 = 0 = 0 =
0:OFF 0:OFF 0:OFF 0:OFF serial serial serial serial
1 = 1 = 1 = 1 =
parallel or serial mode
0
0
0
1
-
-
-
-
par. par. par. par.
Data Sheet
64
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
S_SO
SPI_Serial Output
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Output Pin Set Feedback OPF[7:0]
Diagnosis Output DO[7:0]
Diagnosis Register
Diagnosis Output Registers DO[7:0]
7
6
5
4
3
2
1
0
Diag Register-1
Diag Register-2
Diag Register-3
DR4[1]
DR1NA
DR10[1] DR10[0] DR9[1]
DR4[0]
DR3NA
DR3[1]
1
DR3[0]
1
DR9[0]
DR2[1]
DR6[1]
DR8[1]
DR2[0]
DR6[0]
DR8[0]
DR1[1]
DR5[1]
DR7[1]
DR1[0]
DR5[0]
DR7[0]
Field
DO[7:0]
Bits
7:0
Type
R
Description
DO[7:0] - Diagnosis Output
Contents according settings of DMS[4:0]
Returned within the same frame as the pointer is send.
DRx[1:0] definitions: see Chapter 12.3.2.1
DO[7:6]
Diag
7:6
R
DO1NA: NAND-operated diagnosis of Diag Register-1
DO3NA: NAND-operated diagnosis of Diag Register-3
Register-2
1: at least one diagnosis error is stored in the related Diag Register
0: no diagnosis error is stored in the related Diag Register.
Output Pin Feedback
Output Pin Feedback OPF[7:0]
15 14
OPF[7] OPF[6]
13
OPF[5]
12
OPF[4]
11
OPF[3]
10
OPF[2]
9
8
OPF[1]
OPF[0]
Field
OPF[7:0]
Bits
15:8
Type
R
Description
OPF[7:0] - Output Pin Feedback
Principally, OPF can return the previously send OPS word and the IN
10:7 -pin settings, dependent serial/parallel-setting of OPS:
- If Serial Mode is selected by one or more OPS[3:0]-bits, the related
OPF[7:4]-bits are returning the settings of OPS[7:4], send at the
previous frame.
- if parallel Mode is selected by one or more OPS[3:0]-bits, the related
OPF[7:4]-bits are returning the condition available at the related
IN 1:7 Pins at the moment of S_CS high-to-low transition.
A mix of both modes is possible and depends on the channel related
settings.
Data Sheet
65
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
12.3.3
OUTx - Output Control Register CHx
The Output Control Register OUTx consists of 10 Bits to control the Output Channel. Each Bit switches ON/OFF
the related Channel.
OUTx becomes only active when ISx[1:0] = 0x. For details refer to Chapter 12.3.4.
OUTx
DATA
Output Control Register
Reset Value: 1100 0000 0000B = C00h
11
10
9
8
7
6
5
4
3
2
1
0
1
1
OUT10
OUT9
OUT8
OUT7
OUT6
OUT5
OUT4
OUT3]
OUT2
OUT1
Field
OUTx[9:0]
Bits
9:0
Type
R/W
Description
Data - OUTx[9:0]
OUTx = 0 According Channel is switched OFF
OUTx = 1 According Channel is switched ON
default (all channels OFF) OUT[9:0] = 00 0000 0000B = 000h
OUT[11:10] 11:10
R/W
Data - OUTx[11:10]
bits are set to OUT[11:10] = 1.
12.3.4
ISx - INPUT or Serial Mode Control Register, Bank A and Bank B
The INPUT or Serial Control Register [ ISx[1:0] ] allows to define the way of controlling the Output Channels. There
are 4 setting options possible:
•
Standard Serial Control: The related Output Channel is set according the content of the OUTx Register.
(Chapter 12.3.3)
•
•
•
A further possibility is the control by the Input Pins
The settings of the Parallel Mode Register PMx[0]. (Chapter 12.3.5)
Additionally possible is the AND operation between the setting of the OUTx register and the PWM signal at the
INPUT Pin.
COMMAND
ISAx
INPUT or Serial Mode Control Register Bank A
11 10
Reset Value: 1010 1010 1010B = AAAh
9
8
7
6
5
4
3
2
1
0
IS6
IS5
IS4
IS3
IS2
IS1
Data Sheet
66
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
ISBx
COMMAND
Reset Value: 0000 1010 1010B = 0AAh
INPUT or Serial Mode Control Register Bank B
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
IS10
IS9
IS8
IS7
Field
Bits
Type
Description
ISx[1:0]
11:0 ISAx
R/W
Command - IS[1:0]
7:0 ISBx
ISx[1:0]=
0x: Serial Mode - The Channel is set ON/OFF by OUTx.
10: INPUT Mode - CHx ON/OFF according INx
11: AND operate Mode INx with OUTx
-> CHx ON if OUTx & INx =1
default all Channels ISx[1:0] = 10B
12.3.5
PMx - Parallel Mode Register CHx
The Parallel Mode Register PMx[1] allows to “inform” the device about externally parallel connected output
channels. If a PMx bit is set, the “lower” related Input Channel controls the indicated Output Channels to achieve
best possible matching and according to that highest efficiency of both channels. Additionally to that, the
CLAMPsafe feature allows high matching during clamping.
PMx
COMMAND
Parallel Mode Register CHx
Reset Value: 0000 0000 0000B = 000h
11
10
9
8
7
6
5
4
3
2
1
0
0
0
0
0
PM910
PM89
PM78
PM56
0
PM34
PM23
PM12
Field
PMx
PMx
Bits
11:8
7:0
Type
R/W
R/W
Description
0
PMx - Parallel Mode Bit
0
1
Direct Mode
Parallel Mode of Channel 1 with x+1
default PMx[0] = 0
Controlling Parallel Mode is possible between Channel 1 to 4, 5 to 6,
7 to 10. In between the groups, no parallel mode is supported
but possible.
In case Parallel Mode is chosen and a diagnosis error at only one of
the channels is detected, the according diagnosis bit is set. This
information mismatch can be caused by tolerance related in-
balance of the channels connected together in parallel mode.
The diagnosis bits should be or-operated by the Micro Controller
side.
12.3.6
DEVS - Device Settings
This Register allows additional Device settings. For details refer also to the Chapter “Electrical Characteristics”.
The Diagnosis Current Control register allow to select between different Diagnosis Modes. The Diagnosis
Currents can be switched off to avoid glowing of any connected LEDs.
Data Sheet
67
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
The Register Latch on Over Current or Over Temperature LOTC[1:0] defines the reaction of the protection
functions on exceeding the operating ranges.
DEVS
Device Settings
COMMAND
Reset Value: 0000 0000 0111B = 007h
11
10
9
8
7
6
5
4
3
2
1
0
RCP
DBT2
DBT1
LOTC70 LOTC70 LOTC16 LOTC16
[1] [0] [1] [0]
0
0
DCC10
DCC9
DCC18
Field
RCP
Bits
11
Type
R/W
Description
RCP - Reverse Current Protection
1: reverse current comp is enabled (valid for all Channels)
0: disabled
default: RCP = 0
DBT2
DBT1
10
9
R/W
DBT2,1 - Diagnosis Blind Time Channel 7 to 10
0,0 standard Filter Time of typ. 150µs
1,0 standard Filter Time of typ. 150µs
0,1 OFF-state diagnosis Blind Time of typ. 2.5ms
1,1 OFF-state diagnosis Blind Time of typ. 5ms
LOTC16[1:0] 6:5
LOTC70[1:0] 8:7
R/W
LOTCx[1:0] - Latch on Over Temperature or Over Current
LOTC16[1:0] - Settings for Ch 1 to 6
LOTC70[1:0] - Settings for Ch 7 to 10
00 Default: shut down and latch when over current or over
temperature was detected. The related channel can only be
turned on again, when the Diagnosis Byte is deleted by a clear
command.
Changing to other modes might cause severe damage to
the device over longer operating periods.
01 shut down and restart with next turn-on command /or DATA of
the channel. No clearance of the Diagnosis Register required.
10 shut down and restart automatically after delay time
11 not used, is a command with =11 is received, frame is ignored.
default LOTCxx[1:0] = 00.
DEVS[4:3]
4:3
R/W
not used. set to ’0’
Data Sheet
68
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Control of the device
Field
Bits
Type
Description
DCCx
2:0
R/W
DCCx - Diagnosis Current Control
DCC18 switching ON/OFF diagnosis current of CH1-8
DCC9 switching ON/OFF diagnosis current of CH9
DCC10 switching ON/OFF diagnosis current of CH10
0
OFF-State Diagnosis (Detection of open load and short to GND)
of CHx is switched OFF. ON state diagnosis (over current and
over temperature detection) is still active.
Diagnosis Current is switched OFF.
1
OFF-State (Detection of open load and short to GND) and ON-
State (over current and over temperature detection) Diagnosis
of CHx switched ON,
Diagnosis Current is switched ON
default DCC = 1
Data Sheet
69
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Package Outlines
13
Package Outlines
P_DSO_36_24_outline .vsd
Figure 38 PG-DSO-36-41 Exposed Pad
Green Product (RoHS compliant)
To meet the world-wide customer requirements for environmentally friendly products and to be compliant with
government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e
Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020).
You can find all of our packages, sorts of packing and others in our
Infineon Internet Page “Products”: http://www.infineon.com/products.
Dimensions in mm
Data Sheet
70
Rev. 1.0, 2009-06-15
FLEX
Smart Multi-Channel Switch
Revision History (Book)
14
Revision History (Book)
TLE8110EE
Revision History:
2009-06-15
Rev. 1.0
Ver 1.0
2009-06-15: datasheet released
Data Sheet
71
Rev. 1.0, 2009-06-15
Edition 2009-06-15
Published by
Infineon Technologies AG
81726 Munich, Germany
© 2009 Infineon Technologies AG
All Rights Reserved.
Legal Disclaimer
The information given in this document shall in no event be regarded as a guarantee of conditions or
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights
of any third party.
Information
For further information on technology, delivery terms and conditions and prices, please contact the nearest
Infineon Technologies Office (www.infineon.com).
Warnings
Due to technical requirements, components may contain dangerous substances. For information on the types in
question, please contact the nearest Infineon Technologies Office.
Infineon Technologies components may be used in life-support devices or systems only with the express written
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support
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and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may
be endangered.
相关型号：
TLE8110EEXUMA2
Buffer/Inverter Based Peripheral Driver, 1.7A, PDSO36, GREEN, PLASTIC, DSO-36
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