XMC6521SC-Q040X AA [INFINEON]

The XMCXXXXSC devices are members of the XMC1000 Family of microcontrollers based on the ARM Cortex-M0 processor core. The XMCXXXXSC series addresses the real-time control needs of wireless power systems. The XMC6521SC-Q040X is a Qi single coil 15W inductive MP-A11 desktop transmitter.;
XMC6521SC-Q040X AA
型号: XMC6521SC-Q040X AA
厂家: Infineon    Infineon
描述:

The XMCXXXXSC devices are members of the XMC1000 Family of microcontrollers based on the ARM Cortex-M0 processor core. The XMCXXXXSC series addresses the real-time control needs of wireless power systems. The XMC6521SC-Q040X is a Qi single coil 15W inductive MP-A11 desktop transmitter.

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XMCxxxxSC  
Wireless Power Controller Series  
for Commercial and  
Industrial Applications  
XMC1000 Family  
ARM® Cortex®-M0  
32-bit processor core  
Data Sheet  
V1.3, 2019-05  
Edition 2016-10  
Published by  
Infineon Technologies AG  
81726 Munich, Germany  
© 2016 Infineon Technologies AG  
All Rights Reserved.  
Legal Disclaimer  
The information given in this document shall in no event be regarded as a guarantee of conditions or  
characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any  
information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties  
and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights  
of any third party.  
Information  
For further information on technology, delivery terms and conditions and prices, please contact the nearest  
Infineon Technologies Office (www.infineon.com).  
Warnings  
Due to technical requirements, components may contain dangerous substances. For information on the types in  
question, please contact the nearest Infineon Technologies Office.  
Infineon Technologies components may be used in life-support devices or systems only with the express written  
approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure  
of that life-support device or system or to affect the safety or effectiveness of that device or system. Life support  
devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain  
and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may  
be endangered.  
XMCxxxxSC  
Wireless Power Controller Series  
for Commercial and  
Industrial Applications  
XMC1000 Family  
ARM® Cortex®-M0  
32-bit processor core  
Data Sheet  
V1.3, 2019-05  
XMCxxxxSC-Q040X  
XMC1000 Family  
XMCXXXXSC Data Sheet  
Revision History: V0.5 2019-03  
Previous Versions:  
Page  
Subjects  
Data Sheet  
V1.3, 2019-05  
Subject to Agreement on the Use of Product Information  
XMCxxxxSC-Q040X  
XMC1000 Family  
Trademarks  
C166™, TriCore™, XMC™ and DAVE™ are trademarks of Infineon Technologies AG.  
ARM®, ARM Powered®, Cortex®, Thumb® and AMBA® are registered trademarks of  
ARM, Limited.  
CoreSight™, ETM™, Embedded Trace Macrocell™ and Embedded Trace Buffer™ are  
trademarks of ARM, Limited.  
We Listen to Your Comments  
Is there any information in this document that you feel is wrong, unclear or missing?  
Your feedback will help us to continuously improve the quality of this document.  
Please send your proposal (including a reference to this document) to:  
mcdocu.comments@infineon.com  
Data Sheet  
V1.3, 2019-05  
Subject to Agreement on the Use of Product Information  
XMCxxxxSC-Q040X  
XMC1000 Family  
Table of Contents  
Table of Contents  
1
Summary of Features.................................................................................. 9  
Device Overview ..........................................................................................11  
Ordering Information ................................................................................... 12  
Device Types .............................................................................................. 13  
Chip Identification Number.......................................................................... 15  
1.1  
1.2  
1.3  
1.4  
2
2.1  
2.2  
2.2.1  
2.2.2  
2.2.3  
2.2.4  
General Device Information...................................................................... 18  
Logic Symbols............................................................................................. 18  
Pin Configuration and Definition.................................................................. 22  
Package Pin Summary............................................................................ 26  
Port Pin for Boot Modes ...........................................................................30  
Port I/O Function Description ...................................................................31  
Hardware Controlled I/O Function Description ........................................ 32  
3
3.1  
Electrical Parameter.................................................................................. 41  
General Parameters.................................................................................... 41  
Parameter Interpretation ......................................................................... 41  
Absolute Maximum Ratings..................................................................... 42  
Pin Reliability in Overload ....................................................................... 43  
Operating Conditions................................................................................45  
DC Parameters ........................................................................................... 46  
Input/Output Characteristics.....................................................................46  
Analog to Digital Converters (ADC)......................................................... 50  
Out of Range Comparator (ORC) Characteristics ....................................54  
Analog Comparator Characteristics......................................................... 56  
Temperature Sensor Characteristics....................................................... 57  
Oscillator Pins ......................................................................................... 58  
Power Supply Current ..............................................................................62  
Flash Memory Parameters...................................................................... 68  
AC Parameters............................................................................................ 70  
Testing Waveforms ..................................................................................70  
Power-Up and Supply Threshold Characteristics.................................... 71  
On-Chip Oscillator Characteristics .......................................................... 73  
Serial Wire Debug Port (SW-DP) Timing................................................. 74  
SPD Timing Requirements...................................................................... 75  
Peripheral Timings .................................................................................. 76  
Synchronous Serial Interface (USIC SSC) Timing .............................. 76  
Inter-IC (IIC) Interface Timing.............................................................. 79  
Inter-IC Sound (IIS) Interface Timing....................................................81  
3.1.1  
3.1.2  
3.1.3  
3.1.4  
3.2  
3.2.1  
3.2.2  
3.2.3  
3.2.4  
3.2.5  
3.2.6  
3.2.7  
3.2.8  
3.3  
3.3.1  
3.3.2  
3.3.3  
3.3.4  
3.3.5  
3.3.6  
3.3.6.1  
3.3.6.2  
3.3.6.3  
4
Package and Reliability ............................................................................ 83  
4.1  
Package Parameters................................................................................... 83  
Data Sheet  
6
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XMCxxxxSC-Q040X  
XMC1000 Family  
Table of Contents  
4.1.1  
4.2  
Thermal Considerations .......................................................................... 83  
Package Outlines ........................................................................................ 85  
5
Quality Declaration.................................................................................... 88  
Data Sheet  
7
V1.3, 2019-05  
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XMCxxxxSC-Q040X  
XMC1000 Family  
About this Document  
About this Document  
This Data Sheet is addressed to embedded hardware and software developers. It  
provides the reader with detailed descriptions about the ordering designations, available  
features, electrical and physical characteristics of the XMCXXXXSC series devices.  
The document describes the characteristics of a superset of the XMCXXXXSC series  
devices. For simplicity, the various device types are referred to by the collective term  
XMCXXXXSC throughout this document.  
XMC1000 Family User Documentation  
The set of user documentation includes:  
Data Sheets  
list the complete ordering designations, available features and electrical  
characteristics of derivative devices.  
API Interface Document  
list details regarding API interface and registers.  
Attention: Please consult all parts of the documentation set to attain consolidated  
knowledge about your device.  
Application related guidance is provided by Users Guides and Application Notes.  
Please refer to http://www.infineon.com/xmc1000 to get access to the latest versions  
of those documents.  
Data Sheet  
8
V1.3, 2019-05  
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XMCxxxxSC-Q040X  
XMC1000 Family  
Summary of Features  
1
Summary of Features  
The XMCXXXXSC devices are members of the XMC1000 Family of microcontrollers  
based on the ARM Cortex-M0 processor core. The XMCXXXXSC series addresses the  
real-time control needs of wireless power systems.  
Figure 1 Block Diagram  
Data Sheet  
9
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XMCxxxxSC-Q040X  
XMC1000 Family  
Features  
CPU subsystem  
Analog Frontend Peripherals  
32-bit ARM Cortex-M0 CPU Core  
MATH coprocessor  
A/D converters for voltage and current sensing  
Temperature Sensor  
On-Chip Memories  
Industrial Control Peripherals  
SRAM (with parity)  
Flash (with ECC)  
2 PWM channels for full bridge coil driver  
1 PWM channel for step-up or step-down  
bridge supply control  
Supply, Reset and Clock  
3.3 V or 5 V supply with power on reset  
and brownout detector  
On-chip clock monitor  
External crystal oscillator support (8 to 20  
MHz)  
Up to 13 Input/Output Ports  
3.3 V or 5 V capable  
Programming Support  
Secure bootloader  
Packages  
VQFN-40 (55 mm2)  
System Control  
Window watchdog  
Real time clock module  
Pseudo random number generator  
Tools  
Easy to use GUI for programming and  
debugging  
Communication Peripherals  
Four USIC channels, usable as  
UART (115.2 kb/s)  
IIC (up to 400 kb/s)  
Data Sheet  
10  
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XMCxxxxSC-Q040X  
XMC1000 Family  
1.1  
Device Overview  
The following table lists the available features per device type for the XMCXXXXSC series.  
Table 1  
Features of XMCXXXXSC Device Types  
Features  
Operating temperature  
(ambient)  
-40 to 105 °C  
3.3 V or 5.5 V  
Operating voltage  
GPIOs  
GPIs  
27  
8
Packages  
VQFN-40  
1.2  
Ordering Information  
The ordering code for an Infineon microcontroller provides an exact reference to a  
specific product. The code “XMC<DDDD>SC-<Z><PPP><T>” identifies:  
<DDDD> the derivatives function set  
<Z> the package variant  
Q: VQFN  
<PPP> package pin count  
<T> the temperature range:  
X: -40°C to 105°C  
For ordering codes for the XMCXXXXSC please contact your sales representative or  
local distributor.  
This document describes several derivatives of the XMCXXXXSC series, some  
descriptions may not apply to a specific product. Please see Table 2.  
For simplicity the term XMCXXXXSC is used for all derivatives throughout this document.  
Data Sheet  
11  
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XMCxxxxSC-Q040X  
XMC1000 Family  
1.3  
Device Types  
These device types are available and can be ordered through Infineon’s direct and/or  
distribution channels.  
Table 2  
Synopsis of XMCXXXXSC Device Types  
Description  
Derivative  
XMC0001SC-Q040X  
XMC6521SC-Q040X  
XMC6511SC-Q040X  
XMC7501SC-Q040X  
XMC7531SC-Q040X  
XMC7541SC-Q040X  
XMC8511SC-Q040X  
XMC8531SC-Q040X  
Evaluation device to be programmed by the customer  
Qi single coil 15W inductive MP-A11 desktop transmitter  
Qi single coil 10W sub-surface infrastructure transmitter  
Single coil low power inductive transmitter  
Single coil 30W Telecom and Security transmitter  
Single coil 80W high power inductive transmitter  
Low power resonant multi-device transmitter  
30W resonant transmitter  
Data Sheet  
12  
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XMCxxxxSC­Q040  
XMC1000 Family  
General Device Information  
2
General Device Information  
This section summarizes the package pin configurations with a detailed list of the  
functional I/O mapping.  
2.1  
Pin Configuration and Definition  
The following figures summarize all pins, showing their locations.  
30  
VSW2  
CAP2  
HIRES  
VBR  
GPIO7 / BUZ  
1
2
3
4
5
29  
28  
27  
26  
25  
24  
23  
22  
21  
GPIO6 / BRIDGE_EN  
GPIO5 / PWM0  
GPIO4 / GAIN1  
GPIO3 / GAIN0  
GPIO2 / COIL3_EN  
GPIO1 / COIL2_EN  
GPIO0 / COIL1_EN  
PMW1H  
VIN  
41 Ext. Pad  
VSSP  
TEMP  
CAP1  
CMP  
6
7
8
9
VAC  
PMW1L  
CAP0  
10  
Figure 7  
XMCXXXXSC PG-VQFN-40-17 Pin Configuration (top view)  
Data Sheet  
13  
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XMCxxxxSC­Q040  
XMC1000 Family  
General Device Information  
2.1.1  
Package Pin Summary  
The following columns list the package pin number to which the respective function is  
mapped in that package.  
The “Pad Type” indicates the employed pad type:  
STD_INOUT (standard bi-directional pads)  
STD_INOUT/AN (standard bi-directional pads with analog input)  
STD_INOUT/clock (standard bi-directional pads with oscillator function)  
High Current (high current bi-directional pads)  
STD_IN/AN (standard input pads with analog input)  
Power (power supply)  
Details about the pad properties are defined in the Electrical Parameter chapter.  
Table 5 Package Pin Mapping  
Function VQFN  
40  
Pad Type  
Notes  
GPIO0  
GPIO1  
GPIO2  
GPIO3  
GPIO4  
GPIO5  
23  
24  
25  
26  
27  
28  
29  
30  
33  
STD_INOUT GPIO0 or COIL1_EN (coil #1 enable)  
STD_INOUT GPIO1 or COIL2_EN (coil #2 enable)  
STD_INOUT GPIO2 or COIL3_EN (coil #3 enable)  
STD_INOUT GPIO3 or GAIN0 (measurement gain control)  
STD_INOUT GPIO4 or GAIN1 (measurement gain control)  
STD_INOUT GPIO5 or PWM0 (bridge supply PWM)  
STD_INOUT GPIO6 or BRIDGE_EN (bridge enable)  
STD_INOUT GPIO7 or BUZ (buzzer)  
GPIO6  
GPIO7  
GPIO8  
STD_INOUT GPIO8 or PWM3H (PWM channel #3)  
GPIO9  
34  
35  
STD_INOUT GPIO9 or PWM3L (PWM channel #3)  
GPIO10  
STD_INOUT GPIO10 or XI (crystal input)  
/clock_IN  
GPIO11  
36  
STD_INOUT GPIO11 or XO (crystal output)  
/clock_O  
GPIO12  
GPIO13  
37  
38  
STD_INOUT GPIO12 or PWM4L (PWM channel #4)  
STD_INOUT GPIO13 or PWM4H (PWM channel #4)  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
General Device Information  
Table 5  
Package Pin Mapping (cont’d)  
Function VQFN  
40  
Pad Type  
Notes  
RXD  
39  
40  
22  
21  
20  
19  
18  
17  
16  
1
STD_INOUT UART receive  
STD_INOUT UART transmit  
High Current PWM channel #1  
High Current PWM channel #1  
High Current PWM channel #2  
High Current PWM channel #2  
High Current LED control  
TXD  
PWM1H  
PWM1L  
PWM2H  
PWM2L  
LED3  
LED2  
High Current LED control  
LED1  
High Current LED control  
VSW2  
STD_INOUT PWM channel #2 switch node voltage  
/AN  
CAP2  
2
STD_INOUT High Resolution PWM capacitor  
/AN  
HIRES  
VBR  
3
4
5
6
7
8
STD_IN/AN High Resolution PWM input  
STD_IN/AN Bridge voltage measurement  
STD_IN/AN Input voltage measurement  
STD_IN/AN Coil thermistor (optional)  
STD_IN/AN BIAS/Peak Capacitor  
VIN  
TEMP  
CAP1  
CMP  
STD_IN/AN Current sense/Peak detector  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
General Device Information  
Table 5  
Package Pin Mapping (cont’d)  
Function VQFN  
40  
Pad Type  
Notes  
VAC  
9
STD_IN/AN Coil AC measurement  
CAP0  
VSW1  
10  
11  
STD_IN/AN Communication demodulator input B  
STD_INOUT PWM channel #1 switch node voltage  
/AN  
COMM  
12  
STD_INOUT Communication demodulator input  
/AN  
VSS  
VDD  
13  
14  
Power  
Power  
Supply GND, ADC reference GND  
Supply VDD, ADC reference voltage/ ORC  
reference voltage  
VDDP  
15  
Power  
When VDD is supplied, VDDP has to be supplied  
with the same voltage.  
VDDP  
VSSP  
VSSP  
32  
31  
Power  
Power  
Power  
I/O port supply  
I/O port ground  
Exposed Die Pad The exposed die pad is  
connected internallytoVSSP. For proper  
operation, it is mandatory to connect the  
exposed pad to the board ground. For thermal  
aspects, please refer to the Package and  
Reliability chapter.  
Exp.  
Pad  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3
Electrical Parameter  
This section provides the electrical parameter which are implementation-specific for the  
XMCXXXXSC.  
3.1  
General Parameters  
3.1.1  
Parameter Interpretation  
The parameters listed in this section represent partly the characteristics of the  
XMCXXXXSC and partly its requirements on the system. To aid interpreting the  
parameters easily when evaluating them for a design, they are indicated by the  
abbreviations in the “Symbol” column:  
CC  
Such parameters indicate Controller Characteristics, which are distinctive feature of  
the XMCXXXXSC and must be regarded for a system design.  
SR  
Such parameters indicate System Requirements, which must be provided by the  
application system in which the XMCXXXXSC is designed in.  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.1.2  
Absolute Maximum Ratings  
Stresses above the values listed under “Absolute Maximum Ratings” may cause  
permanent damage to the device. This is a stress rating only and functional operation of  
the device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating  
conditions may affect device reliability.  
Table 11 Absolute Maximum Rating Parameters  
Parameter  
Symbol  
Values  
Unit Note /  
Test  
Min Typ. Max.  
.
Condition  
Junction temperature  
Storage temperature  
TJ  
TST  
SR -40  
115  
125  
6
C  
C  
V
SR -40  
VDDP  
Voltage on power supply pin  
SR -0.3  
with respect to VSSP  
VIN  
Voltage on digital pins with  
respect to VSSP  
SR -0.5  
SR -0.3  
V
V
whichever  
is lower  
V
DDP + 0.5  
or max. 6  
1)  
VINP2  
Voltage on analog  
V
DDP + 0.3  
input pins with respect  
2)  
to V  
SSP  
VAIN  
Voltage on analog input pins  
with respect to VSSP  
-0.5  
V
whichever  
is lower  
V
DDP + 0.5  
V
AREF SR  
or max. 6  
10  
IIN  
Input current on any pin  
during overload condition  
SR -10  
mA  
mA  
Absolute maximum sum of all IIN SR -50  
inputcurrents during overload  
condition  
+50  
1) Excluding pins CAP2, HIRES, CAP1, CMP, VAC, CAP0, COMM.  
1) Applicable to pins CAP2, HIRES, CAP1, CMP, VAC, CAP0, COMM.  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.1.3  
Pin Reliability in Overload  
When receiving signals from higher voltage devices, low-voltage devices experience  
overload currents and voltages that go beyond their own IO power supplies specification.  
Table 12 defines overload conditions that will not cause any negative reliability impact if  
all the following conditions are met:  
full operation life-time is not exceeded  
Operating Conditions are met for  
pad supply levels (VDDP)  
temperature  
If a pin current is outside of the Operating Conditions but within the overload  
conditions, then the parameters of this pin as stated in the Operating Conditions can no  
longer be guaranteed. Operation is still possible in most cases but with relaxed  
parameters.  
Note: An overload condition on one or more pins does not require a reset.  
Note: A series resistor at the pin to limit the current to the maximum permitted overload  
current is sufficient to handle failure situations like short to battery.  
Table 12  
Overload Parameters  
Symbol  
Parameter  
Values  
Unit Note /  
Test Condition  
Min. Typ. Max.  
Input current on any port pin  
during overload condition  
I
OV SR -5  
5
mA  
mA  
Absolute sum of all input  
circuit currents during  
overload condition  
I
OVS SR  
25  
Figure 11 shows the path of the input currents during overload via the ESD protection  
structures. The diodes against VDDP and ground are a simplified representation of these  
ESD protection structures.  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
VDDP  
VDDP  
IOVx  
Pn.y  
GND  
GND  
ESD  
Pad  
Figure 11  
Input Overload Current via ESD structures  
Table 13 and Table 14 list input voltages that can be reached under overload conditions.  
Note that the absolute maximum input voltages as defined in the Absolute Maximum  
Ratings must not be exceeded during overload.  
Table 13 PN-Junction Characteristics for positive Overload  
Pad Type  
IOV =5 mA  
Standard, High-current,  
AN/DIG_IN  
VIN = VDDP + 0.5 V  
V
V
AIN = VDDP + 0.5 V  
AREF = VDDP + 0.5 V  
CAP2, HIRES, CAP1,  
CMP, VAC, CAP0,  
COMM  
V
INP2 = VDDP + 0.3 V  
Table 14 PN-Junction Characteristics for negative Overload  
Pad Type  
IOV =5 mA  
Standard, High-current,  
AN/DIG_IN  
VIN = VSS - 0.5 V  
V
V
AIN = VSS - 0.5 V  
AREF = VSS - 0.5 V  
CAP2, HIRES, CAP1,  
CMP, VAC, CAP0,  
COMM  
V
INP2 = VSS - 0.3 V  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.1.4  
Operating Conditions  
The following operating conditions must not be exceeded in order to ensure correct  
operation and reliability of the XMCXXXXSC. All parameters specified in the following  
tables refer to these operating conditions, unless noted otherwise.  
Table 15 Operating Conditions Parameters  
Parameter  
Symbol  
Values  
Typ.  
  
Unit Note /  
Test Condition  
Min.  
SR -40  
Max.  
105  
5.5  
5
Ambient Temperature TA  
Digital supply voltage1)  
°C  
V
Temp. Range X  
VDDP  
SR 3.3  
SR -5  
  
Short circuit current of ISC  
  
mA  
digital outputs  
Absolute sum of short ISC_D SR   
circuit currents of the  
device  
  
25  
mA  
1) See also the Supply Monitoring thresholds, Chapter 3.3.2.  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.2  
DC Parameters  
3.2.1  
Input/Output Characteristics  
Table 16 provides the characteristics of the input/output pins of the XMCXXXXSC.  
Note: These parameters are not subject to production test, but verified by design and/or  
characterization.  
Note: Unless otherwise stated, input DC and AC characteristics, including peripheral  
timings, assume that the input pads operate with the standard hysteresis.  
Table 16  
Input/Output Characteristics (Operating Conditions apply)  
Symbol Limit Values Unit Test Conditions  
Parameter  
Min.  
Max.  
Output low voltage on  
port pins  
(with standard pads)  
V
OLP CC  
1.0  
V
V
V
I
I
OL = 11 mA (5 V)  
OL = 7 mA (3.3 V)  
0.4  
1.0  
I
I
OL = 5 mA (5 V)  
OL = 3.5 mA (3.3 V)  
Output low voltage on  
high current pads  
V
OLP1 CC  
I
I
OL = 50 mA (5 V)  
OL = 25 mA (3.3 V)  
0.32  
0.4  
V
V
V
I
I
OL = 10 mA (5 V)  
OL = 5 mA (3.3 V)  
VDDP  
1.0  
-
-
-
-
-
Output high voltage on  
port pins  
(with standard pads)  
V
V
OHP CC  
I
I
OH = -10 mA (5 V)  
OH = -7 mA (3.3 V)  
VDDP  
0.4  
V
V
V
V
V
I
I
OH = -4.5 mA (5 V)  
OH = -2.5 mA (3.3 V)  
OHP1 CC  
VDDP  
0.32  
Output high voltage on  
high current pads  
I
I
I
OH = -6 mA (5 V)  
OH = -8 mA (3.3 V)  
OH = -4 mA (3.3 V)  
VDDP  
1.0  
VDDP  
0.4  
V
ILPS SR  
0.19   
VDDP  
Input low voltage on port  
pins  
CMOS Mode  
(5 V, 3.3 V)  
(Standard Hysteresis)  
0.7   
VDDP  
Input high voltage on  
port pins  
V
IHPS SR  
V
CMOS Mode  
(5 V, 3.3 V)  
(Standard Hysteresis)  
Data Sheet  
46  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
Table 16  
Input/Output Characteristics (Operating Conditions apply) (cont’d)  
Parameter  
Symbol  
Limit Values Unit Test Conditions  
Min.  
Max.  
0.08   
Input low voltage on port  
pins  
(Large Hysteresis)  
V
ILPL SR  
V
V
CMOS Mode  
(5 V, 3.3 V)  
VDDP  
Input high voltage on  
port pins  
V
IHPL SR  
0.85   
VDDP  
CMOS Mode  
(5 V, 3.3 V)  
(Large Hysteresis)  
Rise/fall time on High  
Current Pad1)  
9
ns  
ns  
ns  
ns  
V
50 pF @ 5 V2)  
50 pF @ 3.3 V3)  
50 pF @ 5 V5)  
50 pF @ 3.3 V6).  
t
HCPR, CC  
tHCPF  
12  
12  
15  
Rise/fall time on  
Standard Pad1)  
tR, tF CC  
0.08   
VDDP  
HYS CC  
Input Hysteresis on port  
pin except VBR, VIN,  
TEMP, CAP1, CMP,  
VAC, CAP08)  
CMOS Mode (5 V),  
Standard Hysteresis  
0.03   
VDDP  
V
V
V
CMOS Mode (3.3 V),  
Standard Hysteresis  
0.5  0.75   
VDDP  
VDDP  
CMOS Mode(5 V),  
Large Hysteresis  
0.4  0.75   
VDDP VDDP  
CMOS Mode(3.3 V),  
Large Hysteresis  
Data Sheet  
47  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
Table 16  
Input/Output Characteristics (Operating Conditions apply) (cont’d)  
Parameter  
Symbol  
Limit Values Unit Test Conditions  
Min.  
Max.  
HYS_ CC  
P2  
0.08   
Input Hysteresis on port  
pin VBR, VIN, TEMP,  
CAP1, CMP, VAC,  
CAP08)  
V
CMOS Mode (5 V),  
Standard Hysteresis  
VDDP  
0.03   
VDDP  
V
CMOS Mode (3.3 V),  
Standard Hysteresis  
0.35  0.75   
V
CMOS Mode(5 V),  
Large Hysteresis  
VDDP  
VDDP  
0.25  0.75   
V
CMOS Mode(3.3 V),  
Large Hysteresis  
VDDP  
VDDP  
Pin capacitance (digital CIO  
inputs/outputs)  
CC  
CC  
10  
pF  
V
V
V
IH,min (5 V)  
IL,max (5 V)  
IH,min (3.3 V)  
Pull-up current on port IPUP  
pins  
-80  
A  
A  
A  
A  
A  
A  
A  
A  
A  
-95  
-50  
-65  
V
V
V
IL,max (3.3 V)  
IL,max (5 V)  
IH,min (5 V)  
Pull-down current on  
port pins  
IPDP  
CC  
40  
95  
30  
V
V
IL,max (3.3 V)  
IH,min (3.3 V)  
60  
Input leakage current  
except GPIO119)  
IOZP  
CC -1  
OZP1 CC  
SR  
1
0 < VIN < VDDP  
TA 105 C  
,
,
I
0 < VIN < VDDP  
TA 105 C  
10)  
Input leakage current for  
GPIO119)  
-10  
1
A  
V
Voltage on any pin  
during VDDP power off  
VPO  
IMP  
0.3  
11  
Maximum current per  
pin (excluding high  
current pins, VDDP and  
VSS)  
SR -10  
mA  
Maximum current per  
high current pins  
I
MP1A SR  
-10  
50  
mA  
Data Sheet  
48  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
Table 16  
Input/Output Characteristics (Operating Conditions apply) (cont’d)  
Parameter  
Symbol  
Limit Values Unit Test Conditions  
Min.  
Max.  
Maximum current into  
I
MVDD3 SR  
MVSS3 SR  
260  
mA  
mA  
V
DDP (VQFN40)  
Maximum current out of  
SS (VQFN40)  
I
260  
V
1) Rise/Fall time parameters are taken with 10% - 90% of supply.  
2) Additional rise/fall time valid for CL = 50 pF - CL = 100 pF @ 0.150 ns/pF at 5 V supply voltage.  
3) Additional rise/fall time valid for CL = 50 pF - CL = 100 pF @ 0.205 ns/pF at 3.3 V supply voltage.  
4)  
.
5) Additional rise/fall time valid for CL = 50 pF - CL = 100 pF @ 0.225 ns/pF at 5 V supply voltage.  
6) Additional rise/fall time valid for CL = 50 pF - CL = 100 pF @ 0.288 ns/pF at 3.3 V supply voltage.  
7)  
.
8) Hysteresis is implemented to avoid meta stable states and switching due to internal ground bounce. It cannot  
be guaranteed that it suppresses switching due to external system noise.  
9) An additional error current (IINJ) will flow if an overload current flows through an adjacent pin.  
10) However, for applications with strict low power-down current requirements, it is mandatory that no active  
voltage source is supplied at any GPIO pin when VDDP is powered off.  
Data Sheet  
49  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.2.2  
Oscillator Pins  
Note: It is strongly recommended to measure the oscillation allowance (negative  
resistance) in the final target system (layout) to determine the optimal parameters  
for the oscillator operation. Please refer to the limits specified by the crystal or  
ceramic resonator supplier.  
Note: These parameters are not subject to production test, but verified by design and/or  
characterization.  
The oscillator pins can be operated with an external crystal/resonator (see Figure 15) or  
in direct input mode (see Figure 16).  
XTAL1  
fOSC  
GND  
XTAL2  
Damping resistor  
maybe needed for  
some crystals  
V
VPPX_min  
VPPX  
VPPX_min  
VPPXVPPX_max  
tOSCS  
t
Figure 15  
Oscillator in Crystal Mode  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
External Clock  
Source  
Direct Input Mode  
XTAL1  
XTAL2  
not connected  
V
VIHBX_max  
VIHBX_min  
VILBX_max  
VSS  
VILBX_min  
t
Figure 16  
Oscillator in Direct Input Mode  
Data Sheet  
51  
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XMCxxxxSC­Q040  
XMC1000 Family  
Table 21  
OSC_XTAL Parameters  
Parameter  
Symbol  
Min.  
Values  
Typ.  
  
Unit Note /  
Test Condition  
Max.  
48  
Input frequency  
fOSC SR  
4
4
MHz Direct Input Mode  
  
20  
MHz External Crystal  
Mode  
tOSCS  
CC  
Oscillator start-up  
time1)2)  
  
  
  
10  
ms  
Input voltage at GPIO10 VIX SR  
-0.3  
1.5  
V
External Crystal  
Mode  
-0.3  
  
  
5.5  
1.7  
V
V
Direct Input Mode  
Input amplitude (peak-  
to-peak) at GPIO102)3)  
V
PPX SR 0.6  
External Crystal  
Mode  
1)  
t
OSCS is defined from the moment the oscillator is enabled wih SCU_ANAOSCHPCTRL.MODE until the  
oscillations reach an amplitude at XTAL1 of 0.9 * VPPX  
.
2) The external oscillator circuitry must be optimized by the customer and checked for negative resistance and  
amplitude as recommended and specified by crystal suppliers.  
3) If the shaper unit is enabled and not bypassed.  
Data Sheet  
52  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.2.3  
Power Supply Current  
The total power supply current defined below consists of a leakage and a switching  
component.  
Application relevant values are typically lower than those given in the following tables,  
and depend on the customer's system operating conditions (e.g. thermal connection or  
used application configurations).  
Note: These parameters are not subject to production test, but verified by design and/or  
characterization.  
Table 23 Power Supply parameter table; VDDP = 5V  
Parameter  
Symbol  
Values  
Min. Typ.1)  
DDPAE CC   
14.1  
Unit Note /  
Test Condition  
Max.  
Active mode current  
Peripherals  
I
20  
mA 48 / 96  
enabled2)  
Data Sheet  
53  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
Table 23  
Power Supply parameter table; VDDP = 5V  
Parameter  
Symbol  
Values  
Min. Typ.1)  
Unit Note /  
Test Condition  
Max.  
IDDPSR  
CC  
Sleep mode current  
Peripherals clock  
disabled  
  
1.1  
  
mA 1 / 1  
Flash powered down6)  
IDDPDS  
CC  
Deep Sleep mode  
current7)  
  
  
  
0.27  
6
  
  
  
mA  
Wake-up time from Sleep tSSA CC  
cycl  
es  
to Active mode8)  
Wake-up time from Deep  
Sleep to Active mode9)  
tDSA CC  
290  
sec  
1) The typical values are measured at TA =+ 25 C and VDDP =5 V.  
2) CPU and all peripherals clock enabled, Flash is in active mode.  
3)  
4)  
5)  
.
.
.
6) CPU in sleep, Flash is powered down and code executed from RAM after wake-up.  
7) CPU in sleep, peripherals clock disabled, Flash is powered down and code executed from RAM after wake-up.  
8) CPU in sleep, Flash is in active mode during sleep mode.  
9) CPU in sleep, Flash is in powered down mode during deep sleep mode.  
Data Sheet  
54  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.3  
AC Parameters  
3.3.1  
Testing Waveforms  
VDDP  
90%  
90%  
10%  
10%  
VSS  
tR  
tF  
Figure 20  
Rise/Fall Time Parameters  
VDDP  
VDDP / 2  
VDDP / 2  
Test Points  
VSS  
Figure 21  
Testing Waveform, Output Delay  
VLOAD + 0.1V  
VOH - 0.1V  
Timing  
Reference  
Points  
VLOAD - 0.1V  
VOL + 0.1V  
Figure 22  
Testing Waveform, Output High Impedance  
Data Sheet  
55  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.3.2  
Power-Up and Supply Threshold Characteristics  
Table 26 provides the characteristics of the supply threshold in XMCXXXXSC.  
The guard band between the lowest valid operating voltage and the brownout reset  
threshold provides a margin for noise immunity and hysteresis. The electrical  
parameters may be violated while VDDP is outside its operating range.  
The brownout detection triggers a reset within the defined range. The prewarning  
detection can be used to trigger an early warning and issue corrective and/or fail-safe  
actions in case of a critical supply voltage drop.  
Note: These parameters are not subject to production test, but verified by design and/or  
characterization.  
Table 26  
Power-Up and Supply Threshold Parameters (Operating Conditions  
apply)  
Parameter  
Symbol  
Values  
Typ. Max.  
Unit Note /  
Test Condition  
Min.  
107  
0.1  
10  
s  
VDDP  
SVDDPrise  
/
V
V
DDP ramp-up time  
DDP slew rate  
  
  
  
t
RAMPUP SR  
S
S
VDDPOP SR  
VDDP10 SR  
0
V/s Slope during  
normal operation  
0
0
V/s Slope during fast  
transient within +/-  
10% of VDDP  
S
VDDPrise SR  
  
  
10  
V/s Slope during  
power-on or  
restart after  
brownout event  
SVDDPfa 1) SR  
0
0.25 V/s Slope during  
supply falling out  
of the +/-10%  
ll  
limits2)  
V
DDP prewarning  
V
DDPPW CC 2.1  
2.25 2.4  
V
ANAVDEL.VDEL_  
SELECT = 00B  
voltage  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
Table 26  
Power-Up and Supply Threshold Parameters (Operating Conditions  
apply) (cont’d)  
Parameter  
Symbol  
Values  
Typ. Max.  
1.62 1.75  
Unit Note /  
Test Condition  
Min.  
V
DDP brownout reset  
V
V
DDPBO CC  
1.55  
V
calibrated, before  
user code starts  
running  
voltage  
V
DDP voltage to  
  
  
1.0  
  
V
DDPPA CC  
ensure defined pad  
states  
Start-up time from  
power-on reset  
tSSW SR  
260  
s  
Time to the first  
user code  
instruction3)  
1) A capacitor of at least 100 nF has to be added between VDDP and VSSP to fulfill the requirement as stated for  
this parameter.  
2) Valid for a 100 nF buffer capacitor connected to supply pin where current from capacitor is forwarded only to  
the chip. A larger capacitor value has to be chosen if the power source sink a current.  
3) This values does not include the ramp-up time. During startup firmware execution, MCLK is running at 48 MHz  
and the clocks to peripheral as specified in register CGATSTAT0 are gated.  
5.0V  
VDDPPW  
}
VDDP  
VDDPBO  
Figure 23  
Supply Threshold Parameters  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.3.3  
Peripheral Timings  
Note: These parameters are not subject to production test, but verified by design and/or  
characterization.  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
3.3.3.1  
Inter-IC (IIC) Interface Timing  
The following parameters are applicable for a USIC channel operated in IIC mode.  
Note: Operating Conditions apply.  
Table 33  
USIC IIC Standard Mode Timing1)  
Parameter  
Symbol  
Values  
Unit Note /  
Test Condition  
Min.  
Typ.  
Max.  
Fall time of both SDA and  
SCL  
-
-
300  
ns  
ns  
µs  
ns  
µs  
µs  
µs  
µs  
µs  
µs  
t1  
CC/SR  
Rise time of both SDA and  
SCL  
-
-
-
-
-
-
-
-
-
-
1000  
t2  
CC/SR  
Data hold time  
0
-
-
-
-
-
-
-
-
t3  
CC/SR  
Data set-up time  
250  
4.7  
4.0  
4.0  
4.7  
4.0  
4.7  
t4  
CC/SR  
LOW period of SCL clock  
HIGH period of SCL clock  
t5  
CC/SR  
t6  
CC/SR  
Hold time for (repeated)  
START condition  
t7  
CC/SR  
Set-up time for repeated  
START condition  
t8  
CC/SR  
Set-up time for STOP  
condition  
t9  
CC/SR  
t10  
CC/SR  
Bus free time between a  
STOP and START  
condition  
Capacitive load for each  
bus line  
Cb SR  
-
-
400  
pF  
1) Due to the wired-AND configuration of an IIC bus system, the port drivers of the SCL and SDA signal lines  
need to operate in open-drain mode. The high level on these lines must be held by an external pull-up device,  
approximalely 10 kOhm for operation at 100 kbit/s, approximately 2 kOhm for operation at 400kbit/s.  
Data Sheet  
59  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
Table 34  
USIC IIC Fast Mode Timing1)  
Parameter  
Symbol  
Min.  
Values  
Typ.  
-
Unit Note /  
Test Condition  
Max.  
Fall time of both SDA and  
SCL  
20 +  
300  
ns  
t1  
CC/SR  
0.1*Cb  
2)  
Rise time of both SDA and  
SCL  
20 +  
CC/SR 0.1*Cb  
-
-
-
-
-
-
-
-
-
300  
ns  
µs  
ns  
µs  
µs  
µs  
µs  
µs  
µs  
t2  
Data hold time  
0
-
-
-
-
-
-
-
-
t3  
CC/SR  
Data set-up time  
100  
1.3  
0.6  
0.6  
0.6  
0.6  
1.3  
t4  
CC/SR  
LOW period of SCL clock  
HIGH period of SCL clock  
t5  
CC/SR  
t6  
CC/SR  
Hold time for (repeated)  
START condition  
t7  
CC/SR  
Set-up time for repeated  
START condition  
t8  
CC/SR  
Set-up time for STOP  
condition  
t9  
CC/SR  
t10  
CC/SR  
Bus free time between a  
STOP and START  
condition  
Capacitive load for each  
bus line  
Cb SR  
-
-
400  
pF  
1) Due to the wired-AND configuration of an IIC bus system, the port drivers of the SCL and SDA signal lines  
need to operate in open-drain mode. The high level on these lines must be held by an external pull-up device,  
approximalely 10 kOhm for operation at 100 kbit/s, approximately 2 kOhm for operation at 400kbit/s.  
2) Cb refers to the total capacitance of one bus line in pF.  
Data Sheet  
60  
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XMCxxxxSC­Q040  
XMC1000 Family  
Electrical Parameter  
t1  
t2  
t4  
70%  
30%  
SDA  
SCL  
t1  
t3  
t2  
t6  
9th  
clock  
t7  
t5  
t10  
S
SDA  
SCL  
t8  
t7  
t9  
9th  
clock  
Sr  
P
S
Figure 26  
USIC IIC Timing  
Data Sheet  
61  
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XMCxxxxSC­Q040  
XMC1000 Family  
Package and Reliability  
4
Package and Reliability  
The XMCXXXXSC is a member of the XMC1000 Family of microcontrollers. It is also  
compatible to a certain extent with members of similar families or subfamilies.  
Each package is optimized for the device it houses. Therefore, there may be slight  
differences between packages of the same pin-count but for different device types. In  
particular, the size of the exposed die pad may vary.  
If different device types are considered or planned for an application, it must be ensured  
that the board layout fits all packages under consideration.  
4.1  
Package Parameters  
Table 37 provides the thermal characteristics of the packages used in XMCXXXXSC.  
Table 37  
Thermal Characteristics of the Packages  
Parameter  
Symbol  
Limit Values  
Min. Max.  
Unit  
Package Types  
Exposed Die Pad  
Dimensions  
Ex Ey  
CC  
-
3.7 3.7 mm  
PG-VQFN-40-17  
PG-VQFN-40-171)  
Thermal resistance  
Junction-Ambient  
RJA CC  
-
45.3 K/W  
1) Device mounted on a 4-layer JEDEC board (JESD 51-5); exposed pad soldered.  
Note: For electrical reasons, it is required to connect the exposed pad to the board  
ground VSSP, independent of EMC and thermal requirements.  
4.1.1  
Thermal Considerations  
When operating the XMCXXXXSC in a system, the total heat generated in the chip  
must be dissipated to the ambient environment to prevent overheating and the  
resulting thermal damage.  
The maximum heat that can be dissipated depends on the package and its integration  
into the target board. The “Thermal resistance RJA” quantifies these parameters. The  
power dissipation must be limited so that the average junction temperature does not  
exceed 115 °C.  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
Package and Reliability  
The difference between junction temperature and ambient temperature is determined by  
T = (PINT + PIOSTAT + PIODYN) RJA  
The internal power consumption is defined as  
P
INT = VDDP IDDP (switching current and leakage current).  
The static external power consumption caused by the output drivers is defined as  
IOSTAT = ((VDDP-VOH) IOH) + (VOL IOL)  
P
The dynamic external power consumption caused by the output drivers (PIODYN) depends  
on the capacitive load connected to the respective pins and their switching frequencies.  
If the total power dissipation for a given system configuration exceeds the defined limit,  
countermeasures must be taken to ensure proper system operation:  
Reduce VDDP, if possible in the system  
Reduce the system frequency  
Reduce the number of output pins  
Reduce the load on active output drivers  
Data Sheet  
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XMCxxxxSC­Q040  
XMC1000 Family  
4.2  
Package Outlines  
0.4  
9 x  
= 3.6  
5
A
0.4  
0.9MAX.  
M
0.1 A C 2x  
0.05  
A B C  
B
21  
30  
31  
40  
0.08  
C
20  
40x  
0.1C  
COPLANARITY  
11  
10  
1
Index Marking  
±0.05 40x  
0.1 B C  
2x  
0.2  
M
M
M
0.07  
0.05  
0.05  
A B C  
C
Index Marking  
C
(0.2)  
±0.1  
3.6  
A B C  
0.05MAX.  
STANDOFF  
PG-VQFN-40-13, -14, -17-PO V05  
Figure 30  
PG-VQFN-40-17  
All dimensions in mm.  
5
Quality Declaration  
Table 38 shows the characteristics of the quality parameters in the XMCXXXXSC.  
Table 38  
Quality Parameters  
Symbol Limit Values  
Parameter  
Unit Notes  
Min.  
Max.  
VHBM  
ESD susceptibility  
-
2000  
V
V
Conforming to  
EIA/JESD22-  
A114-B  
according to Human Body SR  
Model (HBM)  
VCDM  
ESD susceptibility  
-
500  
Conforming to  
according to Charged  
Device Model (CDM) pins  
SR  
JESD22-C101-C  
MSL  
CC  
Moisture sensitivity level  
-
-
3
-
JEDEC  
J-STD-020D  
TSDR  
SR  
Soldering temperature  
260  
°C  
Profile according  
to JEDEC  
J-STD-020D  
Data Sheet  
64  
V1.3, 2019-05  
Subject to Agreement on the Use of Product Information  
 
w w w . i n f i n e o n . c o m  
Published by Infineon Technologies AG  

相关型号:

XMC7100-E272K4160AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100-F100K1088AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
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XMC7100-F100K2112AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100-F100K4160AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100-F144K2112AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100-F144K4160AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100-F176K4160AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100D-E272K4160AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100D-F100K2112AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100D-F100K4160AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100D-F144K2112AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON

XMC7100D-F144K4160AA

The XMC7100/7200 series belongs to the XMC7000 family of 32-bit industrial microcontrollers based on -up to two- ARM Cortex-M7 processor cores.
INFINEON