EL4543IUZ [INTERSIL]
Triple Differential Twisted-Pair Driver with Common-Mode Sync Encoding; 三重差分双绞线驱动器，共模同步编码
| 型号： | EL4543IUZ |
| 厂家： | 
Intersil |
| 描述： | Triple Differential Twisted-Pair Driver with Common-Mode Sync Encoding |
| 文件： | 总16页 (文件大小：842K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
EL4543
®
Data Sheet
October 26, 2005
FN7325.5
Triple Differential Twisted-Pair Driver with
Common-Mode Sync Encoding
Features
• Fully differential inputs, outputs, and feedback
The EL4543 is a high bandwidth triple differential amplifier
with integrated encoding of video sync signals. The inputs
are suitable for handling high speed video or other
communications signals in either single-ended or differential
form, and the common-mode input range extends all the way
to the negative rail enabling ground-referenced signalling in
single supply applications. The high bandwidth enables
differential signalling onto standard twisted-pair or coax with
very low harmonic distortion, while internal feedback
ensures balanced gain and phase at the outputs reducing
radiated EMI and harmonics.
• 350MHz -3dB bandwidth
• 1200V/µs slew rate
• -75dB distortion at 5MHz
• Single 5V to 12V operation
• 50mA minimum output current
• Low power - 36mA total typical supply current
• Pb-free plus anneal available (RoHS compliant)
Applications
• Twisted-pair drivers
Embedded logic encodes standard video horizontal and
vertical sync signals onto the common mode of the twisted
pair(s), transmitting this additional information without the
requirement for additional buffers or transmission lines. The
EL4543 enables significant system cost savings when
compared with discrete line driver alternatives.
• Differential line drivers
• VGA over twisted-pair
• Transmission of analog signals in a noisy environment
The EL4543 is available in a 24 Ld QSOP package and is
specified for operation over the -40°C to +85°C temperature
range.
Ordering Information
PART
PART
TAPE &
PKG.
NUMBER
MARKING REEL
PACKAGE
24 Ld QSOP
24 Ld QSOP
24 Ld QSOP
DWG. #
TABLE 1. SYNC SIGNAL ENCODING
EL4543IU
EL4543IU-T7
EL4543IU
EL4543IU
-
7”
13”
-
MDP0040
MDP0040
MDP0040
MDP0040
COMMON
MODE A
(RED)
COMMON
MODE B
(GREEN)
COMMON
MODE C
(BLUE)
EL4543IU-T13 EL4543IU
H
V
EL4543IUZ
(See Note)
EL4543IUZ
24 Ld QSOP
(Pb-Free)
Low
Low
High
High
High
Low
Low
High
3.0
2.5
2.0
2.5
2.0
3.0
3.0
2.0
2.5
2.0
2.5
3.0
EL4543IUZ-T7 EL4543IUZ
(See Note)
7”
24 Ld QSOP
(Pb-Free)
MDP0040
MDP0040
EL4543IUZ-T13 EL4543IUZ
(See Note)
13”
24 Ld QSOP
(Pb-Free)
EL4543IL
4543IL
4543IL
4543IL
4543ILZ
-
7”
13”
-
20 Ld 4x4 QFN* MDP0046
20 Ld 4x4 QFN* MDP0046
20 Ld 4x4 QFN* MDP0046
EL4543IL-T7
EL4543IL-T13
TABLE 2. INPUT LOGIC THRESHOLD (+5V SUPPLY)
V
, max
0.8V
2V
LO
EL4543ILZ
(See Note)
20 Ld 4x4 QFN* MDP0046
(Pb-Free)
V
, min
HI
EL4543ILZ-T7 4543ILZ
(See Note)
7”
20 Ld 4x4 QFN* MDP0046
(Pb-Free)
EL4543ILZ-T13 4543ILZ
(See Note)
13”
20 Ld 4x4 QFN* MDP0046
(Pb-Free)
NOTE: Intersil Pb-free plus anneal products employ special Pb-free
material sets; molding compounds/die attach materials and 100% matte tin
plate termination finish, which are RoHS compliant and compatible with
both SnPb and Pb-free soldering operations. Intersil Pb-free products are
MSL classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
*20 Ld 4x4 QFN, exposed pad 2.7 x 2.7mm
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2004, 2005. All Rights Reserved.
1
All other trademarks mentioned are the property of their respective owners.
EL4543
Pinouts
EL4543
(24 LD QSOP)
TOP VIEW
EL4543
(20 LD QFN)
TOP VIEW
EN
VINA+
VINA-
NC
1
2
3
4
5
6
7
8
9
24 VOUTA+
23 VOUTA-
22 NC
+
-
VSYNC
HSYNC
NC
1
2
3
4
5
15 VS+
21 VS+
14 VS-
VSYNC
HSYNC
NC
20 VS-
THERMAL
PAD
13 NC
19 NC
12 VOUTB+
11 VOUTB-
VINB+
VINB-
18 VOUTB+
17 VOUTB-
16 NC
+
-
VINB+
VINB-
NC 10
VINC+ 11
VINC- 12
15 VOUTC+
14 VOUTC-
13 NC
+
-
FN7325.5
October 26, 2005
2
EL4543
Absolute Maximum Ratings (T = 25°C)
A
Supply Voltage (V + & V -). . . . . . . . . . . . . . . . . . . . . . . . . . . .+12V
Ambient Operating Temperature . . . . . . . . . . . . . . . .-40°C to +85°C
S
S
Maximum Output Continuous Current . . . . . . . . . . . . . . . . . . ±70mA
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . .+135°C
V
V
+, V . . . . . . . . . . . . . . . V - + 0.8V (min) to V + - 0.8V (max)
IN
IN
INB S S
INB
- - V
. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .±5V
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typ values are for information purposes only. Unless otherwise noted, all tests are
at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V + = +5V, V - = 0V, T = 25°C, V = 0V, R = 150Ω, unless otherwise specified.
S
S
A
IN
L
PARAMETER
DESCRIPTION
CONDITIONS
MIN
TYP
MAX
UNIT
AC PERFORMANCE
BW (-3dB)
SR
-3dB Bandwidth
Differential Slew Rate
V
= 2V
350
1000
13.6
700
-70
MHz
V/µs
ns
OUT
= 200Ω
P-P
R
600
L
T
Settling Time to 0.1%
STL
GBW
HD2
HD3
dP
Gain Bandwidth Product
2nd Harmonic Distortion
3rd Harmonic Distortion
Differential Phase @ 3.58MHz
Differential Gain @ 3.58MHz
MHz
dBc
dBc
°
f = 20MHz, R = 200Ω
L
f = 20MHz, R = 200Ω
-70
L
0.01
0.01
dG
%
INPUT CHARACTERISTICS
V
Input Referred Offset Voltage
-10
-30
2
10
mV
µA
OS
I
Input Bias Current (V +, V +)
-15
-10
IN
IN IN
Z
Differential Input Impedance
Differential Input Range
180
±0.75
kΩ
IN
V
V
V
V
DIFF
CM
N
Input Common Mode Voltage Range
Input Referred Voltage Noise
Input Common Mode Rejection Ratio
Threshold
0
2.3
V
27
80
nV/√Hz
dB
CMRR
EN
V
V
= 0 to 2V
60
CM
1.4
V
OUTPUT CHARACTERISTICS
Output Peak Current
DC PERFORMANCE
Voltage Gain
SUPPLY CHARACTERISTICS
I
40
60
mA
V/V
OUT
A
= 0.8V
P-P
1.82
1.96
2.05
V
IN
V
Supply Operating Range
V + to V -
5
12
V
SUPPLY
S
S
I
Power Supply Current (per Channel)
Power Supply Rejection Ratio
12.3
70
14.5
80
16.2
mA
dB
S
PSRR
FN7325.5
3
October 26, 2005
EL4543
Pin Descriptions
PIN NUMBER
PIN NAME
PIN DESCRIPTION
EQUIVALENT CIRCUIT
EN
1
EN
Disables video inputs and outputs
V
SM
CIRCUIT 1
2
VINA+
VINA-
NC
Non-inventing input
Inverting input
3
4, 7, 10, 13, 16, 19, 22
5
Not connected
VSYNC
Vertical sync logic input
SYNC
V
SM
CIRCUIT 2
6
HSYNC
VINB+
Horizontal sync logic input
Non-inverting input
Inverting input
Reference Circuit 2
8
9
VINB-
11
12
14
15
17
18
20
21
23
24
VINC+
VINC-
Non-inverting input
Inverting input
VOUTC-
VOUTC+
VOUTB-
VOUTB+
VS-
Inverting output
Non-inverting output
Inverting output
Non-inverting output
Negative supply
VS+
Positive supply
VOUTA-
VOUTA+
Non-inverting output
Inverting output
FN7325.5
4
October 26, 2005
EL4543
Typical Performance Curves
-42
-46
-50
-54
-58
-62
BALANCE ERROR=
BLUE CM
20 LOG(∆ ,CM/∆ ,DIFF)
VO VO
OUT (CH A
GREEN CM
OUT (CH B
RED CM
OUT (CH C
V
SYNC
H
SYNC
TIME (0.5ms/DIV)
100K
1M
10M
100M
FREQUENCY (Hz)
FIGURE 1. COMMON MODE OUTPUT
4
FIGURE 2. BALANCE ERROR
4
2
C =0pF
R =200Ω
L
L
R =500Ω
L
22pF
R =200Ω
12pF
8.2pF
L
2
0
0
2.2pF
R =100Ω
L
-2
-4
-6
-2
-4
R =50Ω
L
-6
100K
1M
10M
100M
1G
100K
1M
10M
100M
1G
FREQUENCY RESPONSE (Hz)
FREQUENCY RESPONSE (Hz)
FIGURE 3. DIFFERENTIAL FREQUENCY RESPONSE FOR
VARIOUS R - DIFF
FIGURE 4. DIFFFERENTIAL FREQUENCY RESPONSE FOR
VARIOUS C - DIFF
L
L
4
2
0
20
R =100Ω
12pF
R =200Ω
L
L
C =2.2pF
L
8.2pF
4.7pF
0
40
2.2pF
-2
-4
-6
60
80
100
100K
1M
10M
100M
1G
100K
1M
10M
100M
1G
FREQUENCY RESPONSE (Hz)
FREQUENCY RESPONSE (Hz)
FIGURE 6. CMRR
FIGURE 5. DIFFERENTIAL FREQUENCY RESPONSE FOR
VARIOUS C - DIFF
L
FN7325.5
October 26, 2005
5
EL4543
Typical Performance Curves (Continued)
12
10
8
4
3.5
3
2.5
2
V
SWITCH
6
1.5
1
4
2
0.5
0
0
5
6
7
8
9
10
11
12
5
6
7
8
9
10
11
12
SUPPLY VOLAGE (V)
SUPPLY VOLAGE (V)
FIGURE 7. COMMON MODE INPUT RANGE vs SUPPLY
VOLTAGE
FIGURE 8. H
& V
THRESHOLD vs SUPPLY VOLTAGE
SYNC
SYNC
0
-20
0.04
0.035
0.03
0.025
0.02
0.015
0.01
0.005
0
-40
-60
-80
R =200Ω
L
-100
0
10K
100K
1M
10M
100M
5
6
7
8
9
10
11
12
FREQUENCY
SUPPLY VOLAGE (V)
FIGURE 9. PSRR vs FREQUENCY
FIGURE 10. I
vs V
SUPPLY
SUPPLY
212ns
3.5
3
2.5V
2.5
2
ENABLE
OUTPUT
SIGNAL
1.5
1
0.5
0
5
6
7
8
9
10
11
12
TIME (200ns/DIV)
SUPPLY VOLAGE (V)
FIGURE 11. ENABLE DISABLE vs SUPPLY VOLTAGE
FIGURE 12. ENABLE RESPONSE
FN7325.5
6
October 26, 2005
EL4543
Typical Performance Curves (Continued)
R =200Ω DIFF
L
C =0pF
L
ENABLE
2.5V
900ns
RISE
∆t=25ns
FALL
∆t=1.94ns
OUTPUT
SIGNAL
TIME (200ns/DIV)
TIME (20ns/DIV)
FIGURE 13. DISABLE RESPONSE
FIGURE 14. DIFFERENTIAL SMALL SIGNAL TRANSIENT
RESPONSE
9
LOGIC H
=0V
SYNC
R =200Ω DIFF
L
8
7
6
5
4
3
2
1
0
V
=0V
SYNC
C =0pF
L
RISE
FALL
∆t=2.81ns
∆t=2.31ns
5
6
7
8
9
10
11
12
TIME (20ns/DIV)
SUPPLY VOLAGE (V)
FIGURE 15. DIFFERENTIAL LARGE SIGNAL TRANSIENT
RESPONSE
FIGURE 16. COMMON MODE DC LEVEL vs SUPPLY
VOLTAGE
9
9
LOGIC H
=0V
LOGIC H
=3V
SYNC
SYNC
=3V
8
7
6
5
4
3
2
1
0
8
7
6
5
4
3
2
1
0
V
V
=0V
SYNC
SYNC
5
6
7
8
9
10
11
12
5
6
7
8
9
10
11
12
SUPPLY VOLAGE (V)
SUPPLY VOLAGE (V)
FIGURE 17. COMMON MODE DC LEVEL vs SUPPLY VOLTAGE
FIGURE 18. COMMON MODE DC LEVEL vs SUPPLY VOLTAGE
FN7325.5
7
October 26, 2005
EL4543
Typical Performance Curves (Continued)
9
50
40
30
20
10
0
LOGIC H
=3V
A =+2
V
SYNC
=3V
8
7
6
5
4
3
2
1
0
V
SYNC
5
6
7
8
9
10
11
12
10K
100K
1M
10M
100M
SUPPLY VOLAGE (V)
FREQUENCY (Hz)
FIGURE 19. COMMON MODE DC LEVEL vs SUPPLY VOLTAGE
10K
FIGURE 20. OUTPUT IMPEDANCE
0
-20
R =200Ω DIFF
L
1K
100
10
-40
-60
-80
1
-100
5
6
7
8
9
10
12
100K
1M
10M
100M
400M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 21. INPUT VOLTAGE AND CURRENT NOISE
FIGURE 22. CHANNEL ISOLATION vs FREQUENCY
5
3
1
-1
-3
V
=200mV
OP-P
V
=2V
OP-P
-5
100K
1M
10M
FREQUENCY (Hz)
100M
1G
FIGURE 23. FREQUENCY RESPONSE vs OUTPUT
AMPLITUDE
FIGURE 24. GAIN vs FREQUENCY - 2 CHANNELS
FN7325.5
October 26, 2005
8
EL4543
Typical Performance Curves (Continued)
FIGURE 25. GAIN vs FREQUENCY - 2 CHANNELS
FIGURE 27. PHASE vs FREQUENCY - 2 CHANNELS
FIGURE 26. GAIN vs FREQUENCY - 2 CHANNELS
FIGURE 28. PHASE vs FREQUENCY - 2 CHANNELS
FIGURE 30. HARMONIC DISTORTION
FIGURE 29. PHASE vs FREQUENCY - 2 CHANNELS
FN7325.5
October 26, 2005
9
EL4543
Typical Performance Curves (Continued)
FIGURE 31. HARMONIC DISTORTION
JEDEC JESD51-7 HIGH EFFECTIVE
FIGURE 32. HARMONIC DISTORTION
JEDEC JESD51-3 LOW EFFECTIVE
THERMAL CONDUCTIVITY TEST BOARD
THERMAL CONDUCTIVITY TEST BOARD
1.4
1.2
1.136W
1.2
1
0.8
0.6
0.4
0.2
0
870mW
1
0.8
0.6
0.4
0.2
0
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 33. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 34. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
JEDEC JESD51-7 HIGH EFFECTIVE THERMAL
CONDUCTIVITY TEST BOARD - QFN EXPOSED
JEDEC JESD51-3 AND SEMI G42-88 (SINGLE
DIEPAD SOLDERED TO PCB PER JESD51-5
3
LAYER) TEST BOARD
0.8
667mW
0.7
2.500W
2.5
0.6
0.5
0.4
0.3
0.2
0.1
0
2
1.5
1
0.5
0
0
25
50
75 85 100
125
150
0
25
50
75 85 100
125
150
AMBIENT TEMPERATURE (°C)
AMBIENT TEMPERATURE (°C)
FIGURE 35. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FIGURE 36. PACKAGE POWER DISSIPATION vs AMBIENT
TEMPERATURE
FN7325.5
October 26, 2005
10
EL4543
Sync Transmission
The EL4543 encodes H
Operational Description and Application
Information
Introduction
The EL4543 is designed to differentially drive composite
RGB video signals onto twisted pair lines, while
simultaneously encoding horizontal and vertical sync signals
as common mode output. The entire video signal plus sync
can therefore be transmitted on 3 twisted pairs of wire. When
utilizing CAT-5 cable, the 4th available twisted pair can be
used for transmission of audio, data or control information.
The distribution of composite video over standard CAT-5
cable enables enormous cost and labor savings compared
with traditional coaxial cable, when considering both the
relative low price and ease of pulling CAT-5 cable.
and V
SYNC
signals on the
SYNC
common mode output of the differential video signals; Red,
Green and Blue respectively. Data Sheet Figure 16, 17 and 18
clearly illustrate that the sum of the common mode voltages
results in a fixed average DC level with no AC content and
illustrates the logic levels. This eliminates EMI radiation into
any common mode signal along the twisted pairs of CAT 5
cable.
Extract Common Mode Sync and Decode H
&
SYNC
V
SYNC
SYNC
H
and V
SYNC
can be regenerated from the Common
Mode sync output voltages. The relationships between
H
, V and the 3 common mode levels are given by
SYNC SYNC
Table 1. The common mode levels are easily separated from
the differential outputs of the EL4543 using this simple
resistor network at the cable receiver input of each
differential channel; see Figure 38.
Functional Description
The EL4543 provides three fully differential high-speed
amplifiers, suitable for driving high-resolution composite
video signals onto twisted pair or standard coaxial cable.
The input common-mode range extends to the negative rail,
allowing simple ground-referenced input termination to be
used with a single supply. The amplifiers provide a fixed gain
of +2 to compensate for standard video cable termination
Twisted Pair Termination
The schematic in Figure 38 illustrates a termination scheme
for 50Ω series termination and a 100Ω twisted pair cable.
Note RCM is the common mode termination to allow
measurement of V
and should not be too small since it
schemes. Horizontal and Vertical sync signals (H
and
) are passed to an internal Logic Encoding Block to
encode the sync information as three discrete signals of
different voltage levels. Generally, in differential amplifiers an
CM
SYNC
loads the EL4543; a little over a 100Ω is recommended for
V
SYNC
RCM.
TYPICAL EL4543 TERMINATION DRIVER
+
external V
pin is used to control the common mode level
REF
of the differential output; in the case of the EL4543 the V
TWISTED
PAIR
50Ω
50Ω
REF
+
-
V
CM
of each of the three internal amplifier channels receives a
signal from the Logic Encoding Block with encoded H
50Ω
Z
=100Ω
O
120Ω
50Ω
-
SYNC
(RCM: SHOULD BE >100Ω)
(FOR LOADING
CONSIDERATIONS)
V
REF
and V
information. The final output consists of three
SYNC
fully differential video signals, with sync encoded on the
common mode of each of the three RGB differential signals.
FIGURE 38. TWISTED PAIR TERMINATION EL4543
H
and V can easily be separated from the
SYNC
SYNC
differential output signals, decoded and transmitted along
with the RGB video signals to the video monitor.
Video Transmission
The EL4543 is a twisted pair differential line driver directed
at the transmission of Video Signals through cables up to
100 feet; however, as signal losses increase with
transmission line length the EL4543 will need additional
support to equalize video signals along longer twisted pair
transmission lines. A full solution to accomplish this is the
SXGA Video Transmission System presented in the EL4543
Data Sheet. Note the inclusion of the EL9110 for signal
equalization of up to 1000ft of CAT-5 cable and common
mode extraction; see Data Sheet for additional information
on the EL9110.
EN
+
+
+
INA
-
OUTA
-
-
V
REF
EN
+
+
+
INB
-
OUTB
-
V
H
SYNC
SYNC
EN
-
RCM
GCM
BCM
V
REF
LOGIC
DECODING
Long Distance Video Transmission
The SXGA Video Transmission System makes it possible to
transmit Red, Green and Blue (RGB) video plus sync up to
1000 feet through CAT-5 cable. The input to the SXGA Video
Transmission System is the output of a video source
EN
+
+
+
INC
-
OUTC
-
-
V
REF
transmitting RGB video signals plus sync. The signals are
received initially by the EL4543; which converts the single
FIGURE 37. BLOCK DIAGRAM EL4543
FN7325.5
11
October 26, 2005
EL4543
ended input RGB signals to three fully differential waveforms
with sync encoded on the discrete common modes of each
color channel and then drives the signals through a length of
CAT-5 cable. The signal is received by the EL9110, which
can provide 6-pole equalization for both high and low
frequency signal transmission line losses. Then the EL9110
converts the differential RGB video signals back into single
ended format while extracting the common mode component
for decoding. The single ended RGB signal is taken directly
from the output of the El9110 and is ready for the output
device. The Common Mode Decoder Circuit receives the
common mode signals directly from each of the three
EL9110's common mode output pin, decodes and transmits
Proper Layout Technique
A critical concern with any PCB layout is the establishment
of a “healthy” ground plane. It is imperative to provide
ground planes terminated close to inputs to minimize input
capacitance. Additionally, the ground plane can be
selectively removed from inputs to prevent load and supply
currents from flowing near the input nodes.
In general the following guidelines apply to all PCB layout:
• Keep all traces as short as possible.
• Keep power supply bypass components as close to the
chip as possible - extremely close.
H
and V
to the output device.
• Create a healthy ground with low impedance and
continuous ground pathways available to all grounded
components board-wide.
SYNC
SYNC
Sync Transmission
The EL4543 encodes H
and V signals onto the
SYNC
SYNC
• In high frequency applications on multi-level boards try to
keep one level of board with continuous ground plane and
minimum via cutouts - providing it is affordable.
common mode output of the differential video signals; Red,
Green and Blue respectively. Data Sheet Figure 8 clearly
illustrates that the sum of the common mode voltages results
in a fixed DC level with no AC content; thus eliminating EMI
interference.
• Provide extremely short loops from power pin to ground.
• If it is affordable, a ferrite bead is always of benefit to
isolate device from Power Supply noise and the rest of the
circuit from the noise of the device.
Output Drive Protection
The EL4543 has internal short circuit protection set typically
at 60mA. if the output is shorted for extended periods of time
the increased power dissipation will eventually destroy the
part. To realize maximum reliability the output current should
never exceed 60mA. The 50Ω series back load matching
resistor provides additional protection.
Power Dissipation Calculation
When switching at high speeds, or driving heavy loads, the
EL4543 drive capability is ultimately limited by the rise in die
temperature brought about by internal power dissipation. For
reliable operation die temperature must be kept below T
JMAX
(125°C). It is necessary to calculate the power dissipation for
a given application prior to selecting package type. Power
dissipation may be calculated:
Supply Voltage
While the EL4543 can be operated on ±5V split rails, single
supply 0V to 5V is the most common usage. It is very
important to note that the input logic thresholds are relative
to the negative supply pin, and therefore single supply,
ground referenced logic will not work when driving the
EL4543 on split rails. The amplifiers have an input common
mode range from 0V to 3.5V with a 0V to 5V supply. The
common mode output DC level range is a linear function of
the power supply, see Data Sheet Figures 15, 16, 17 &18.
The common mode input switching threshold as well as the
Enable/Disable input is a linear function of the supply
voltage, see Data Sheet Figure 1.
4
2
2
PD = (V × I ) × (C
× V × f) + (C × V
× f)
Σ
S
S
INT
S
L
OUT
1
where:
• V is the total power supply to the EL4543 (from V + to V -)
S
S
S
• V
is the swing on the output (V - V )
H L
OUT
• C is the load capacitance
L
• C
INT
is the internal load capacitance (80pF max)
• I is the quiescent supply current (40mA max)
S
Disable and Power Down
• f is frequency
The EL4543 provides an enable disable function which
powers down, logic input high, in 900ns and powers up, logic
input low, in 212ns. Disabled the amplifiers supply current is
reduced to 1.8mA (Positive Supply) and 0mA (Negative
Supply). Note that Enable/Disable threshold is a linear
function of the supply voltage levels. The Enable/Disable
threshold voltage level is compatible with standard
Having obtained the application's power dissipation, the
maximum junction temperature can be calculated:
T
= T
+ Θ × PD
MAX JA
JMAX
TTL/CMOS and referenced to the lowest supply potential.
FN7325.5
12
October 26, 2005
EL4543
where:
converted to differential mode signals with H
SYNC
and
encoded on the common-mode of the three
SYNC
V
• T
• T
is the maximum junction temperature (125°C)
JMAX
is the maximum ambient operating temperature
differential signals, respectively. The 50Ω output-terminated
EL4543 drives the differential RGB with sync encoded
common-mode to CAT-5 twisted pair cables. Note this
system, without signal frequency equalization, will
satisfactorily transmit along up to 200 feet of CAT-5 twisted-
pair. For longer cable lengths, frequency and gain
equalization to compensate for signal degradation is
recommended (EL9110) and a delay line technology
(EL9115) to adjust for phase mismatch between signals at
the receiving end.
MAX
• PD is the power dissipation calculated above
• θ is the thermal resistance, junction to ambient, of the
JA
application (package + PCB combination). Refer to the
Package Power Dissipation curves.
Application Circuit
Video Transmission Along CAT-5 Cable
VGA input RGB plus sync is connected with 75Ω termination
to the inputs of the EL4543. Single-ended RGB video is
EL4543 & EL9110 Sync Extraction
CAT1
CAT2
RJOUTA+
49.9
R32 75
1
2
EL4543 QSOP
24
23
22
21
20
19
18
17
16
15
14
13
EN
OUTA+
OUTA-
N.C.
Red Out Differential
RED
C34
0.1uf
INA+
INA-
N.C.
1
2
3
4
8
7
6
5
RJA+ 75
RJOUTA-
49.9
VS+
+VS
3
R31 75
_
1
2
GREEN
4
VS+
+VS
0.1uf
C35
3
4
5
6
7
8
5
_
VSYNC
HSYNC
N.C.
VS-
RVSYNC 1K
6
N.C.
RJOUTB+
49.9
9
1K
RHSYNC
VS-
RED
GREEN
10
11
12
13
14
15
1
C35a
200pF
7
OUTB+
OUTB-
N.C.
2
3
BLUE
Green Out Differential
EL8201IS
U3
4
5
6
7
R30
2K
8
R29
2K
INB+
INB-
RJOUTB-
49.9
RJB+ 75
9
8
INPUT
RJOUTC+
49.9
9
10
11
12
13
14
15
10
11
12
N.C.
OUTC+
OUTC-
N.C.
HSYNC
VSYNC
Blue Out Differential
INC+
INC-
BLUE
RJOUTC-
49.9
RJC+ 75
OUTPUT
UJ1
-VS
+VS
-VS
D10
DIODE
DIODE
D9
+VS
+VS
-VS
DIODE D12
DIODE D11
DIODE D2
DIODE D4
DIODE D1
+VS
-VS
D3
DIODE
-VS
+VS
D5
DIODE
DIODE D6
VCRTL
VadjBlu
+VS
-VS
C20
DIODE D7
D8
VadjRed
DIODE
VCRTL
1uf
VCRTL
C9
Green InDifferential
Red In Differential
Blue In Differential
R31
Rred4
3000
1uf
330
NL
C1
NL
NL
C12
C23
5
GREEN
RED
5
BLUE
R1
49.9
NL
R2
R15
49.9
NL
R16
R26
49.9
NL
R27
51
R21
51
R10
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
R14
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
51
R32
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
Ctrl-ref
Vctrl
Vinp
Vinm
Vsm
Cmout
Vgain
Logic-ref
Cmext
Vsp
Ctrl-ref
Vctrl
Vinp
Vinm
Vsm
Cmout
Vgain
Logic-ref
Cmext
Vsp
Ctrl-ref
Vctrl
Vinp
Vinm
Vsm
Cmout
Vgain
Logic-ref
Cmext
Vsp
R6 1K
R30 1K
R32 1K
Enbl
Vspo
Vout
Vsmo
0V
Enbl
Vspo
Vout
Vsmo
0V
Enbl
Vspo
Vout
Vsmo
0V
R5
R29
49.9
R31
49.9
+VS
+VS
49.9
51
R11
0.1uf
C31
0.1uf
C32
C13
0.1uf
51
R22
C24
51
1uf
C2 0.1uf
0.1uf
C33
R33
+VS
R3
49.9
R17
49.9
R28
49.9
NL
X2
NL
X2
NL
X2
NL
C3
NL
NL
R4
R18
R29
C14
C25
EL9110 BLUE C
EL9110 GREEN B
EL9110 RED A
R9
330
R20
330
R27
330
C17
0.1uf
C27
0.1uf
-VS
VGAN
VGAN
-VS
VGAN
-VS
INDUCTOR 1
5
R12
INDUCTOR3
5
INDUCTOR 5
5
C5
1uf
C16
1uf
C26
1uf
C7
1uf
C18
1uf
C19
0.1uf
C28
1uf
C29
0.1uf
R23
R28
C8
0.1uf
+VS
+VS
+VS
+VS
+VS
+VS
NL = Not Loaded
BANANA JACK
GND
+
R33
3.6K
C36
R34
R35
3.6K
C37
0.1uF
Inductor =Ferrite 68 Ohms
R39
4.7uf
3.6K
3.6K
BANANA JACK
-VS
+
C38
4.7uf
R36
1K Pot
C39
R40
R37
1K Pot
R38
1K Pot
VadjBlue
1K Pot
VGAN
VCRTL
0.1uF
VadjRed
-VS
BANANA JACK
FN7325.5
October 26, 2005
13
EL4543
compensation network can be manipulated to provide some
EL4543/EL5375/EL8201 CAT-5 RGB +
Sync Video Transmission System
measure of cable prop delay skew compensation for slight
differences in cable lengths between CAT-5 pairs. Cable
skew can best be done around the 300 ft range by under
compensating the shortest color pair (color on the left side of
a vertical line) and over compensate the longest color pair
(color on the right side of a vertical line). Around 450 ft only
the shortest color pair can be under compensated.
Introducing a low cost turn-key system for transmitting
component video over short to moderate CAT-5 cable
lengths (1 to 500 feet) with selectable cable loss and skew
compensation. Using only 3 of the 4 pairs in standard CAT-5
th
the 4 pair is available for audio, function control or data
transmission; an additional benefit.
The board for the driver and receiver should use strip lines
or strip line waveguides for the inputs and outputs of the
drivers and receivers. The 75Ω input and output strip lines
waveguide on 0.06 inch epoxy board with ground back plain
should be 0.016 inch wide with 0.01 inch space to ground
area around them. The diff pair strip line waveguides should
be two 0.045 inch 50Ω lines spaced 0.01 inch apart and
spaced 0.01 inch to ground area around them. This is a
general guide and size values may very for many reasons.
RGB video plus sync (5 channels) is received at the VGA
terminal and presented single ended to the EL4543. The
EL4543 converts single ended RGB into fully differential
signals on three twisted pairs. Sync is encoded on the three
RGB differential signals as differential common mode and
then drives the differential signals with encoded sync
through CAT-5 cable. The common mode of the signals is
extracted from the differential signals with a passive network
of resistors and passed to the EL8201 for sync decoding.
The differential signal is passed directly to the EL5375 where
it is amplified, converted back into single ended format.
Signal attenuation occurs in all transmission lines as a
function of increasing cable length; this application system
utilizes individual channel 2-pole compensation for cable
lengths of 150, 300 and 500 feet. Additionally, the
The receiver feedback and gain resistor network which goes
directly to the minus input should be connected very close
with minimal trace length and minimal capacitance to
ground. The ground plane on the backside of the board, in
back of these resistors and the minus input pin should be
removed as well.
Output +5V
R34
U2
Open
R35
1
24
23
22
21
R40
2K
REF1
INP1
INN1
NC
NC
FB1
0
2
R41
2K
C20
~4pF
3
OUT1
NC
R47
500
R48
1K
150 Feet Comp
300 Feet Comp
Output +5V
4
R36
R12
57
R13
57
Output +5V
R53 10K
C7 C8
Open
R55 3.9K
C9
68p
C5
0.1uF
R54
68K
R37
0
5
20
19
R56
33K
REF2
INP2
INN2
NC
VSP
VSN
NC
36p
10p
C10
22p
C6
0.1uF
6
R14
49.9
R43
2K
7
18Output -5V
Output +5V
R38
R21
1K
8
17
16
15
14
13
C2
0.1uF
FB2
Open
150 Feet Comp
R57 10K
300 Feet Comp
R59 3.9K
C21
Compensation Control Switch
On Off
R39
0
~4pF
R49
500
R50
1K
9
R44
2K
REF3
INP3
INN3
NC
OUT2
EN
R58
68K
1
2
3
4
5
6
12
11
10
9
8
7
C12
10p
C13
68p
C14
22p
R60
33K
C11
36p
10
11
12
FB3
R15
57
R16
57
SW DIP-6
OUT3
Red In
R6
49.9
R45
2K
R51
1K
R52
500
1
2
EL4543 QSOP
24
EN
OUTA+
OUTA-
N.C.
300 Feet Comp
150 Feet Comp
R63 10K
EL5375
R1
75
Red Out Differential
23
3.9K
R61
R64
68K
R17
49.9
INA+
INA-
N.C.
R62
33K
C15
68p
C18
10p
C16
22p
C17
36p
R7
49.9
C22
3
22
21
20
19
18
R46
2K
1
2
R63
75
~4pF
1
Input +5V
3
2
R22
1K
4
C3
0.1uF
75
4
VS+
R64
3
R65 75
5
4
C1
0.1uf
6
5
5
7
VSYNC
HSYNC
N.C.
VS-
6
8
R2
7
1K
9
8
6
10
11
12
13
14
15
N.C.
9
10
11
12
13
14
15
R3 1K
R8
49.9
7
OUTB+
OUTB-
N.C.
R66 75
R67 75
Green Out Differential
17
R18
55
R19
55
Green In
8
INB+
INB-
R9
R4
75
INPUT
49.9
C19
0.1uF
9
16
OUTPUT
R10
49.9
1
2
3
4
8
R20
49.9
VS+
10
11
12
15
N.C.
OUTC+
OUTC-
N.C.
Blue Out Differential
14
Output +5V
Blue In
7
6
5
_
INC+
INC-
R11
R5
75
C4
0.1uF
R23
1K
C4a
220pF
49.9
13
_
EL4543IU
VS-
U3
EL8201IS
Input +5V
Input -5V
JB1
JB2
-VS In
+VS In
Csup2
4.7uF
+
JP+
JUMPER
+
Ground
JUMPER
Csup1
4.7uF
JP-
JUMPER
JB3
GND
Output +5V
Output -5V
JB4
JB5
-VS Out
+VS Out
Csup4
4.7uF
+
Csup3
4.7uF
+
JB6
GND
OUTPUT
INPUT
FN7325.5
October 26, 2005
14
EL4543
QSOP Package Outline Drawing
FN7325.5
15
October 26, 2005
EL4543
QFN Package Outline Drawing
NOTE: The package drawings shown here may not be the latest version. To check the latest revision, please refer to the Intersil website at
http://www.intersil.com/design/packages/index.asp
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN7325.5
16
October 26, 2005
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