HGT1S3N60A4S [INTERSIL]
600V, SMPS Series N-Channel IGBT; 600V ，开关电源系列N沟道IGBT
| 型号： | HGT1S3N60A4S |
| 厂家： | 
Intersil |
| 描述： | 600V, SMPS Series N-Channel IGBT |
| 文件： | 总10页 (文件大小：159K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Data Sheet
January 2000
File Number 4825
600V, SMPS Series N-Channel IGBT
Features
The HGTD3N60A4S, HGT1S3N60A4S and the
• >100kHz Operation at 390V, 3A
• 200kHz Operation at 390V, 2.5A
• 600V Switching SOA Capability
HGTP3N60A4 are MOS gated high voltage switching
devices combining the best features of MOSFETs and
bipolar transistors. These devices have the high input
impedance of a MOSFET and the low on-state conduction
loss of a bipolar transistor. The much lower on-state voltage
o
• Typical Fall Time. . . . . . . . . . . . . . . . . 70ns at T = 125 C
J
o
o
• 12mJ E Capability
AS
drop varies only moderately between 25 C and 150 C.
• Low Conduction Loss
This IGBT is ideal for many high voltage switching
applications operating at high frequencies where low
conduction losses are essential. This device has been
optimized for high frequency switch mode power
supplies.
• Temperature Compensating SABER Model
www.intersil.com
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
Formerly Developmental Type TA49327.
Packaging
Ordering Information
JEDEC TO-252AA
PART NUMBER
HGTD3N60A4S
HGT1S3N60A4S
HGTP3N60A4
PACKAGE
BRAND
3N60A4
TO-252AA
COLLECTOR
(FLANGE)
TO-263AB
TO-220AB
3N60A4
3N60A4
G
E
NOTE: When ordering, use the entire part number. Add the suffix 9A
to obtain the TO-252AA or the TO-263AB in tape and reel, i.e.
HGT1S3N60A4S9A
JEDEC TO-263AB
Symbol
COLLECTOR
(FLANGE)
C
G
E
G
JEDEC TO-220AB
E
C
E
G
COLLECTOR
(FLANGE)
INTERSIL CORPORATION IGBT PRODUCT IS COVERED BY ONE OR MORE OF THE FOLLOWING U.S. PATENTS
4,364,073
4,598,461
4,682,195
4,803,533
4,888,627
4,417,385
4,605,948
4,684,413
4,809,045
4,890,143
4,430,792
4,620,211
4,694,313
4,809,047
4,901,127
4,443,931
4,631,564
4,717,679
4,810,665
4,904,609
4,466,176
4,639,754
4,743,952
4,823,176
4,933,740
4,516,143
4,639,762
4,783,690
4,837,606
4,963,951
4,532,534
4,641,162
4,794,432
4,860,080
4,969,027
4,587,713
4,644,637
4,801,986
4,883,767
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
1-888-INTERSIL or 321-724-7143 | Copyright © Intersil Corporation 1999
1
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
o
Absolute Maximum Ratings T = 25 C, Unless Otherwise Specified
C
ALL TYPES
UNITS
Collector to Emitter Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . BV
600
V
CES
Collector Current Continuous
o
At T = 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
17
8
A
A
A
V
V
C25
o
At T = 110 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
C
C110
Collector Current Pulsed (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
40
CM
GES
GEM
Gate to Emitter Voltage Continuous . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
±20
Gate to Emitter Voltage Pulsed . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
o
±30
Switching Safe Operating Area at T = 150 C, Figure 2 . . . . . . . . . . . . . . . . . . . . . . . .SSOA
J
15A at 600V
12mJ at 3A
70
o
Single Pulse Avalanche Energy at T = 25 C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . E
C
AS
o
Power Dissipation Total at T = 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
C
W
D
o
o
Power Dissipation Derating T > 25 C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.56
W/ C
C
o
Operating and Storage Junction Temperature Range. . . . . . . . . . . . . . . . . . . . . . . T , T
J
-55 to 150
C
STG
Maximum Lead Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
Package Body for 10s, See Tech Brief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
o
300
260
C
C
L
o
PKG
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. Pulse width limited by maximum junction temperature.
o
Electrical Specifications T = 25 C, Unless Otherwise Specified
J
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
-
UNITS
V
Collector to Emitter Breakdown Voltage
Emitter to Collector Breakdown Voltage
Collector to Emitter Leakage Current
BV
BV
I
I
= 250µA, V
= 0V
600
-
CES
ECS
C
GE
= 10mA, V
= 600V
= 0V
15
-
-
-
V
C
GE
o
I
V
T = 25 C
J
-
-
250
2.0
2.7
2.2
7.0
±250
-
µA
mA
V
CES
CE
o
T = 125 C
J
-
o
Collector to Emitter Saturation Voltage
V
I
= 3A,
T = 25 C
J
-
2.0
1.6
6.1
-
CE(SAT)
C
V
= 15V
GE
o
T = 125 C
-
V
J
Gate to Emitter Threshold Voltage
Gate to Emitter Leakage Current
Switching SOA
V
I
= 250µA, V
= 600V
4.5
-
V
GE(TH)
C CE
I
V
= ±20V
nA
A
GES
GE
o
SSOA
T = 150 C, R = 50Ω, V
= 15V
15
-
J
G
GE
L = 200µH, V = 600V
CE
Pulsed Avalanche Energy
Gate to Emitter Plateau Voltage
On-State Gate Charge
E
I
I
I
= 3A, L = 2.7mH
12
-
-
-
-
mJ
V
AS
CE
V
= 3A, V = 300V
CE
8.8
21
26
6
GEP
C
C
Q
= 3A,
= 300V
V
= 15V
-
25
32
-
nC
nC
ns
ns
ns
ns
µJ
µJ
µJ
g(ON)
GE
V
CE
V
= 20V
o
-
GE
Current Turn-On Delay Time
Current Rise Time
t
IGBT and Diode at T = 25 C
-
d(ON)I
J
I
= 3A
CE
t
-
11
73
47
37
55
25
-
rI
d(OFF)I
V
V
R
= 390V
= 15V
CE
GE
Current Turn-Off Delay Time
Current Fall Time
t
-
-
= 50Ω
G
t
-
-
fI
L = 1mH
Test Circuit - Figure 20
Turn-On Energy (Note 3)
Turn-On Energy (Note 3)
Turn-Off Energy (Note 2)
E
E
E
-
-
ON1
ON2
OFF
-
70
35
-
2
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
o
Electrical Specifications T = 25 C, Unless Otherwise Specified (Continued)
J
PARAMETER
Current Turn-On Delay Time
Current Rise Time
SYMBOL
TEST CONDITIONS
MIN
TYP
5.5
12
110
70
37
90
50
-
MAX
8
UNITS
ns
o
t
IGBT and Diode at T = 125 C
-
-
-
-
-
-
-
-
d(ON)I
J
I
V
V
R
= 3A
CE
t
15
ns
rI
= 390V
= 15V
= 50Ω
CE
Current Turn-Off Delay Time
Current Fall Time
t
165
100
-
ns
GE
d(OFF)I
G
t
ns
fI
L = 1mH
Test Circuit - Figure 20
Turn-On Energy (Note 3)
Turn-On Energy (Note 3)
Turn-Off Energy (Note 2)
E
E
E
µJ
ON1
ON2
OFF
100
80
µJ
µJ
o
Thermal Resistance Junction To Case
NOTES:
R
1.8
C/W
θJC
2. Turn-Off Energy Loss (E
) is defined as the integral of the instantaneous power loss starting at the trailing edge of the input pulse and ending
OFF
at the point where the collector current equals zero (I = 0A). All devices were tested per JEDEC Standard No. 24-1 Method for Measurement
CE
of Power Device Turn-Off Switching Loss. This test method produces the true total Turn-Off Energy Loss.
3. Values for two Turn-On loss conditions are shown for the convenience of the circuit designer. E
is the turn-on loss of the IGBT only. E
ON2
ON1
is the turn-on loss when a typical diode is used in the test circuit and the diode is at the same T as the IGBT. The diode type is specified in
J
Figure 20.
Typical Performance Curves Unless Otherwise Specified
20
16
12
8
20
16
12
8
o
V
= 15V
T
= 150 C, R = 50Ω, V = 15V, L = 200µH
GE
GE
J
G
4
4
0
0
25
50
75
100
125
150
0
100
200
300
400
500
600
700
o
T
, CASE TEMPERATURE ( C)
C
V
, COLLECTOR TO EMITTER VOLTAGE (V)
CE
FIGURE 1. DC COLLECTOR CURRENT vs CASE
TEMPERATURE
FIGURE 2. MINIMUM SWITCHING SAFE OPERATING AREA
600
20
18
16
14
12
10
8
64
56
48
T
V
GE
o
C
V
= 390V, R = 50Ω, T = 125 C
CE
G
J
o
75 C
15V
t
SC
300
200
40
32
24
I
SC
f
f
= 0.05 / (t
d(OFF)I
+ t
)
MAX1
d(ON)I
+ E
= (P - P ) / (E
)
MAX2
D
C
ON2
OFF
100
50
P
= CONDUCTION DISSIPATION
16
8
C
(DUTY FACTOR = 50%)
o
6
R
= 1.8 C/W, SEE NOTES
o
ØJC
T
= 125 C, R = 50Ω, L = 1mH, V
= 390V
J
G
CE
3
4
0
15
1
2
4
5
6
10
11
12
13
14
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
V
, GATE TO EMITTER VOLTAGE (V)
GE
FIGURE 3. OPERATING FREQUENCY vs COLLECTOR TO
EMITTER CURRENT
FIGURE 4. SHORT CIRCUIT WITHSTAND TIME
3
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Typical Performance Curves Unless Otherwise Specified (Continued)
20
16
12
8
20
16
12
8
DUTY CYCLE < 0.5%, V
= 12V
PULSE DURATION = 250µs
GE
DUTY CYCLE < 0.5%, V
= 15V
PULSE DURATION = 250µs
GE
o
T
= 150 C
J
o
o
T
= 125 C
T
= 125 C
J
J
o
T
= 150 C
J
4
4
o
o
T
= 25 C
J
T
= 25 C
J
0
0
0
1
2
3
4
0
1
2
3
4
5
V
, COLLECTOR TO EMITTER VOLTAGE (V)
V
, COLLECTOR TO EMITTER VOLTAGE (V)
CE
CE
FIGURE 5. COLLECTOR TO EMITTER ON-STATE VOLTAGE
FIGURE 6. COLLECTOR TO EMITTER ON-STATE VOLTAGE
140
240
R
= 50Ω, L = 1mH, V
= 390V
CE
R
T
= 50Ω, L = 1mH, V
= 390V
G
G
CE
120
100
80
60
40
20
0
200
160
120
80
o
T
= 125 C, V
= 12V, V = 15V
GE
J
GE
o
= 125 C, V
= 12V OR 15V
J
GE
40
o
= 25 C, V
T
= 12V OR 15V
5
J
GE
o
T
= 25 C, V
= 12V, V
= 15V
GE
J
GE
0
1
2
3
4
5
6
1
2
3
4
6
I
, COLLECTOR TO EMITTER CURRENT (A)
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
CE
FIGURE 7. TURN-ON ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
FIGURE 8. TURN-OFF ENERGY LOSS vs COLLECTOR TO
EMITTER CURRENT
16
32
R
= 50Ω, L = 1mH, V
= 390V
CE
R
= 50Ω, L = 1mH, V
= 390V
G
G
CE
o
28
24
20
16
12
8
12
8
o
T
= 25 C OR T = 125 C, V
= 12V
GE
J
J
o
o
T
= 25 C, T = 125 C, V
= 12V
= 15V
J
J
GE
GE
o
o
T
= 25 C, T = 125 C, V
J
J
4
o
o
T
= 25 C OR T = 125 C, V
= 15V
J
J
GE
0
4
1
1
2
3
4
5
6
1
2
3
4
5
6
I
, COLLECTOR TO EMITTER CURRENT (A)
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
CE
FIGURE 9. TURN-ON DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 10. TURN-ON RISE TIME vs COLLECTOR TO
EMITTER CURRENT
4
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Typical Performance Curves Unless Otherwise Specified (Continued)
112
104
96
96
88
80
72
64
56
48
40
o
R
= 50Ω, L = 1mH, V
= 390V
CE
G
V
= 15V, T = 125 C
J
GE
o
T
= 125 C, V
GE
= 12V OR 15V
J
o
V
= 12V, T = 125 C
J
GE
88
o
V
= 15V, T = 25 C
J
GE
80
72
o
V
= 12V, T = 25 C
J
GE
64
o
56
T
= 25 C, V
= 12V OR 15V
5
J
GE
R
= 50Ω, L = 1mH,
V
= 390V
G
CE
48
1
2
3
4
6
1
2
3
4
5
6
I
, COLLECTOR TO EMITTER CURRENT (A)
I
, COLLECTOR TO EMITTER CURRENT (A)
CE
CE
FIGURE 11. TURN-OFF DELAY TIME vs COLLECTOR TO
EMITTER CURRENT
FIGURE 12. FALL TIME vs COLLECTOR TO EMITTER
CURRENT
16
20
o
I
= 1mA, R = 100Ω, T = 25 C
G(REF)
L
J
DUTY CYCLE < 0.5%, V
= 10V
CE
PULSE DURATION = 250µs
14
12
10
8
16
12
8
V
= 600V
CE
V
= 200V
V
= 400V
CE
CE
6
o
T
= 25 C
J
4
4
o
o
T
= 125 C
T
= -55 C
J
J
2
0
0
4
6
8
10
12
14
0
4
8
12
Q , GATE CHARGE (nC)
G
16
20
24
28
V
, GATE TO EMITTER VOLTAGE (V)
GE
FIGURE 13. TRANSFER CHARACTERISTIC
FIGURE 14. GATE CHARGE WAVEFORMS
250
200
150
100
50
1000
R
= 50Ω, L = 1mH, V
= 390V, V = 15V
GE
o
G
CE
T
= 125 C, L = 1mH, V
= 390V, V = 15V
GE
J
CE
E
= E
+ E
ON2
TOTAL
OFF
E
= E
+ E
ON2 OFF
TOTAL
I
= 4.5A
CE
I
= 4.5A
CE
I
= 3A
CE
I
I
= 3A
CE
CE
100
30
I
= 1.5A
CE
= 1.5A
0
3
10
100
, GATE RESISTANCE (Ω)
1000
25
50
75
100
125
150
o
R
T
, CASE TEMPERATURE ( C)
G
C
FIGURE 15. TOTAL SWITCHING LOSS vs CASE
TEMPERATURE
FIGURE 16. TOTAL SWITCHING LOSS vs GATE RESISTANCE
5
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Typical Performance Curves Unless Otherwise Specified (Continued)
700
600
500
400
300
200
100
0
2.7
2.6
2.5
2.4
2.3
2.2
2.1
2.0
o
FREQUENCY = 1MHz
DUTY CYCLE < 0.5%, T = 25 C
J
PULSE DURATION = 250µs,
I
= 4.5A
CE
C
C
IES
I
= 3A
CE
RES
I
= 1.5A
C
CE
OES
0
20
40
60
80
100
8
10
12
14
16
V
, COLLECTOR TO EMITTER VOLTAGE (V)
V
, GATE TO EMITTER VOLTAGE (V)
CE
GE
FIGURE 17. CAPACITANCE vs COLLECTOR TO EMITTER
VOLTAGE
FIGURE 18. COLLECTOR TO EMITTER ON-STATE VOLTAGE
vs GATE TO EMITTER VOLTAGE
0
10
0.5
0.2
0.1
-1
10
10
t
1
0.05
P
D
0.02
0.01
t
2
DUTY FACTOR, D = t / t
PEAK T = (P X Z
1
2
X R
-2
) + T
qJC C
J
D
qJC
SINGLE PULSE
-5
-4
-3
10
-2
10
-1
10
0
10
10
10
t , RECTANGULAR PULSE DURATION (s)
1
FIGURE 19. IGBT NORMALIZED TRANSIENT THERMAL RESPONSE, JUNCTION TO CASE
6
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
Test Circuit and Waveforms
HGTP3N60A4D
DIODE TA49369
V
GE
90%
10%
E
ON2
E
L = 1mH
DUT
OFF
I
I
CE
CE
R
= 50Ω
G
90%
10%
V
+
CE
V
= 390V
t
DD
d(ON)I
-
t
fI
t
rI
t
d(OFF)I
FIGURE 20. INDUCTIVE SWITCHING TEST CIRCUIT
FIGURE 21. SWITCHING TEST WAVEFORMS
Handling Precautions for IGBTs
Operating Frequency Information
Insulated Gate Bipolar Transistors are susceptible to gate-
insulation damage by the electrostatic discharge of energy
through the devices. When handling these devices, care
should be exercised to assure that the static charge built in
the handler’s body capacitance is not discharged through
the device. With proper handling and application procedures,
however, IGBTs are currently being extensively used in
production by numerous equipment manufacturers in
military, industrial and consumer applications, with virtually
no damage problems due to electrostatic discharge. IGBTs
can be handled safely if the following basic precautions are
taken:
Operating frequency information for a typical device
(Figure 3) is presented as a guide for estimating device
performance for a specific application. Other typical
frequency vs collector current (I ) plots are possible using
CE
the information shown for a typical unit in Figures 6, 7, 8, 9
and 11. The operating frequency plot (Figure 3) of a typical
device shows f
or f
; whichever is smaller at each
MAX1
MAX2
point. The information is based on measurements of a
typical device and is bounded by the maximum rated
junction temperature.
f
is defined by f
MAX1
= 0.05/(t ).
+ t
MAX1
d(OFF)I d(ON)I
Deadtime (the denominator) has been arbitrarily held to 10%
of the on-state time for a 50% duty factor. Other definitions
1. Prior to assembly into a circuit, all leads should be kept
shorted together either by the use of metal shorting
springs or by the insertion into conductive material such
as “ECCOSORBD™ LD26” or equivalent.
are possible. t
and t
are defined in Figure 21.
d(OFF)I
d(ON)I
Device turn-off delay can establish an additional frequency
limiting condition for an application other than T
.
JM
2. When devices are removed by hand from their carriers,
the hand being used should be grounded by any suitable
means - for example, with a metallic wristband.
f
is defined by f
MAX2
= (P - P )/(E
OFF
+ E
). The
ON2
MAX2
D
C
allowable dissipation (P ) is defined by P = (T - T )/R
The sum of device switching and conduction losses must not
exceed P . A 50% duty factor was used (Figure 3) and the
.
D
D
JM θJC
C
3. Tips of soldering irons should be grounded.
D
4. Devices should never be inserted into or removed from
circuits with power on.
conduction losses (P ) are approximated by P = (V
x
C
C
CE
I
)/2.
CE
5. Gate Voltage Rating - Never exceed the gate-voltage
E
and E are defined in the switching waveforms
OFF
rating of V
. Exceeding the rated V can result in
ON2
GEM
GE
permanent damage to the oxide layer in the gate region.
shown in Figure 21. E
is the integral of the
ON2
instantaneous power loss (I
x V ) during turn-on and
6. Gate Termination - The gates of these devices are
essentially capacitors. Circuits that leave the gate open-
circuited or floating should be avoided. These conditions
can result in turn-on of the device due to voltage buildup
on the input capacitor due to leakage currents or pickup.
CE
CE
E
V
is the integral of the instantaneous power loss (I x
CE
OFF
) during turn-off. All tail losses are included in the
CE
calculation for E
; i.e., the collector current equals zero
OFF
(I
= 0).
CE
7. Gate Protection - These devices do not have an internal
monolithic Zener diode from gate to emitter. If gate
protection is required an external Zener is recommended.
ECCOSORBD™ is a trademark of Emerson and Cumming, Inc.
7
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
TO-252AA
SURFACE MOUNT JEDEC TO-252AA PLASTIC PACKAGE
E
A
INCHES
MIN
MILLIMETERS
H
b2
1
A
SYMBOL
MAX
0.094
0.022
0.032
0.040
0.215
-
MIN
2.19
0.46
0.72
0.84
5.21
4.83
0.46
6.86
6.35
MAX
2.38
0.55
0.81
1.01
5.46
-
NOTES
1
A
0.086
0.018
0.028
0.033
0.205
0.190
0.018
0.270
0.250
-
SEATING
PLANE
A
4, 5
1
b
4, 5
D
b
b
b
4
1
2
3
4, 5
L
2
2
c
0.022
0.290
0.265
0.55
7.36
6.73
4, 5
L
1
3
D
E
e
-
-
b1
b
L
1
0.090 TYP
0.180 BSC
2.28 TYP
4.57 BSC
7
7
-
e
c
e1
e
1
J
1
H
J
0.035
0.045
0.045
0.115
-
0.89
1.14
1.14
2.92
-
1
0.265
(6.7)
TERM. 4
0.040
0.100
0.020
0.025
0.170
1.02
2.54
0.51
0.64
4.32
-
1
L
-
L
4, 6
3
2
1
2
3
L
L
L
0.040
-
1.01
-
3
0.265 (6.7)
b3
NOTES:
1. These dimensions are within allowable dimensions of Rev. B of
JEDEC TO-252AA outline dated 9-88.
0.070 (1.8)
2. L and b dimensions establish a minimum mounting surface for
3
3
terminal 4.
0.118 (3.0)
3. Solder finish uncontrolled in this area.
4. Dimension (without solder).
BACK VIEW
0.063 (1.6) TYP
0.090 (2.3) TYP
5. Add typically 0.002 inches (0.05mm) for solder plating.
6. L is the terminal length for soldering.
1
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
7. Position of lead to be measured 0.090 inches (2.28mm) from bottom
of dimension D.
8. Controlling dimension: Inch.
9. Revision 9 dated 5-99.
1.5mm
4.0mm
DIA. HOLE
USER DIRECTION OF FEED
1.75mm
2.0mm
C
L
TO-252AA
16mm TAPE AND REEL
16mm
8.0mm
COVER TAPE
22.4mm
13mm
50mm
330mm
GENERAL INFORMATION
1. 2500 PIECES PER REEL.
16.4mm
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
8
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
TO-263AB SURFACE MOUNT JEDEC TO-263AB PLASTIC PACKAGE
E
A
INCHES
MIN
MILLIMETERS
A
1
SYMBOL
MAX
0.180
0.052
0.034
0.055
-
MIN
4.32
MAX
4.57
1.32
0.86
1.39
-
NOTES
H
1
A
0.170
0.048
0.030
0.045
0.310
0.018
0.405
0.395
-
4, 5
4, 5
4, 5
2
TERM. 4
A
1.22
1
b
0.77
D
L
b
b
1.15
1
2
7.88
L
2
c
0.022
0.425
0.405
0.46
0.55
10.79
10.28
4, 5
-
L
1
D
E
e
10.29
10.04
-
1
3
0.100 TYP
0.200 BSC
2.54 TYP
5.08 BSC
7
b
b1
c
e
e
7
1
J
1
e1
H
0.045
0.055
0.105
0.195
0.110
0.070
-
1.15
1.39
2.66
4.95
2.79
1.77
-
-
1
0.450
(11.43)
TERM. 4
J
0.095
0.175
0.090
0.050
0.315
2.42
4.45
2.29
1.27
8.01
-
1
L
-
L
L
L
4, 6
3
1
2
3
L
3
0.350
(8.89)
2
b
2
0.700
(17.78)
NOTES:
1. These dimensions are within allowable dimensions of Rev. C of
JEDEC TO-263AB outline dated 2-92.
2. L and b dimensions established a minimum mounting surface
3
2
0.150
(3.81)
for terminal 4.
3. Solder finish uncontrolled in this area.
4. Dimension (without solder).
3
1
0.080 TYP (2.03)
0.062 TYP (1.58)
5. Add typically 0.002 inches (0.05mm) for solder plating.
6. L is the terminal length for soldering.
1
7. Position of lead to be measured 0.120 inches (3.05mm) from bottom
of dimension D.
MINIMUM PAD SIZE RECOMMENDED FOR
SURFACE-MOUNTED APPLICATIONS
8. Controlling dimension: Inch.
9. Revision 10 dated 5-99.
4.0mm
1.5mm
1.75mm
DIA. HOLE
USER DIRECTION OF FEED
2.0mm
C
TO-263AB
24mm TAPE AND REEL
L
24mm
16mm
COVER TAPE
40mm MIN.
ACCESS HOLE
30.4mm
13mm
330mm
100mm
GENERAL INFORMATION
1. 800 PIECES PER REEL.
2. ORDER IN MULTIPLES OF FULL REELS ONLY.
3. MEETS EIA-481 REVISION "A" SPECIFICATIONS.
24.4mm
9
HGTD3N60A4S, HGT1S3N60A4S, HGTP3N60A4
TO-220AB
3 LEAD JEDEC TO-220AB PLASTIC PACKAGE
A
INCHES
MIN
MILLIMETERS
E
ØP
SYMBOL
MAX
0.180
0.052
0.034
0.055
0.019
0.610
0.160
0.410
0.030
MIN
4.32
1.22
0.77
1.15
0.36
14.99
-
MAX
4.57
NOTES
A
1
A
0.170
0.048
0.030
0.045
0.014
0.590
-
-
Q
H
1
A
1.32
-
1
b
0.86
3, 4
TERM. 4
D
b
1.39
2, 3
1
o
45
E
1
c
0.48
2, 3, 4
D
1
D
15.49
4.06
-
-
L
1
D
1
b1
b
E
0.395
-
10.04
-
10.41
0.76
-
L
E
-
c
1
e
0.100 TYP
0.200 BSC
0.235
2.54 TYP
5.08 BSC
5
5
-
o
60
e
1
2
e
3
1
J
1
H
0.255
0.110
0.550
0.150
0.153
0.112
5.97
6.47
2.79
13.97
3.81
3.88
2.84
1
1
e1
J
0.100
0.530
0.130
0.149
0.102
2.54
13.47
3.31
6
-
L
L
2
-
1
ØP
Q
3.79
2.60
-
NOTES:
1. These dimensions are within allowable dimensions of Rev. J of
JEDEC TO-220AB outline dated 3-24-87.
2. Lead dimension and finish uncontrolled in L .
1
3. Lead dimension (without solder).
4. Add typically 0.002 inches (0.05mm) for solder coating.
5. Position of lead to be measured 0.250 inches (6.35mm) from bot-
tom of dimension D.
6. Position of lead to be measured 0.100 inches (2.54mm) from bot-
tom of dimension D.
7. Controlling dimension: Inch.
8. Revision 2 dated 7-97.
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time with-
out notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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FAX: (321) 724-7240
10
相关型号：
HGT1S3N60A4S9A
Insulated Gate Bipolar Transistor, 17A I(C), 600V V(BR)CES, N-Channel, TO-263AB
FAIRCHILD
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