ISL28271INEVAL1Z [INTERSIL]
Dual Micropower, Single Supply, Rail-to- Rail Input and Output (RRIO) Instrumentation Amplifier; 双微功耗，单电源，轨到轨输入和输出（ RRIO ）仪表放大器
| 型号： | ISL28271INEVAL1Z |
| 厂家： | 
Intersil |
| 描述： | Dual Micropower, Single Supply, Rail-to- Rail Input and Output (RRIO) Instrumentation Amplifier |
| 文件： | 总14页 (文件大小：688K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
ISL28271, ISL28272
®
Data Sheet
August 17, 2007
FN6390.2
Dual Micropower, Single Supply, Rail-to-
Rail Input and Output (RRIO)
Instrumentation Amplifier
Features
• 120µA typical supply current for both channels
• 30pA max input bias current
The ISL28271 and ISL28272 are dual micropower
instrumentation amplifiers (in-amps) optimized for single
supply operation over the +2.4V to +5.5V range.
• 100dB CMRR, PSRR
• 0.7µV/°C offset voltage temperature coefficient
• 180kHz 3dB Bandwidth - ISL28271
• 100kHz 3dB Bandwidth - ISL28272
• 0.5V/µs slew rate
Both devices feature an Input Range Enhancement Circuit
(IREC) which maintains CMRR performance for input
voltages equal to the positive and negative supply rails. The
input signal is capable of swinging 10% above the positive
supply rail and to 100mV below the negative supply with only
a slight degradation of the CMRR performance. The output
operation is rail-to-rail.
• Single supply operation
• Rail-to-rail input and output (RRIO)
• Input is capable of swinging above V+ and below V-
(ground sensing)
The ISL28271 is compensated for a minimum gain of 10 or
more. For higher gain applications, the ISL28272 is
compensated for a minimum gain of 100. The in-amps have
CMOS input devices for maximum input common voltage
range. The amplifiers can be operated from one lithium cell
or two Ni-Cd batteries.
• 0.081%1 typical gain error - ISL28271
• -0.19%1 typical gain error - ISL28272
• Pb-free available (RoHS compliant)
Applications
Ordering Information
• Battery- or solar-powered systems
• Strain gauge
PART NUMBER
(Note)
PART
MARKING
PACKAGE
(Pb-free)
PKG. DWG. #
ISL28271FAZ*
ISL28272FAZ*
28271 FAZ
28272 FAZ
16 Ld QSOP MDP0040
16 Ld QSOP MDP0040
• Sensor signal conditioning
• Medical devices
ISL28271INEVAL1Z Evaluation Platform
ISL28272INEVAL1Z Evaluation Platform
• Industrial instrumentations
Related Literature
*Add “-T7” suffix for tape and reel. Please refer to TB347 for details
on reel specifications.
• AN1290, ISL2827xINEVAL1Z Evaluation Board User’s
Guide
NOTE: These Intersil Pb-free plastic packaged products employ
special Pb-free material sets; molding compounds/die attach
materials and 100% matte tin plate PLUS ANNEAL - e3 termination
finish, which is RoHS compliant and compatible with both SnPb and
Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed
the Pb-free requirements of IPC/JEDEC J STD-020.
• AN1298, Instrumentation Amplifier Application Note
Pinout
ISL28271, ISL28272
(16 LD QSOP)
TOP VIEW
NC
OUT_A
FB+_A
FB-_A
IN-_A
IN+_A
EN_A
V-
1
2
3
4
5
6
7
8
16 V+
15 OUT_B
14 FB+_B
13 FB-_B
12 IN-_B
11 IN+_B
10 EN_B
+ -
- +
9
NC
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright © Intersil Americas Inc. 2006, 2007. All Rights Reserved.
All other trademarks mentioned are the property of their respective owners.
ISL28271, ISL28272
Absolute Maximum Ratings (T = +25°C)
Thermal Information
A
Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V
Supply Turn-on Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/µs
Input Current (IN, FB) ISL28272 . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input Voltage (IN, FB) ISL28272 . . . . . . . . . . . . . . . 0.5V
Input Current (IN, FB) ISL28271 . . . . . . . . . . . . . . . . . . . . . . . . 5mA
Differential Input (IN, FB) Voltage ISL28271 . . . . . . . . . . . . . . . 1.0V
Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V
ESD Rating
Thermal Resistance
θ
(°C/W)
112
JA
16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . .
Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite
Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C
Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C
Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV
Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and
result in failures not covered by warranty.
IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests
are at the specified temperature and are pulsed tests, therefore: T = T = T
A
J
C
Electrical Specifications V = +5V, V = GND, V
= 1/2V , R = Open, T = +25°C, unless otherwise specified. Boldface limits apply
+ L A
over the operating temperature range, -40°C to +125°C.
+
-
FB+
MIN
MAX
PARAMETER
DESCRIPTION
CONDITIONS
(Note 1)
TYP
(Note 1)
UNIT
V
Input Offset Voltage
ISL28271
ISL28272
-600
-1200
±35
600
1200
µV
OS
-500
-750
±35
0.7
±5
500
750
µV
µV/°C
pA
TCV
Input Offset Voltage Temperature
Coefficient -40°C to +125°C
OS
I
Input Offset Current between IN+ and See graphs for extended temperature range
IN-, and between FB+ and FB- -40°C to +85°C
-30
-80
30
80
OS
I
Input Bias Current (IN+, IN-, FB+, and See graphs for extended temperature range
-30
±10
30
pA
B
FB- terminals)
-40°C to +85°C
ISL28271
ISL28272
ISL28271
ISL28272
ISL28271
ISL28272
-80
80
e
Input Noise Voltage
f = 0.1Hz to 10Hz
10
6
µV
µV
N
P-P
P-P
Input Noise Voltage Density
Input Noise Current Density
f = 1kHz
240
78
nV/√Hz
nV/√Hz
pA/√Hz
pA/√Hz
GΩ
o
i
f = 1kHz
0.92
0.2
1
N
o
R
V
Input Resistance
IN
Input Voltage Range
V
= 2.4V to 5.0V
0
V
V
IN
+
+
CMRR
Common Mode Rejection Ratio
ISL28271
V
= 0V to 5V
80
70
100
100
100
dB
CM
ISL28272
80
75
dB
dB
%
PSRR
Power Supply Rejection Ratio
Gain Error
V
= 2.4V to 5V
80
75
+
E
ISL28271
ISL28272
R
= 100kΩ to 2.5V
L
+0.081
-0.19
G
FN6390.2
August 17, 2007
2
ISL28271, ISL28272
Electrical Specifications V = +5V, V = GND, V
= 1/2V , R = Open, T = +25°C, unless otherwise specified. Boldface limits apply
over the operating temperature range, -40°C to +125°C. (Continued)
+
-
FB+
+
L
A
MIN
MAX
PARAMETER
DESCRIPTION
CONDITIONS
Output low, R = 100kΩ
(Note 1)
TYP
(Note 1)
UNIT
V
Maximum Voltage Swing
3
6
mV
OUT
L
30
Output low, R = 1kΩ
130
4.99
4.88
0.5
175
225
mV
V
L
Output high, R = 100kΩ
4.980
4.980
L
Output high, R = 1kΩ
4.85
4.80
V
L
SR
Slew Rate
R
= 1kΩ to GND
= 10kΩ
0.4
0.35
0.7
0.75
V/µs
L
-3db BW
-3dB Bandwidth
R
ISL28271
ISL28272
180
100
120
kHz
kHz
µA
L
I
Supply Current, Enabled
Supply Current, Disabled
Both A and B channels enabled, EN = V
156
S,EN
-
200
I
Both A and B channels disabled, EN = V
4
7
µA
S,DIS
+
9
V
EN Enable Pin High Level
EN Enable Pin Low Level
EN Input Current High
2
V
V
INH
V
0.8
INL
I
EN = V
0.8
26
1
1.3
µA
ENH
+
I
EN Input Current Low
EN = V
50
nA
ENL
-
100
V
Supply Operating Range
V+ to V- (Note 2)
2.4
5.5
V
SUPPLY
I
Short Circuit Output Current
V
= 5V, R = 10Ω
28
25
31
26
mA
SC+
+
L
I
Short Circuit Output Current
V
= 5V, R = 10Ω
24
mA
SC-
+
L
20
NOTE:
1. Parts are 100% tested at +25°C. Over temperature limits established by characterization and are not production tested.
2. V
= +5.25V max when V
= +V (device in disable state).
SUPPLY
ENL
FN6390.2
August 17, 2007
3
ISL28271, ISL28272
Typical Performance Curves
V
= +5V, V = GND, V
= 1/2V , R = Open, T = +25°C, unless otherwise specified.
+
-
FB+
+
L
A
70
90
V
V
= 5V
V
V
= 5V
CM
CM
GAIN = 1000
GAIN = 10,000
GAIN = 5,000
= 10mV
= 10mV
OUT
P-P
OUT
P-P
60
80
70
60
50
40
30
R
= 10k
L
GAIN = 500
R = 10k
L
GAIN = 200
GAIN = 100
GAIN = 50
50
40
30
20
10
GAIN = 2,000
GAIN = 1,000
GAIN = 500
GAIN = 20
GAIN = 10
GAIN = 200
GAIN = 100
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 2. ISL28272 FREQUENCY RESPONSE vs CLOSED
FIGURE 1. ISL28271 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN, V
= V
+
LOOP GAIN, V = V
+
= 5V
CM
CM
70
60
50
40
30
20
10
90
80
70
60
50
40
30
V
V
= 2.5V
CM
V
V
= 2.5V
CM
GAIN = 10,000
GAIN = 5,000
= 10mV
GAIN = 1000
GAIN = 500
= 10mV
OUT
P-P
OUT
P-P
R
= 10k
R
= 10k
L
L
GAIN = 200
GAIN = 100
GAIN = 50
GAIN = 2,000
GAIN = 1,000
GAIN = 500
GAIN = 20
GAIN = 10
GAIN = 200
GAIN = 100
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 4. ISL28272 FREQUENCY RESPONSE vs CLOSED
FIGURE 3. ISL28271 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN, V
= 1/2V
+
LOOP GAIN, V = 5V, V
+
= 1/2V
CM
CM
+
70
60
50
40
30
20
10
90
80
70
60
50
40
30
V
V
= +10mV
= 10mV
V
V
= +10mV
= 10mV
P-P
CM
OUT
CM
OUT
GAIN = 10,000
GAIN = 5,000
GAIN = 1000
GAIN = 500
P-P
R
= 10k
R = 10k
L
L
GAIN = 200
GAIN = 100
GAIN = 50
GAIN = 2,000
GAIN = 1,000
GAIN = 500
GAIN = 20
GAIN = 10
GAIN = 200
GAIN = 100
1
10
100
1k
10k
100k
1M
1
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 5. ISL28271 FREQUENCY RESPONSE vs CLOSED
FIGURE 6. ISL28272 FREQUENCY RESPONSE vs CLOSED
LOOP GAIN, V = V
LOOP GAIN, V = 5V, V
= 10mV
+
CM
CM
-
FN6390.2
August 17, 2007
4
ISL28271, ISL28272
Typical Performance Curves
V
= +5V, V = GND, V
= 1/2V , R = Open, T = +25°C, unless otherwise specified.
FB+ + L A
+
-
45
25
40
35
30
25
20
15
10
5
V
= 5V
V
= 5V
+
+
20
V
= 2.4V
+
V
= 2.4V
+
15
10
A
R
C
= 100
= 10kΩ
= 10pF
V
L
L
F
F
G
A
R
C
= 10
= 10kΩ
= 10pF
V
L
L
F
F
G
5
0
R /R = 100
R
R
G
R /R = 10
R
R
G
= 10kΩ
= 1kΩ
= 100Ω
= 100Ω
0
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 7. ISL28271 FREQUENCY RESPONSE vs SUPPLY
VOLTAGE
FIGURE 8. ISL28272 FREQUENCY RESPONSE vs SUPPLY
VOLTAGE
50
25
470pF
820pF
2200pF
1200pF
45
20
15
10
5
40
220pF
100pF
820pF
35
A
= 100
A
= 10
V
V
R = 10kΩ
C
R /R = 100
R
R
R = 10kΩ
C
R /R = 10
R
R
56pF
= 10pF
= 10pF
L
L
30
25
F
F
G
G
F
F
G
G
= 10kΩ
= 1kΩ
= 100Ω
= 100Ω
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 10. ISL28272 FREQUENCY RESPONSE vs C
FIGURE 9. ISL28271 FREQUENCY RESPONSE vs C
LOAD
LOAD
90
120
100
80
80
70
60
50
40
60
A
= 10
V
A
= 100
30
V
40
20
0
20
10
0
-10
10
100
1k
10k
100k
1M
10
100
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 11. ISL28271 CMRR vs FREQUENCY
FIGURE 12. ISL28272 CMRR vs FREQUENCY
FN6390.2
August 17, 2007
5
ISL28271, ISL28272
Typical Performance Curves
V
= +5V, V = GND, V
= 1/2V , R = Open, T = +25°C, unless otherwise specified.
+
-
FB+
+
L
A
120
120
100
80
100
80
60
40
20
0
PSRR+
PSRR+
60
PSRR-
40
PSRR-
A
= 10
100
V
A
= 100
100
V
20
0
10
1k
10k
100k
1M
10
1k
10k
100k
1M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 13. ISL28271 PSRR vs FREQUENCY
FIGURE 14. ISL28272 PSRR vs FREQUENCY
700
1400
1200
1000
800
600
400
200
0
600
500
400
300
200
100
0
A
= 100
A
= 10
100
V
V
1
10
100
1k
10k
100k
1
10
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 15. ISL28271 INPUT VOLTAGE NOISE SPECTRAL
DENSITY
FIGURE 16. ISL28272 INPUT VOLTAGE NOISE SPECTRAL
DENSITY
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
6
5
4
3
2
A
= 10
V
A
= 100
V
0.4
0.2
0.0
1
0
10k
1
10
100
1k
100k
1
10
100
1k
10k
100k
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 18. ISL28272 INPUT CURRENT NOISE SPECTRAL
DENSITY
FIGURE 17. ISL28271 INPUT CURRENT NOISE SPECTRAL
DENSITY
FN6390.2
August 17, 2007
6
ISL28271, ISL28272
Typical Performance Curves
V
= +5V, V = GND, V
= 1/2V , R = Open, T = +25°C, unless otherwise specified.
FB+ + L A
+
-
TIME (1s/DIV)
TIME (1s/DIV)
FIGURE 19. ISL28271 0.1Hz TO 10Hz INPUT VOLTAGE NOISE,
GAIN = 10
FIGURE 20. ISL28272 0.1Hz TO 10Hz INPUT VOLTAGE NOISE,
GAIN = 100
160
n = 3000
MAX
n = 3000
190
170
150
130
110
90
MAX
150
140
130
MEDIAN
MEDIAN
120
MIN
110
100
90
MIN
80
70
50
-40
-20
0
20
40
60
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 22. ISL28272 SUPPLY CURRENT ENABLED vs
TEMPERATURE, V , V = ±2.5V, V = 0V
FIGURE 21. ISL28271 SUPPLY CURRENT ENABLED vs
TEMPERATURE, V , V = ±2.5V, V = 0V
+
-
IN
+
-
IN
5.0
4.5
4.0
3.5
3.0
2.5
7
6
5
4
3
2
1
0
n = 3000
n = 3000
MAX
MAX
MEDIAN
MIN
MEDIAN
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 23. ISL28271 SUPPLY CURRENT DISABLED vs
TEMPERATURE, V , V = ±2.5V, V = 0V
FIGURE 24. ISL28272 SUPPLY CURRENT DISABLED vs
TEMPERATURE, V , V = ±2.5V, V = 0V
+
-
IN
+
-
IN
FN6390.2
August 17, 2007
7
ISL28271, ISL28272
Typical Performance Curves
V
= +5V, V = GND, V
= 1/2V , R = Open, T = +25°C, unless otherwise specified.
+
-
FB+
+
L
190
170
150
130
110
90
A
160
n = 3000
n = 3000
150
140
MAX
MAX
130
120
110
100
90
MEDIAN
MEDIAN
MIN
MIN
80
70
-40
70
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 25. ISL28271 CMRR vs TEMPERATURE, V
TO -2.5V
= +2.5V
FIGURE 26. ISL28272 CMRR vs TEMPERATURE, V
TO -2.5V
= +2.5V
CM
CM
180
150
n = 3000
n = 3000
140
MAX
MAX
160
130
120
110
140
120
100
90
MEDIAN
MEDIAN
100
80
80
70
MIN
MIN
60
-40
60
-40
-20
0
20
40
60
80
100
120
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 28. ISL28272 PSRR vs TEMPERATURE, V , V = ±1.2V
FIGURE 27. ISL28271 PSRR vs TEMPERATURE, V , V = ±1.2V
+
-
+
-
TO ±2.5V
TO ±2.5V
4.91
4.90
4.89
4.88
4.87
4.86
4.85
4.84
4.91
4.90
4.89
4.88
4.87
4.86
4.85
4.84
n = 3000
n = 3000
MAX
MAX
MEDIAN
MEDIAN
MIN
40
MIN
-40
-20
0
20
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 29. ISL28271 V
HIGH vs TEMPERATURE, R = 1k,
L
FIGURE 30. ISL28272 V
HIGH vs TEMPERATURE, R = 1k,
L
OUT
V , V = ±2.5V
OUT
V , V = ±2.5V
+
-
+
-
FN6390.2
August 17, 2007
8
ISL28271, ISL28272
Typical Performance Curves
V
= +5V, V = GND, V
= 1/2V , R = Open, T = +25°C, unless otherwise specified.
+
-
FB+
+
L
A
4.9980
4.9975
4.9970
4.9965
4.9960
4.9955
4.9950
4.9980
n = 3000
n = 3000
4.9975
MEDIAN
MEDIAN
4.9970
MAX
MAX
4.9965
4.9960
MIN
MIN
4.9955
4.9950
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 32. ISL28272 V
OUT
HIGH vs TEMPERATURE,
FIGURE 31. ISL28271 V
HIGH vs TEMPERATURE,
OUT
= 100k, V , V = ±2.5V
R
= 100k, V , V = ±2.5V
R
L
+
-
L
+
-
180
170
160
150
140
130
120
110
100
90
170
160
150
140
130
120
110
100
90
n = 3000
n = 3000
MAX
MAX
MEDIAN
MEDIAN
MIN
20
MIN
80
-40
-20
0
20
40
60
80
100
120
-40
-20
0
40
60
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 33. ISL28271 V
LOW vs TEMPERATURE, R = 1k,
L
FIGURE 34. ISL28272 V
LOW vs TEMPERATURE, R = 1k,
L
OUT
OUT
V , V = ±2.5V
V , V = ±2.5V
+
-
+
-
6.0
5.8
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
6.0
5.8
5.6
5.4
5.2
5.0
4.8
4.6
4.4
4.2
4.0
n = 3000
n = 3000
MAX
MAX
MEDIAN
MEDIAN
MIN
60
MIN
-40
-20
0
20
40
60
80
100
120
-40
-20
0
20
40
80
100
120
TEMPERATURE (°C)
TEMPERATURE (°C)
FIGURE 35. ISL28271 V
LOW vs TEMPERATURE,
OUT
= 100k, V , V = ±2.5V
FIGURE 36. ISL28272 V
LOW vs TEMPERATURE,
OUT
= 100k, V , V = ±2.5V
R
L
+
-
R
L
+
-
FN6390.2
August 17, 2007
9
ISL28271, ISL28272
Pin Descriptions
ISL28271
ISL28272
EQUIVALENT
16 Ld QSOP 16 Ld QSOP
PIN NAME
CIRCUIT
PIN FUNCTION
2, 15
3, 14
2, 15
3, 14
OUT_A,
OUT_B
Circuit 3
Output Voltage. A complementary Class AB common-source output stage drives
the output of each channel. When disabled, the outputs are in a high impedance
state.
FB+_A,
FB+_B
Circuit 1A,
Circuit 1B
Positive Feedback high impedance terminals. ISL28272 input circuit is shown in
Circuit 1A, and the ISL28271 input circuit is shown in Circuit 1B.
ISL28271: to avoid offset drift, it is recommended that the terminals of the
ISL28271 are not overdriven beyond 1V and the input current must never
exceed 5mA.
4, 13
4, 13
FB-_A,
FB-_B
Circuit 1A,
Circuit 1B
Negative Feedback high impedance terminals. The FB- pins connect to an
external resistor divider to individually set the desired gain of the in-amp.
ISL28272 input circuit is shown in Circuit 1A, and the ISL28271 input circuit is
shown in Circuit 1B.
ISL28271: to avoid offset drift, it is recommended that the terminals of the
ISL28271 are not overdriven beyond 1V and the input current must never
exceed 5mA.
5, 12
6, 11
7, 10
5, 12
6, 11
7, 10
IN-_A,
IN-_B
Circuit 1A,
Circuit 1B
High impedance Inverting input terminals. Connect to the low side of the input
source signal. ISL28272 input circuit is shown in Circuit 1A, and the ISL28271
input circuit is shown in Circuit 1B.
ISL28271: to avoid offset drift, it is recommended that the terminals of the
ISL28271 are not overdriven beyond 1V and the input current must never
exceed 5mA.
IN+_A,
IN+_B
Circuit 1A,
Circuit 1B
High impedance Non-inverting input terminals. Connect to the high side of the
input source signal. ISL28272 input circuit is shown in Circuit 1A, and the
ISL28271 input circuit is shown in Circuit 1B.
ISL28271: to avoid offset drift, it is recommended that the terminals of the
ISL28271 are not overdriven beyond 1V and the input current must never
exceed 5mA.
EN_A,
EN_B
Circuit 2
Active LOW logic pins. When pulled above 2V, the corresponding channel turns
off and OUT is high impedance. A channel is enabled when pulled below 0.8V.
Built-in pull downs define each EN pin LOW when left floating.
16
8
16
8
V+
V-
Circuit 4
Circuit 4
Positive Supply terminal shared by all channels.
Negative Supply terminal shared by all channels. Grounded for single supply
operation.
1, 9
1, 9
NC
No Connect, pins can be left floating or grounded.
V
+
V
V
+
+
V
+
CAPACITIVELY
COUPLED
ESD CLAMP
IN+
FB+
IN-
FB-
LOGIC
PIN
OUT
V
-
V
-
V
-
V
-
CIRCUIT 1A
CIRCUIT 2
CIRCUIT 3
CIRCUIT 4
V
+
IN-
IN+
FB-
FB+
V
-
CIRCUIT 1B
FN6390.2
August 17, 2007
10
ISL28271, ISL28272
performance charts. IREC also cures the abrupt change and
even reverse polarity of the input bias current over the whole
range of input.
Application Information
Product Description
The ISL28271 and ISL28272 are dual channel micropower
instrumentation amplifiers (in-amps) which deliver rail-to-rail
input amplification and rail-to-rail output swing. The in-amps
also deliver excellent DC and AC specifications while
consuming only about 120µA for both channels. Because
the independent pair of feedback terminals set the gain and
adjust the output zero level, the ISL28271 and ISL28272
achieve high CMRR regardless of the tolerance of the gain
setting resistors. The ISL28271 is internally compensated for
a minimum gain of 10. The ISL28272 is internally
Output Stage and Output Voltage Range
A Class AB common-source output stage drives the output.
The pair of complementary MOSFET devices drive the
output VOUT to within a few millivolts of the supply rails. At a
100kΩ load, the PMOS sources current and pulls the output
up to 4mV below the positive supply. The NMOS sinks
current and pulls the output down to 4mV above the negative
supply, or ground in the case of a single supply operation.
The current sinking and sourcing capability are internally
limited to 31mA. When disabled, the outputs are in a high
impedance state.
compensated for a minimum gain of 100.
EN pins are available to independently enable or disable a
channel. When all channels are off, current consumption is
down to typically 4µA.
Gain Setting
VIN, the potential difference across IN+ and IN-, is replicated
(less the input offset voltage) across FB+ and FB-. The
function of the in-amp is to maintain the differential voltage
across FB- and FB+ equal to IN+ and IN-; (FB- - FB+) =
(IN+ - IN-). Consequently, the transfer function can be
derived. The in-amp gain is set by two external resistors, the
Input Protection
All input terminals and feedback terminals have internal ESD
protection diodes to both positive and negative supply rails,
limiting the input voltage to within one diode beyond the
supply rails. Input signals originating from low impedance
sources should have current limiting resistors in series with
the IN+ and IN- pins to prevent damaging currents during
power supply sequencing and other transient conditions.
The ISL28272 has additional back-to-back diodes across the
input terminals and also across the feedback terminals. If
overdriving the inputs is necessary, the external input current
must never exceed 5mA. External series resistors may be
used as an external protection to limit excessive external
voltage and current from damaging the inputs. On the other
hand, the ISL28271 has no clamps to limit the differential
voltage on the input terminals allowing higher differential
input voltages at lower gain applications. It is recommended
however, that the terminals of the ISL28271 are not
feedback resistor R , and the gain resistor R .
F
G
2.4V TO 5.5V
EN
IN+
IN-
V+
EN
IN+
+
-
IN-
VOUT
FB+
FB-
+
-
V-
VCM
ISL28271
ISL28272
RG
RF
overdriven beyond 1V to avoid offset drift.
Input Stage and Input Voltage Range
FIGURE 37. GAIN IS SET BY TWO EXTERNAL RESISTORS,
The input terminals (IN+ and IN-) of the in-amps are a single
differential pair of CMOS devices aided by an Input Range
Enhancement Circuit, IREC, to increase the headroom of
operation of the common-mode input voltage. The feedback
terminals (FB+ and FB-) also have a similar topology. As a
result, the input common-mode voltage range is rail-to-rail
regardless of the feedback terminal settings and regardless
of the gain settings. They are able to handle input voltages
that are at or slightly beyond the supply and ground sensing
making these in-amps well suited for single 5V down to 2.4V
supply systems.
R
AND R
F
G
VIN = IN+ – IN-
R
⎛
⎞
F
--------
(EQ. 1)
VOUT = 1 +
VIN
⎜
⎟
⎠
R
G
⎝
In Figure 37, the FB+ pin and one end of resistor RG are
connected to GND. With this configuration, Equation 1 is
only true for a positive swing in VIN; negative input swings
will be ignored because the output will be at ground.
Reference Connection
Unlike a three op amp in-amp realization, a finite series
resistance seen at the REF terminal does not degrade the
high CMRR performance eliminating the need for an
additional external buffer amplifier. Figure 38 uses the FB+
pin to provide a high impedance REF terminal.
The IREC enables rail-to-rail input amplification without the
problems usually associated with the dual differential stage
topology. The IREC ensures that there are no drastic
changes in offset voltage over the entire range of the input.
See Input Offset Voltage vs Common-Mode Input Voltage in
FN6390.2
August 17, 2007
11
ISL28271, ISL28272
2.4V TO 5.5V
V+
R
⎛
⎞
⎟
⎠
EN
F
--------
VOUT = 1 +
(VIN) + (VREF)
⎜
(EQ. 4)
R
G
⎝
IN+
A finite resistance R in series with the VREF source, adds
an output offset of VIN*(R /R ). As the series resistance R
approaches zero, Equation 3 is simplified to Equation 4 for
Figure 39. VOUT is simply shifted by an amount VREF.
EN
IN+
S
+
S
G
S
IN-
-
IN-
VOUT
ISL28271
V-
FB+
FB-
+
-
2.9V to 5.5V
External Resistor Mismatches
VCM
ISL28271
ISL28272
R1
Because of the independent pair of feedback terminals
REF
provided by the in-amps, the CMRR is not degraded by any
resistor mismatches. Hence, unlike a three op amp and
especially a two op amp in-amp realization, the ISL28271
and ISL28272 reduce the cost of external components by
allowing the use of 1% or more tolerance resistors without
sacrificing CMRR performance. The CMRR will be typically
110dB regardless of the tolerance of the resistors used.
Instead, a resistor mismatch results in a higher deviation
from the theoretical gain - Gain Error.
R2
RG
RF
FIGURE 38. GAIN SETTING AND REFERENCE CONNECTION
.
VIN = IN+ – IN-
R
R
F
R
G
⎛
⎞
⎟
⎠
⎛
⎞
⎟
⎠
F
--------
--------
(EQ. 2)
VOUT = 1 +
(VIN) + 1 +
(VREF)
⎜
⎜
R
G
⎝
⎝
Gain Error and Accuracy
The FB+ pin is used as a REF terminal to center or to adjust
the output. Because the FB+ pin is a high impedance input,
an economical resistor divider can be used to set the voltage
at the REF terminal without degrading or affecting the CMRR
performance. Any voltage applied to the REF terminal will
shift VOUT by VREF times the closed loop gain, which is set
The gain error indicated in the “Electrical Specifications”
table on page 2 is the inherent gain error alone. The gain
error specification listed does not include the gain error
contributed by the resistors. There is an additional gain error
due to the tolerance of the resistors used. The resulting non-
ideal transfer function effectively becomes:
by resistors R and R . See Figure 38.
F
G
R
⎛
⎞
⎟
⎠
F
--------
VOUT = 1 +
× [1 ± (E
+ E
+ E )] × VIN
RF G
(EQ. 5)
⎜
The FB+ pin can also be connected to the other end of
RG
R
G
⎝
resistor, R . See Figure 39. Keeping the basic concept that
G
the in-amp maintains constant differential voltage across the
input terminals and feedback terminals (FB- - FB+) =
(IN+ - IN-), the transfer function of Figure 39 can be derived.
Where:
E
E
E
= Tolerance of RG
= Tolerance of RF
RG
RF
G
2.4V TO 5.5V
EN
= Gain Error of the ISL28271
The term [1 - (E
RG
+E +E )] is the deviation from the
G
RF
theoretical gain. Thus, (E
IN+
+E +E ) is the total gain
RG
RF
G
V+
EN
IN+
IN-
+
-
error. For example, if 1% resistors are used, the total gain
error would be:
IN-
ISL28271
V-
VOUT
FB+
FB-
+
-
TotalGainError = ±(E
+ E
+ E (typical))
RF G
RG
VCM
TotalGainError = ±(0.01 + 0.01 + 0.005)= ±2.5%
ISL28271
ISL28272
RS
Disable/Power-Down
The ISL28271 and ISL28272 have an enable/disable pin for
each channel. They can be powered down to reduce the
supply current to typically 4µA when all channels are off.
When disabled, the corresponding output is in a high
impedance state. The active low EN pin has an internal pull
down and hence can be left floating and the in-amp enabled
by default. When the EN is connected to an external logic,
the in-amp will shutdown when EN pin is pulled above 2V,
and will power up when EN bar is pulled below 0.8V.
RG
RF
VREF
FIGURE 39. REFERENCE CONNECTION WITH AN AVAILABLE
VREF
VIN = IN+ – IN-
R
+ R
F
S
---------------------
VOUT = 1 +
+ VREF
(EQ. 3)
R
G
FN6390.2
August 17, 2007
12
ISL28271, ISL28272
Unused Channels
The ISL28271 and ISL28272 are Dual channel op amps. If
the application only requires one channel when using the
ISL28271 or ISL28272, the user must configure the unused
channel to prevent it from oscillating. The unused channel
will oscillate if the input and output pins are floating. This will
result in higher than expected supply currents and possible
noise injection into the channel being used. The proper way
to prevent this oscillation is to configure the feedback pins
(FB+, FB-) with the minimum gain stable values for the
amplifier with R and R resistors and tieing the input
F
G
terminals to ground (as shown in Figure 40).
IN+
+
IN-
-
FB+
+
FB-
-
RF
RG
FIGURE 40. PREVENTING OSCILLATIONS IN UNUSED
CHANNELS
FN6390.2
August 17, 2007
13
ISL28271, ISL28272
Quarter Size Outline Plastic Packages Family (QSOP)
A
MDP0040
QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY
D
(N/2)+1
N
INCHES
SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES
A
A1
A2
b
0.068
0.006
0.056
0.010
0.008
0.193
0.236
0.154
0.025
0.025
0.041
16
0.068
0.006
0.056
0.010
0.008
0.341
0.236
0.154
0.025
0.025
0.041
24
0.068
0.006
0.056
0.010
0.008
0.390
0.236
0.154
0.025
0.025
0.041
28
Max.
±0.002
±0.004
±0.002
±0.001
±0.004
±0.008
±0.004
Basic
-
PIN #1
I.D. MARK
E
E1
-
-
-
1
(N/2)
c
-
B
D
1, 3
0.010 C A B
E
-
e
E1
e
2, 3
H
-
C
SEATING
L
±0.009
Basic
-
PLANE
L1
N
-
0.007 C A B
b
0.004 C
Reference
-
Rev. F 2/07
L1
NOTES:
1. Plastic or metal protrusions of 0.006” maximum per side are not
included.
A
2. Plastic interlead protrusions of 0.010” maximum per side are not
included.
c
SEE DETAIL "X"
3. Dimensions “D” and “E1” are measured at Datum Plane “H”.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
0.010
A2
GAUGE
PLANE
L
A1
4°±4°
DETAIL X
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN6390.2
August 17, 2007
14
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