ISL28273_技术文档

ISL28270, ISL28273, ISL28470

®

Data Sheet

April 13, 2007

FN6260.2

Micropower, Single Supply, Rail-to-Rail

Input and Output (RRIO) Instrumentation

Amplifier

Features

• 60µA supply current per channel ISL28270

• 150µV max offset voltage

The ISL28270 and ISL28273 are dual channel micropower

instrumentation amplifiers (in-amps) and the ISL28470 is a

Quad-channel in-amp optimized for low 2.4V to 5V single

supplies.

• 2nA max input bias current ISL28270

• 110dB CMRR, PSRR

• 0.7µV/°C offset voltage temperature coefficient

• 240kHz -3dB bandwidth (G = 100) ISL28270, ISL28470

• 230kHz -3dB bandwidth (G = 10) ISL28273

• 0.5V/µs slew rate

All three devices feature an Input Range Enhancement

Circuit (IREC) which maintains CMRR performance for input

voltages equal to the positive supply and down to 50mV

above the negative supply rail. The input signal is capable of

swinging above the positive supply rail and to 10mV above

the negative supply with only a slight degradation of the

CMRR performance. The output operation is rail to rail.

• Single supply operation

• Rail-to-rail input and output (RRIO)

The ISL28273 is compensated for a minimum gain of 10 or

more. For higher gain applications, the ISL28270 and

ISL28470 are compensated for a minimum gain of 100. The

in-amps have bipolar input devices for best offset and

excellent 1/f noise performance. The amplifiers can be

operated from one lithium cell or two Ni-Cd batteries.

• Input is capable of swinging above V+ and below V-

(ground sensing)

• Output sources and sinks ±29mA load current

• 0.5% gain error

• Pb-free plus anneal available (RoHS compliant)

Ordering Information

Applications

PART NUMBER

(Note)

PART

MARKING

TAPE & PACKAGE

REEL (Pb-Free)

PKG.

DWG. #

• Battery or solar-powered systems

• Strain gauge

ISL28270IAZ

(Note)

28270 IAZ

28273 FAZ

97/Tube 16 Ld QSOP MDP0040

(Pb-free)

• Sensor signal conditioning

• Medical devices

ISL28270IAZ-T13

(Note)

13”

16 Ld QSOP MDP0040

(1k pcs) (Pb-free)

• Industrial instrumentations

Coming Soon

ISL28273FAZ

(Note)

97/Tube 16 Ld QSOP MDP0040

(Pb-free)

Related Literature

• AN1290, ISL2827xINEVAL1Z Evaluation Board User’s

Guide

Coming Soon

ISL28273FAZ-T7

(Note)

28273 FAZ

7”

16 Ld QSOP MDP0040

(1k pcs) (Pb-free)

• AN1298, Instrumentation Amplifier Application Note

ISL28470FAZ

(Note)

ISL28470FAZ 48/Tube 28 Ld QSOP M28.15

(Pb-free)

ISL28470FAZ-T7

(Note)

ISL28470FAZ

7”

28 Ld QSOP M28.15

(1k pcs) (Pb-free)

ISL28270INEVAL1Z Evaluation Platform

(Note)

ISL28273INEVAL1Z Evaluation Platform

Coming Soon

Evaluation Platform

ISL28470EVAL1Z

NOTE: Intersil Pb-free plus anneal products employ special Pb-free

material sets; molding compounds/die attach materials and 100% matte

tin plate termination finish, which are RoHS compliant and compatible with

both SnPb and Pb-free soldering operations. Intersil Pb-free products are

MSL classified at Pb-free peak reflow temperatures that meet or exceed

the Pb-free requirements of IPC/JEDEC J STD-020.

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

1

All other trademarks mentioned are the property of their respective owners.

ISL28270, ISL28273, ISL28470

Pinouts

ISL28270, ISL28273

(16 LD QSOP)

TOP VIEW

ISL28470

(28 LD QSOP)

TOP VIEW

NC

OUT_A

FB+_A

FB-_A

IN-_A

IN+_A

EN_A

V-

1

2

3

16 V+

OUT_A

FB+_A

FB-_A

IN-_A

IN+_A

EN_A

V-

1

2

3

4

5

6

7

8

9

28 OUT_D

27 FB+_D

15 OUT_B

14 FB+_B

13 FB-_B

12 IN-_B

11 IN+_B

10 EN_B

+

-

+ -

26

25

FB-_D

IN-_D

+

-

+

4

5

6

7

8

24 IN+_D

23 EN_D

22 V-

9

NC

EN_B

IN+_B

21 EN_C

20 IN+_C

19 IN-_C

18 FB-_C

17 FB+_C

16 OUT_C

15 NC

IN-_B 10

FB-_B 11

FB+_B 12

OUT_B 13

NC 14

+ -

- +

FN6260.2

April 13, 2007

2

ISL28270, ISL28273, ISL28470

Absolute Maximum Ratings (T = +25°C)

Thermal Information

A

Supply Voltage. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.5V

Supply Turn On Voltage Slew Rate . . . . . . . . . . . . . . . . . . . . . 1V/μs

Input Current (IN, FB) ISL28270, ISL28470 . . . . . . . . . . . . . . . 5mA

Differential Input Voltage (IN, FB) ISL28270, ISL28470 . . . . . . 0.5V

Input Current (IN, FB) ISL28273 . . . . . . . . . . . . . . . . . . . . . . . . 5mA

Differential Input (IN, FB) Voltage ISL28273 . . . . . . . . . . . . . . . 1.0V

Input Voltage . . . . . . . . . . . . . . . . . . . . . . . . . V- - 0.5V to V+ + 0.5V

ESD Tolerance

Thermal Resistance

θ

(°C/W)

JA

16 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . .

28 Ld QSOP Package . . . . . . . . . . . . . . . . . . . . . . .

112

79

Output Short-Circuit Duration . . . . . . . . . . . . . . . . . . . . . . .Indefinite

Ambient Operating Temperature Range . . . . . . . . .-40°C to +125°C

Storage Temperature Range . . . . . . . . . . . . . . . . . .-65°C to +150°C

Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . +125°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3kV

Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .300V

CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the

device at these or any other conditions above those indicated in the operational sections of this specification is not implied.

IMPORTANT NOTE: All parameters having Min/Max specifications are guaranteed. Typical values are for information purposes only. Unless otherwise noted, all tests

are at the specified temperature and are pulsed tests, therefore: T = T = T

J

C

A

Electrical Specifications

V

= +5V, V = GND, V

M

= 1/2V , T = +25°C, unless otherwise specified. Boldface limits apply over the

+

CM

+

A

operating temperature range, -40°C to +125°C.

PARAMETER

DESCRIPTION

Input Offset Voltage

CONDITIONS

MIN

TYP

MAX

UNIT

V

ISL28270, ISL28470

-150

±35

150

µV

OS

-225

225

ISL28273

TBD

0.7

µV

µV/°C

nA

TCV

Input Offset Voltage Temperature

Coefficient

Temperature = -40°C to +125°C

OS

I

Input Offset Current between IN+ and ISL28270

IN-, and between FB+ and FB-

-1

-1.5

±0.25

1

1.5

OS

ISL28470

ISL28273

-1.5

-2.0

±0.25

1.5

2

nA

TBD

±0.5

nA

I

Input Bias Current (IN+, IN-, FB+, and ISL28270

FB- terminals)

-2.0

-2.5

2.0

2.5

B

ISL28470

ISL28273

-2.5

-3.0

±0.5

2.5

3.0

nA

TBD

3.5

60

e

Input Noise Voltage

ISL28270, ISL28470

f = 0.1Hz to 10Hz

µV

N

P-P

ISL28273

Input Noise Voltage Density

Input Noise Current Density

Input Resistance

ISL28270, ISL28470

ISL28273

f = 1kHz

nV/√Hz

pA/√Hz

MΩ

o

210

0.48

0.65

3

i

ISL28270, ISL28470

ISL28273

f = 1kHz

o

N

R

ISL28270, ISL28470

ISL28273

IN

15

MΩ

V

Input Voltage Range

V

= 2.4V to 5.0V

0

V

+

FN6260.2

April 13, 2007

3

ISL28270, ISL28273, ISL28470

Electrical Specifications

V

= +5V, V = GND, V

= 1/2V , T = +25°C, unless otherwise specified. Boldface limits apply over the

CM + A

+

M

operating temperature range, -40°C to +125°C. (Continued)

PARAMETER

DESCRIPTION

CONDITIONS

MIN

TYP

MAX

UNIT

CMRR

Common Mode Rejection Ratio

ISL28270

V

= 0.05V to 5V

90

110

dB

CM

TBD

ISL28273

ISL28470

TBD

110

dB

90

85

PSRR

Power Supply Rejection Ratio

ISL28270

V

= 2.4V to 5V

90

110

dB

+

TBD

ISL28273

ISL28470

TBD

110

dB

90

65

E

Gain Error

ISL28270, ISL28470

ISL28273

R

= 100kΩ to 2.5V

L

+0.5

TBD

4

%

G

V

Maximum Voltage Swing

Output low, 100kΩ to 2.5V

Output low, 1kΩ to 2.5V

10

mV

OUT

130

250

300

Output high, 100kΩ to 2.5V

Output high, 1kΩ to GND

4.990

4.996

4.88

V

4.75

4.70

SR

Slew Rate

R

= 1kΩ to GND

0.3

0.5

0.7

V/µs

L

0.25

0.75

-3dB BW

-3dB Bandwidth

ISL28270, ISL28470

Gain = 100

Gain = 200

Gain = 500

Gain = 1000

Gain = 10

Gain = 20

Gain = 50

Gain = 100

240

84

kHz

µA

30

13

ISL28273

265

100

25

13

I

Supply Current, Enabled

Supply Current, Disabled

ISL28270 - Both A and B channels enabled,

EN = V-

120

156

195

S,EN

ISL28470 - A, B, C and D channels enabled,

EN = V-

260

4

335

µA

I

ISL28270 - Both A and B channels disabled,

EN = V+

7

9

S,DIS

ISL28470 - A, B, C and D channels disabled,

EN = V+

10

12

15

V

EN Pin for Shut-down

EN Pin for Power-On

EN Input Current High

2

V

ENH

V

0.8

ENL

I

EN = V+

EN = V-

0.8

26

1

1.3

µA

ENH

I

EN Input Current Low

50

100

nA

V

ENL

V

Minimum Supply Voltage

2.4

+

FN6260.2

April 13, 2007

4

ISL28270, ISL28273, ISL28470

Electrical Specifications

V

= +5V, V = GND, V

= 1/2V , T = +25°C, unless otherwise specified. Boldface limits apply over the

CM + A

+

M

operating temperature range, -40°C to +125°C. (Continued)

PARAMETER

DESCRIPTION

Short Circuit Output Current

CONDITIONS

MIN

TYP

MAX

UNIT

I

V

= 5V, R

LOAD

= 10Ω

±20

±18

±29

mA

SC

+

= 2.4V, R

LOAD

= 10Ω

±8

mA

Typical Performance Curves

70

60

50

40

30

20

10

90

COMMON-MODE INPUT = V+

COMMON-MODE INPUT = V +

S

GAIN = 10,000V/V

GAIN = 5,000V/V

80

70

60

50

40

30

GAIN = 1000

GAIN = 500

GAIN = 2,000V/V

GAIN = 200

GAIN = 100

GAIN = 50

GAIN = 1,000V/V

GAIN = 500V/V

GAIN = 200V/V

GAIN = 100V/V

GAIN = 20

GAIN = 10

1

10

100

1k

10k

100k

1M

1E+00

1E+01

1E+02

1E+03

1E+04

1E+05

1E+06

FREQUENCY (Hz)

FIGURE 1. ISL28270, ISL28470 FREQUENCY RESPONSE vs

CLOSED LOOP GAIN (V+ = V = 5V)

FIGURE 2. ISL28273 FREQUENCY RESPONSE vs CLOSED

LOOP GAIN (V

= V+)

CM

90

80

70

60

50

40

30

70

60

50

40

30

20

10

COMMON-MODE INPUT = 1/2V

GAIN = 10,000V/V

S

COMMON-MODE INPUT = 1/2V

+

GAIN = 1000

GAIN = 500

GAIN = 5,000V/V

GAIN = 2,000V/V

GAIN = 200

GAIN = 100

GAIN = 50

GAIN = 1,000V/V

GAIN = 500V/V

GAIN = 200V/V

GAIN = 100V/V

GAIN = 20

GAIN = 10

1

10

100

1k

10k

100k

1M

1E+00

1E+01

1E+02

1E+03

1E+04

1E+05

1E+06

FREQUENCY (Hz)

FIGURE 3. ISL28270, ISL28470 FREQUENCY RESPONSE vs

FIGURE 4. ISL28273 FREQUENCY RESPONSE vs CLOSED

LOOP GAIN (V = 1/2V+)

CLOSED LOOP GAIN (V+ = 5V, V

= 1/2V+)

CM

FN6260.2

April 13, 2007

5

ISL28270, ISL28273, ISL28470

Typical Performance Curves (Continued)

70

60

50

40

30

20

10

90

80

70

60

50

40

30

COMMON-MODE INPUT = V +10mV

M

COMMON-MODE INPUT = V +10mV

M

GAIN = 1000

GAIN = 500

GAIN = 10,000V/V

GAIN = 5,000V/V

GAIN = 2,000V/V

GAIN = 1,000V/V

GAIN = 200

GAIN = 100

GAIN = 50

GAIN = 500V/V

GAIN = 200V/V

GAIN = 100V/V

GAIN = 20

GAIN = 10

1E+00

1E+01

1E+02

1E+03

1E+04

1E+05

1E+06

1

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

FIGURE 5. ISL28270, ISL28470 FREQUENCY RESPONSE vs

FIGURE 6. ISL28273 FREQUENCY RESPONSE vs CLOSED

LOOP GAIN (VCM = V-)

CLOSED LOOP GAIN (V+ = 5V, V

= 10mV)

CM

25

45

40

35

30

25

20

15

10

5

V

= 5V

+

V

S

= 5V

20

15

10

V

= 3.3V

+

V

= 3.3V

S

V

= 2.4V

+

V

= 2.4V

S

A = 10

V

A

R

C

= 100

= 10kΩ

= 10pF

V

L

F

G

R = 10kΩ

= 10pF

C

L

5

0

R /R = 9.08Ω

R /R = 99.02

R

F

G

R

= 178kΩ

= 221kΩ

= 19.6kΩ

= 2.23kΩ

0

100

1k

10k

100k

1M

100

1k

10k

100k

1M

FREQUENCY (Hz)

FIGURE 8. ISL28273 FREQUENCY RESPONSE vs SUPPLY

VOLTAGE

FIGURE 7. ISL28270, ISL28470 FREQUENCY RESPONSE vs

SUPPLY VOLTAGE

50

45

30

C

= 100pF

L

25

20

15

10

5

C

= 47pF

= 27pF

L

C

= 820pF

L

C

= 470pF

= 220pF

L

40

35

30

25

C

L

C

= 2.7pF

L

C

= 56pF

L

A

= 100

= ±2.5V

= 10kΩ

V

A

= 10

= 5V

= 10kΩ

V

R

S

V

R

+

L

R /R = 99.02

R

F

G

R /R = 9.08Ω

R

F

G

= 221kΩ

= 178kΩ

= 2.23kΩ

= 19.6kΩ

0

100

1k

10k

FREQUENCY (Hz)

100k

1M

1k

10k

FREQUENCY (Hz)

100k

1M

FIGURE 9. ISL28270, ISL28470 FREQUENCY RESPONSE vs

FIGURE 10. ISL28273 FREQUENCY RESPONSE vs C

LOAD

C

LOAD

FN6260.2

April 13, 2007

6

ISL28270, ISL28273, ISL28470

Typical Performance Curves (Continued)

120

100

80

60

40

20

0

90

80

70

60

50

40

30

20

10

0

CMRR

-10

10

100

1k

10k

100k

1M

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

FIGURE 12. ISL28273 CMRR vs FREQUENCY

FIGURE 11. ISL28270, ISL28470 CMRR vs FREQUENCY

140

120

90

80

70

60

50

40

30

20

10

0

PSRR+

100

80

PSRR-

60

40

20

0

10

100

1k

10k

100k

1M

10

100

1k

10k

100k

1M

FREQUENCY (Hz)

FIGURE 13. ISL28270, ISL28470 PSRR vs FREQUENCY

FIGURE 14. ISL28273 PSRR vs FREQUENCY

2.5

2.0

1.5

1.0

0.5

0.0

250

200

150

100

50

1

10

100

1k

10k

100k

1

10

100

1k

10k

100k

FREQUENCY (Hz)

FIGURE 16. ISL28273 INPUT VOLTAGE NOISE SPECTRAL

DENSITY (GAIN = 10)

FIGURE 15. ISL28270, ISL28470 INPUT VOLTAGE NOISE

SPECTRAL DENSITY (GAIN = 100)

FN6260.2

April 13, 2007

7

ISL28270, ISL28273, ISL28470

Typical Performance Curves (Continued)

1.0

0.9

0.8

0.7

0.6

0.5

0.4

0.3

5.0

4.5

4.0

3.5

3.0

2.5

2.0

1.5

1.0

0.5

0.0

1

10

100

1k

10k

100k

1

10

100

1k

10k

100k

FREQUENCY (Hz)

FIGURE 17. ISL28270, ISL28470 INPUT CURRENT NOISE

SPECTRAL DENSITY (GAIN = 100)

FIGURE 18. ISL28273 INPUT CURRENT NOISE SPECTRAL

DENSITY (GAIN = 10)

TIME (1s/DIV)

FIGURE 20. ISL28273 0.1 Hz TO 10Hz INPUT VOLTAGE NOISE

(GAIN = 10)

FIGURE 19. ISL28270, ISL28470 0.1 Hz TO 10Hz INPUT

VOLTAGE NOISE (GAIN = 100)

400

140

n = 930

135

350

n = 930

MAX

130

125

120

115

110

300

250

200

150

100

MEDIAN

105

MIN

100

MMININ

95

90

-40

-20

0

20

40

60

80

100

120

-20

0

20

40

60

80

100

120

TEMPERATURE (°C)

FIGURE 21. SUPPLY CURRENT vs TEMPERATURE V = ±2.5V

S

FIGURE 22. CMRR vs TEMPERATURE (V

= +2.5V TO -2.5V)

CM

ENABLED (R = INF)

L

FN6260.2

April 13, 2007

8

ISL28270, ISL28273, ISL28470

Typical Performance Curves (Continued)

4.90

4.89

4.88

4.87

4.86

4.85

165

155

145

135

125

115

105

95

n = 930

MAX

MEDIAN

85

MIN

75

65

-40

-20

0

20

40

60

80

100

120

-40

-20

0

20

40

60

80

100

120

TEMPERATURE (°C)

FIGURE 24. POSITIVE V

vs TEMPERATURE (R = 1k,

L

FIGURE 23. PSRR vs TEMPERATURE (V = ±2.5V)

OUT

= ±2.5V)

S

V

S

170

4.9964

4.9962

4.9960

4.9958

4.9956

4.9954

4.9952

4.9950

4.9948

4.9946

4.9944

n = 930

160

150

140

130

120

110

100

MAX

MEDIAN

MIN

-40

-20

0

20

40

60

80

100

120

-40

-20

0

20

40

60

80

100

120

TEMPERATURE (°C)

FIGURE 25. NEGATIVE V

OUT

vs TEMPERATURE (R = 1k,

L

FIGURE 26. POSITIVE V

vs TEMPERATURE (R = 100k,

L

OUT

V

= ±2.5V)

S

V

= ±2.5V)

S

4.502

n = 930

4.002

MAX

MEDIAN

3.502

3.002

2.502

2.002

MIN

-40

-20

0

20

40

60

80

100

120

TEMPERATURE (°C)

FIGURE 27. NEGATIVE V

vs TEMPERATURE (R = 100k, V = ±2.5V)

L S

OUT

FN6260.2

April 13, 2007

9

ISL28270, ISL28273, ISL28470

Pin Descriptions

ISL28270

ISL28273

ISL28470

EQUIVALENT

16 Ld QSOP 16 Ld QSOP 28 Ld QSOP PIN NAME

CIRCUIT

PIN FUNCTION

2, 15

3, 14

2, 15

3, 14

1, 13

16, 28

OUT_A,B

C_D

Circuit 3

Output Voltage. A complementary Class AB common-source output

stage drives the output of each channel. When disabled, the outputs are

in a high impedance state

2, 12

17, 27

FB+_A,B

C_D

Circuit 1A,

Circuit 1B

Positive Feedback high impedance terminals. ISL28270 and ISL28470

input circuit is shown in Circuit 1A, and the ISL28273 input circuit is

shown in Circuit 1B.

ISL28273: to avoid offset drift, it is recommended that the terminals of

the ISL28273 are not overdriven beyond 1V and the input current must

never exceed 5mA.

4, 13

3, 11

18, 26

FB-_A,B

C_D

Circuit 1A,

Circuit 1B

Negative Feedback high impedance terminals. The FB- pins connect to

an external resistor divider to individually set the desired gain of the in-

amp. ISL28270 and ISL28470 input circuit is shown in Circuit 1A, and the

ISL28273 input circuit is shown in Circuit 1B.

ISL28273: to avoid offset drift, it is recommended that the terminals of

the ISL28273 are not overdriven beyond 1V and the input current must

never exceed 5mA.

5, 12

6, 11

7, 10

5, 12

6, 11

7, 10

4, 10

19, 25

IN-_A,B

C_D

Circuit 1A,

Circuit 1B

High impedance Inverting input terminals. Connect to the low side of the

input source signal. ISL28270 and ISL28470 input circuit is shown in

Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B.

ISL28273: to avoid offset drift, it is recommended that the terminals of

the ISL28273 are not overdriven beyond 1V and the input current must

never exceed 5mA.

5, 9

20, 24

IN+_A,B

C_D

Circuit 1A,

Circuit 1B

High impedance Non-inverting input terminals. Connect to the high side

of the input source signal. ISL28270 and ISL28470 input circuit is shown

in Circuit 1A, and the ISL28273 input circuit is shown in Circuit 1B.

ISL28273: to avoid offset drift, it is recommended that the terminals of

the ISL28273 are not overdriven beyond 1V and the input current must

never exceed 5mA.

6, 8

21, 23

EN_A,B

C_D

Circuit 2

Active LOW logic pins. When pulled above 2V, the corresponding

channel turns off and OUT is high impedance. A channel is enabled

when pulled below 0.8V. Built-in pull downs define each EN pin LOW

when left floating.

16

8

16

8

7

V

Circuit 4

Positive Supply terminal shared by all channels.

+

22

V-

Negative Supply terminal shared by all channels. Grounded for single

supply operation.

1, 9

14,15

NC

No Connect, pins can be left floating or grounded

V+

V-

V+

IN+

FB+

CAPACITIVELY

OUT

IN-

FB-

LOGIC

COUPLED

ESD CLAMP

V-

CIRCUIT 1A

CIRCUIT 2

CIRCUIT 3

CIRCUIT 4

V+

IN-

IN+

FB-

FB+

V-

CIRCUIT 1B

FN6260.2

April 13, 2007

10

ISL28270, ISL28273, ISL28470

The IREC enables rail-to-rail input amplification without the

Application Information

problems usually associated with the dual differential stage

topology. The IREC ensures that there are no drastic

changes in offset voltage over the entire range of the input.

See Input Offset Voltage vs Common-Mode Input Voltage in

performance charts. IREC also cures the abrupt change and

even reverse polarity of the input bias current over the whole

range of input.

Product Description

The ISL28270 and ISL28273 are dual channel micropower

instrumentation amplifiers (in-amps) and the ISL28470 is a

Quad-channel which delivers rail-to-rail input amplification

and rail-to-rail output swing. The in-amps also deliver

excellent DC and AC specifications while consuming only

about 60µA per channel. Because the independent pair of

feedback terminals set the gain and adjust the output 0 level,

the ISL28270, ISL28273 and ISL28470 achieve high CMRR

regardless of the tolerance of the gain setting resistors. The

ISL28270 and ISL28470 are internally compensated for a

minimum gain of 100. The ISL28273 is internally

Input Bias Cancellation/Compensation

All three parts have an Input Bias Cancellation/Compensation

Circuit for both the input and feedback terminals (IN+, IN-, FB+

and FB-), achieving a low input bias current throughout the

input common-mode range and the operating temperature

range. While the PNP bipolar input stages are biased with an

adequate amount of biasing current for speed and increased

noise performance, the Input Bias Cancellation/Compensation

Circuit sinks most of the base current of the input transistors

leaving a small portion as input bias current, typically 500pA. In

addition, the Input Bias Cancellation/Compensation Circuit

maintains a smooth and flat behavior of input bias current over

the common mode range and over the operating temperature

range. The Input Bias Cancellation/Compensation Circuit

operates from input voltages of 10mV above the negative

supply to input voltages slightly above the positive supply.

compensated for a minimum gain of 10.

EN pins are available to independently enable or disable a

channel. When all channels are off, current consumption is

down to typically 4µA.

Input Protection

All input terminals and feedback terminals have internal ESD

protection diodes to both positive and negative supply rails,

limiting the input voltage to within one diode beyond the

supply rails. Input signals originating from low impedance

sources should have current limiting resistors in series with

the IN+ and IN- pins to prevent damaging currents during

power supply sequencing and other transient conditions.

The ISL28270 and ISL28470 have additional back-to-back

diodes across the input terminals and also across the

feedback terminals. If overdriving the inputs is necessary,

the external input current must never exceed 5mA. External

series resistors may be used as an external protection to

limit excessive external voltage and current from damaging

the inputs. On the other hand, the ISL28273 has no clamps

to limit the differential voltage on the input terminals allowing

higher differential input voltages at lower gain applications. It

is recommended, however, that the terminals of the

Output Stage and Output Voltage Range

A Class AB common-source output stage drives the output.

The pair of complementary MOSFET devices drive the

output VOUT to within a few millivolts of the supply rails. At a

100kΩ load, the PMOS sources current and pulls the output

up to 4mV below the positive supply. The NMOS sinks

current and pulls the output down to 4mV above the negative

supply, or ground in the case of a single supply operation.

The current sinking and sourcing capability are internally

limited to 29mA. When disabled, the outputs are in a high

impedance state.

Gain Setting

ISL28273 are not overdriven beyond 1V to avoid offset drift.

VIN (the potential difference across IN+ and IN-), is

replicated (less the input offset voltage) across FB+ and FB-.

The function of the in-amp is to maintain the differential

voltage across FB- and FB+ equal to IN+ and IN-; (FB- -

FB+) = (IN+ - IN-). Consequently, the transfer function can

be derived. The in-amp gain is set by two external resistors,

the feedback resistor RF, and the gain resistor RG.

Input Stage and Input Voltage Range

The input terminals (IN+ and IN-) of the in-amps are a single

differential pair of bipolar PNP devices aided by an Input Range

Enhancement Circuit (IREC), to increase the headroom of

operation of the common-mode input voltage. The feedback

terminals (FB+ and FB-) also have a similar topology. As a

result, the input common-mode voltage range is rail-to-rail

regardless of the feedback terminal settings and regardless of

the gain settings. They are able to handle input voltages that

are at or slightly beyond the supply and close to ground making

these in-amps well suited for single 5V down to 2.4V supply

systems. There is no need to bias the common-mode input to

achieve symmetrical input voltage. It is recommended,

however, that the common-mode input be biased at least 10mV

above the negative supply rail to achieve top performance. See

“Input Bias Cancellation/Compensation” on page 11.

FN6260.2

April 13, 2007

11

ISL28270, ISL28273, ISL28470

an economical resistor divider can be used to set the voltage

at the REF terminal without degrading or affecting the CMRR

performance. Any voltage applied to the REF terminal will

2.4V TO 5V

EN

IN+

IN-

shift V

by V

times the closed loop gain, which is set

by resistors R and R . See Figure 29.

V+

+

EN

OUT

REF

IN+

IN-

F

G

-

ISL28270

VOUT

FB+

FB-

The FB+ pin can also be connected to the other end of

resistor, R . See Figure 30. Keeping the basic concept that

the in-amp maintains constant differential voltage across the

input terminals and feedback terminals (FB- - FB+) =

(IN+ - IN-), the transfer function of Figure 30 can be derived.

+

-

G

VCM

V-

R

F

G

2.4V TO 5V

EN

IN+

V+

ISL28270

V-

EN

IN+

IN-

FIGURE 28. GAIN IS SET BY TWO EXTERNAL RESISTORS,

AND R

+

-

R

F

G

IN-

VOUT

FB+

FB-

+

-

V

= IN+ – IN-

IN

VCM

R

⎛

⎜

⎝

⎞

F

--------

(EQ. 1)

=

1 +

V

⎟

⎠

OUT

IN

R

G

R

S

In Figure 28, the FB+ pin and one end of resistor RG are

connected to GND. With this configuration, the gain equation

(Equation 1) is only true for a positive swing in VIN; negative

input swings will be ignored because the output will be at

ground.

R

F

G

VREF

FIGURE 30. REFERENCE CONNECTION WITH AN

AVAILABLE VREF

V

= IN+ – IN-

IN

Reference Connection

Unlike a three op-amp in-amp realization, a finite series

resistance seen at the REF terminal does not degrade the

high CMRR performance, eliminating the need for an

additional external buffer amplifier. Figure 29 uses the FB+

pin to provide a high impedance REF terminal.

R

+ R

F

S

R

G

---------------------

+ V

REF

=

1 +

OUT

(EQ. 3)

R

⎛

⎜

⎝

⎞

⎟

⎠

F

--------

V

(V ) + (V

)

REF

IN

(EQ. 4)

R

G

2.4V to 5V

EN

A finite resistance RS in series with the V

REF

source, adds

an output offset of V *(R /R ). As the series resistance RS

IN

S

G

approaches zero, Equation 3 is simplified to Equation 4 for

IN+

V+

ISL28270

V-

EN

IN+

IN-

Figure 30. V is simply shifted by an amount V

.

REF

OUT

+

-

IN-

External Resistor Mismatches

VOUT

FB+

FB-

+

-

Because of the independent pair of feedback terminals

provided by the in-amps, the CMRR is not degraded by any

resistor mismatches. Hence, unlike a three op-amp and

especially a two op-amp in-amp realization, the ISL28270,

ISL28273 and ISL28470 reduce the cost of external

components by allowing the use of 1% or more tolerance

resistors without sacrificing CMRR performance. The CMRR

will be typically 110dB regardless of the tolerance of the

resistors used. Instead, a resistor mismatch results in a

higher deviation from the theoretical gain - gain Error.

2.9V to 5V

VCM

R

1

2

REF

R

F

G

FIGURE 29. GAIN SETTING AND REFERENCE CONNECTION

.

Gain Error and Accuracy

V

= IN+ – IN-

IN

The gain error indicated in the “Electrical Specifications”

Table on page 3 is the inherent gain error alone. The gain

error specification listed does not include the gain error

contributed by the resistors. There is an additional gain error

R

F

R

G

⎛

⎜

⎝

⎞

⎟

⎠

⎛

⎞

⎟

⎠

F

--------

(EQ. 2)

V

=

1 +

(V ) + 1 +

(V

)

REF

⎜

OUT

IN

R

G

⎝

The FB+ pin is used as a REF terminal to center or to adjust

the output. Because the FB+ pin is a high impedance input,

FN6260.2

April 13, 2007

12

ISL28270, ISL28273, ISL28470

due to the tolerance of the resistors used. The resulting

non-ideal transfer function effectively becomes Equation 5:

pulled above 2V, and will power up when the EN bar is pulled

below 0.8V.

R

⎛

⎜

⎝

⎞

⎟

⎠

F

Unused Channels

--------

V

=

1 +

× [1 ± (E

+ E

+ E )] × V

RF G IN

(EQ. 5)

OUT

RG

R

G

The ISL28270, ISL28273 and ISL28470 are Dual-channel

and Quad-channel op-amps. If the application only requires

one channel when using the ISL28270, ISL28273 or less

than 4-channels when using the ISL28470, the user must

configure the unused channel(s) to prevent them from

oscillating. The unused channel(s) will oscillate if the input

and output pins are floating. This will result in higher than

expected supply currents and possible noise injection into

the channel being used. The proper way to prevent this

oscillation is to short the output to the negative input and

ground the positive input (as shown in Figure 31).

Where:

E

= Tolerance of RG

= Tolerance of RF

RG

RF

G

= Gain Error of the ISL28270

The term [1 - (E

RG

+E +E )] is the deviation from the

G

RF

theoretical gain. Thus, (E

+E +E ) is the total gain

RG

RF

G

error. For example, if 1% resistors are used, the total gain

error would be as follows in Equation 6:

TotalGainError = ±(E

+ E

+ E (typical))

RF G

RG

(EQ. 6)

TotalGainError = ±(0.01 + 0.01 + 0.005)= ±2.5%

1/2 ISL28270, ISL28273

IN+

+

1/4 ISL28470

IN-

Disable/Power-Down

-

The ISL28270, ISL28273 and ISL28470 have an

FB+

FB-

enable/disable pin for each channel. They can be powered

down to reduce the supply current to typically 4µA when all

channels are off. When disabled, the corresponding output is

in a high impedance state. The active low EN pin has an

internal pull down and hence can be left floating and the

in-amp enabled by default. When the EN is connected to an

external logic, the in-amp will shutdown when the EN pin is

+

-

R

F

G

FIGURE 31. PREVENTING OSCILLATIONS IN UNUSED

CHANNELS

FN6260.2

April 13, 2007

13

ISL28270, ISL28273, ISL28470

Shrink Small Outline Plastic Packages (SSOP)

Quarter Size Outline Plastic Packages (QSOP)

M28.15

N

28 LEAD SHRINK SMALL OUTLINE PLASTIC PACKAGE

(0.150” WIDE BODY)

INDEX

AREA

0.25(0.010)

M

B M

H

E

GAUGE

PLANE

INCHES

MIN

MILLIMETERS

-B-

SYMBOL

MAX

0.069

0.010

0.061

0.012

0.010

0.394

0.157

MIN

1.35

0.10

-

MAX

1.75

0.25

1.54

0.30

0.25

10.00

3.98

NOTES

A

A1

A2

B

0.053

0.004

-

1

2

3

-

L

0.25

0.010

SEATING PLANE

A

-

-A-

0.008

0.007

0.386

0.150

0.20

0.18

9.81

3.81

9

D

h x 45°

C

D

E

-

-C-

3

α

4

A2

e

A1

C

e

0.025 BSC

0.635 BSC

-

B

0.10(0.004)

H

h

0.228

0.0099

0.016

0.244

0.0196

0.050

5.80

0.26

0.41

6.19

0.49

1.27

-

0.17(0.007) M

C

A M B S

5

L

6

NOTES:

1. Symbols are defined in the “MO Series Symbol List” in Section 2.2

of Publication Number 95.

N

α

28

7

0°

8°

0°

8°

-

2. Dimensioning and tolerancing per ANSI Y14.5M-1982.

Rev. 1 6/04

3. Dimension “D” does not include mold flash, protrusions or gate

burrs. Mold flash, protrusion and gate burrs shall not exceed

0.15mm (0.006 inch) per side.

4. Dimension “E” does not include interlead flash or protrusions. Inter-

lead flash and protrusions shall not exceed 0.25mm (0.010 inch)

per side.

5. The chamfer on the body is optional. If it is not present, a visual in-

dex feature must be located within the crosshatched area.

6. “L” is the length of terminal for soldering to a substrate.

7. “N” is the number of terminal positions.

8. Terminal numbers are shown for reference only.

9. Dimension “B” does not include dambar protrusion. Allowable dam-

bar protrusion shall be 0.10mm (0.004 inch) total in excess of “B”

dimension at maximum material condition.

10. Controlling dimension: INCHES. Converted millimeter dimensions

are not necessarily exact.

FN6260.2

April 13, 2007

14

ISL28270, ISL28273, ISL28470

Quarter Size Outline Plastic Packages Family (QSOP)

A

MDP0040

QUARTER SIZE OUTLINE PLASTIC PACKAGES FAMILY

D

(N/2)+1

N

INCHES

SYMBOL QSOP16 QSOP24 QSOP28 TOLERANCE NOTES

A

A1

A2

b

0.068

0.006

0.056

0.010

0.008

0.193

0.236

0.154

0.025

0.041

16

0.068

0.006

0.056

0.010

0.008

0.341

0.236

0.154

0.025

0.041

24

0.068

0.006

0.056

0.010

0.008

0.390

0.236

0.154

0.025

0.041

28

Max.

±0.002

±0.004

±0.002

±0.001

±0.004

±0.008

±0.004

Basic

-

PIN #1

I.D. MARK

E

E1

-

1

(N/2)

c

-

B

D

1, 3

0.010 C A B

E

-

e

E1

e

2, 3

H

-

C

SEATING

L

±0.009

Basic

-

PLANE

L1

N

-

0.007 C A B

b

0.004 C

Reference

-

Rev. F 2/07

L1

NOTES:

1. Plastic or metal protrusions of 0.006” maximum per side are not

included.

A

2. Plastic interlead protrusions of 0.010” maximum per side are not

included.

c

SEE DETAIL "X"

3. Dimensions “D” and “E1” are measured at Datum Plane “H”.

4. Dimensioning and tolerancing per ASME Y14.5M-1994.

0.010

A2

GAUGE

PLANE

L

A1

4°±4°

DETAIL X

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6260.2

April 13, 2007

15


型号：	ISL28273
厂家：	Intersil
描述：	Micropower, Single Supply, Rail-to-Rail Input and Output (RRIO) Instrumentation Amplifier 微功耗，单电源，轨到轨输入和输出（ RRIO ）仪表放大器仪表放大器
文件：	总15页 (文件大小：580K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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