ISL54005_技术文档

ISL54003, ISL54005, ISL54006

®

Data Sheet

October 30, 2007

FN6514.2

Integrated Audio Amplifier Systems

Features

The Intersil ISL54003, ISL54005, ISL54006 family of devices

are integrated audio power amplifier systems that combine a

mono BTL amplifier and stereo headphone amplifiers in a

single device. The devices are designed to operate from a

single +2.7V to +5V power supply. Targeted applications

include handheld equipment such as cell-phones, MP3

players, and games/toys.

• Pb-Free (RoHS Compliant)

• Class AB 94mW Headphone Amplifiers and 941mW Mono

BTL Speaker Amplifier

• THD+N at 1kHz, 800mW into 8Ω BTL. . . . . . . . . . . . . . 0.4%

• THD+N at 1kHz, 15mW into 32Ω Headphone . . . . . . 0.07%

• THD+N at 1kHz, 50mW into 32Ω Headphone . . . . . . . 0.3%

• Single Supply Operation. . . . . . . . . . . . . . . . . +2.7V to +5.5V

• Headphone Sense Input and Low Power Shutdown

• Thermal Shutdown Protection

These parts contain one class AB BTL type power amplifier

for driving an 8Ω mono speaker and two class AB headphone

amplifiers for driving 16Ω or 32Ω headphone speakers.

The BTL when using a 5V supply is capable of delivering

800mW (typ) with 0.4% THD+N and 941mW (typ) with 1%

THD+N of continuous average power into an 8Ω BTL speaker

load.

• “Click and Pop” Suppression Circuitry

• 2:1 Stereo Input Mux (ISL54005, ISL54006)

• Mixing of Two Stereo Inputs (ISL54006)

Each headphone amplifier when using a 5V supply is capable

of delivering 50mW (typ) with 0.3% THD+N and 94mW (typ)

with 1% THD+N of continuous average power into a 32Ω

headphone speaker.

• TTL Logic-Compatible

• Available in 20 Ld 4x4 Thin QFN

Applications

When in Mono Mode these devices automatically mix the

active left and right audio inputs and send the combined signal

to the BTL driver. In Headphone Mode the active right channel

input is sent to the right headphone speaker and the active left

channel is sent to the left headphone speaker.

• Battery powered, Handheld, and Portable Equipment

- Cellular/mobile Phones

- PDA’s, MP3 Players, DVD Players, Cameras

- Laptops, Notebooks, Palmtops

The ISL54005 and ISL54006 feature a 2:1 stereo input

multiplexer front-end. This allows selection between two

stereo sources. In addition the ISL54006 can mix the four

inputs to the BTL driver or the two pairs of inputs to the

headphone drivers.

- Handheld Games and Toys

• Desktop Computers

Simplified Block Diagram

These parts feature headphone sense circuitry that detects

when a headphone jack has been inserted and automatically

switches the active audio inputs from the mono BTL output

driver to the headphone drivers. These parts also feature a

logic control pin that can override the headphone sense

input circuitry.

V

DD

R1

L1

R2

L2

ROUTER/

MIXER

All devices in this family feature low power shutdown,

thermal overload protection and click/pop suppression. The

click and pop circuitry eliminates audible transients during

audio source changes and transitioning in and out of

shutdown.

CLICK

AND

POP

BIAS

SD

THERMAL

SHUTDOWN

INS

MIX

HO

LOGIC

CONTROL

ISL54006

CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.

1

1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.

All other trademarks mentioned are the property of their respective owners.

ISL54003, ISL54005, ISL54006

Pin Descriptions

Pinouts

ISL54003

(20 LD 4X4 TQFN)

TOP VIEW

ISL54003 ISL54005 ISL54006 NAME

FUNCTION

3, 6, 12

4, 9, 20

11

3, 6, 12

4, 9, 20

3, 6, 12

4, 9, 20

V

System Power Supply

DD

GND Ground Connection

20 19 18

17

16

IN

Left Channel Audio

Input 1

L

SPK-

HO

SD

NC

V

1

2

3

4

5

15

14

13

12

11

SPK+

11

13

11

13

IN

Left Channel Audio

Input 1

1L

V

DD

-

Left Channel Audio

Input 2

2L

GND

HpR

DD

17

IN

Right Channel Audio

Input 1

IN

R

L

6

7

8

9

10

17

19

5

17

19

5

IN

Right Channel Audio

Input 1

1R

-

5

Right Channel Audio

Input 2

2R

ISL54005

HpR Headphone Right

Ouput

(20 LD 4X4 TQFN)

TOP VIEW

7

HpL Headphone Left

Ouput

20 19

18

17

16

2

SPK+ Positive Speaker

Output

SPK-

HO

SD

IN

1

2

3

4

5

15

14

13

12

11

1

SPK- Negative Speaker

Output

SPK+

V

14

SD

HD

Shutdown, High to

disable amplifiers,

Low for normal

operation.

DD

2L

GND

HpR

V

DD

IN

1L

8

Headphone

Detection, Internally

6

7

8

9

10

pulled up to V

Low

DD,

in Mono Mode, High in

Headphone Mode if

HO = Low

ISL54006

(20 LD 4X4 TQFN)

15

HO

Headphone Override,

High in Mono Mode,

Low in Headphone

Mode if HD = High

TOP VIEW

20 19

18

17

16

-

18

-

18

16

INS Input Select

MIX Mixer, High to mix

Right and Left Audio

Inputs, Low to pass

Audio Inputs without

mixing

SPK-

HO

SD

IN

1

2

3

4

5

15

14

13

12

11

SPK+

V

DD

2L

10

16

10

REF Common-mode Bias

Voltage, Bypass with

a 1µF capacitor to

GND.

GND

HpR

V

DD

IN

1L

6

7

8

9

10

13, 16,

18, 19

NC

No Connect

FN6514.2

October 30, 2007

2

ISL54003, ISL54005, ISL54006

ISL54003 Truth Table

Ordering Information

PART

NUMBER

(Note)

TEMP.

RANGE

(°C)

PACKAGE

Tape & Reel

(Pb-Free)

SD HD HO

SPK+/SPK-

HpR

Disabled

-

HpL

Disabled

-

PART

MARKING

PKG.

DWG. #

1

0

X

0

1

X

0

1

Disabled

IN + IN

R

L

ISL54003IRTZ* 540 03IRTZ -40 to +85 20 Ld 4x4 TQFN L20.4x4A

ISL54005IRTZ* 540 05IRTZ -40 to +85 20 Ld 4x4 TQFN L20.4x4A

ISL54006IRTZ* 540 06IRTZ -40 to +85 20 Ld 4x4 TQFN L20.4x4A

-

IN

-

IN

R

L

IN + IN

-

R

L

*Add “-T” suffix for tape and reel. Please refer to TB347 for details on

reel specifications.

ISL54005 Truth Table

NOTE: These Intersil Pb-free plastic packaged products employ

special Pb-free material sets; molding compounds/die attach materials

and 100% matte tin plate PLUS ANNEAL - e3 termination finish, which

is RoHS compliant and compatible with both SnPb and Pb-free

soldering operations. Intersil Pb-free products are MSL classified at

Pb-free peak reflow temperatures that meet or exceed the Pb-free

requirements of IPC/JEDEC J STD-020.

SD INS HD HO

SPK+/SPK-

HpR

HpL

Disabled

-

1

0

X

0

1

X

0

1

0

1

X

0

1

X

0

1

Disabled

-

IN + IN

1R

1L

-

IN

1L

1R

IN + IN

1R

-

1L

IN + IN

2R

2L

-

IN

2L

2R

IN + IN

2R

-

2L

ISL54006 Truth Table

SD MIX INS HD HO SPK+/SPK-

HpR

HpL

1

0

X

0

1

X

0

1

X

0

1

0

1

0

X

0

1

X

0

1

X

Disabled

Disabled Disabled

IN + IN

1R

-

1L

-

IN

1L

1R

IN + IN

1R

-

1L

2L

IN + IN

2R

-

IN

2L

2R

IN + IN

2R

-

2L

IN + IN

1R 2R

+

IN + IN

1L

2L

0

1

X

1

0

1

-

IN

+

IN

+

1L

1R

2R

2L

IN + IN

1R 2R

+

-

IN + IN

1L 2L

FN6514.2

October 30, 2007

3

ISL54003, ISL54005, ISL54006

Absolute Maximum Ratings

Thermal Information

VDD to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -0.3 to +6.5V

Input Voltages

Thermal Resistance (Typical, Notes 1, 2)

20 Ld 4x4 TQFN Package . . . . . . . . . .

θ

(°C/W)

45

θ

(°C/W)

6.5

JA

JC

In_R, In_L, SD, INS, MIX, H_. . . . . . . . . . . . -0.3 to (VDD + 0.3V)

Output Voltages

SPK+, SPK-, Hp_. . . . . . . . . . . . . . . . . . . . . -0.3 to (VDD + 0.3V)

Continuous Current (VDD, SPK_, Hp_, GND). . . . . . . . . . . . 750mA

ESD Rating:

Maximum Junction Temperature. . . . . . . . . . . . . . . . . . . . . . . . . +150°C

Maximum Storage Temperature Range . . . . . . . . . . . -65°C to +150°C

Pb-free reflow profile . . . . . . . . . . . . . . . . . . . . . . . . . .see link below

http://www.intersil.com/pbfree/Pb-FreeReflow.asp

Human Body Model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>2kV

Machine Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>200V

Charged Device Model. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .>1kV

Operating Conditions

Temperature Range . . . . . . . . . . . . . . . . . . . . . . . . . .-40°C to +85°C

CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product reliability and

result in failures not covered by warranty.

NOTE:

1. θ is measured in free air with the component mounted on a high effective thermal conductivity test board with “direct attach” features. θ

the

JA

JC,

“case temp” is measured at the center of the exposed metal pad on the package underside. See Tech Brief TB379.

2. For θ , the “case temp” location is the center of the exposed metal pad on the package underside.

JC

Electrical Specifications - 5V Supply

Test Conditions: V

= +5V, GND = 0V, V

= 2.4V, V

= 0.8V, SD = MIX = INS = HD =

INL

DD

INH

V

, C

= 1µF, R is terminated between SPK+ and SPK- for BTL driver and between

INL REF

L

Hp_ and GND for SE drivers, Unless Otherwise Specified (Note 3).

TEMP

(°C)

MIN

MAX

PARAMETER

GENERAL

TEST CONDITIONS

(Notes 4, 5) TYP (Notes 4, 5) UNITS

Power Supply Range, V

DD

Full

25

2.7

-

5.5

12

-

V

Quiescent Supply Current, I

HO = V

or V

, HD = V , INS = V

INL

or V ,

INH

-

4.6

5.5

mA

DD

INL

MIX = V

INH

or V

INL

, R = None, Inputs AC coupled

INL

INH

L

Full

to ground (0.13µF)

Shutdown Supply Current, I

SD = V , HO = V

or V

INL

, HD = V

INH INL

,

25

-

28

31

50

-

µA

SD

INH

INS = V

or V

, MIX = V

or V

, R = 8Ω

INL

INH INH L

INL

Full

(BTL) and R = 32Ω (SE), Inputs AC coupled to

L

ground (0.1µF)

Input Resistance, R

INS = 0V or V

DD

25

-

100

150

10

-

kΩ

°C

ms

IN

Thermal Shutdown, T

INS = MIX = 0V or V

SD

Thermal Shutdown Hysteresis

SD to Full Operation, t

DD

25

INS = 0V or 5V, MIX = 0V or 5V

HO = V UNLESS OTHERWISE SPECIFIED

Full

1

SD(ON)

BTL AMPLIFIER DRIVER, HD = V

INH,

Output Offset Voltage, V

Measured between SPK+ and SPK-, Inputs AC

coupled to ground (0.1µF)

25

Full

25

-

38

49

47

-

mV

dB

OS

Power Supply Rejection Ratio,

PSRR

V

= 200mV , HD =

P-P

F

= 217Hz

= 1kHz

RIPPLE

, R = 8Ω, Ιnputs AC

RIPPLE

INL

L

25

dB

RIPPLE

coupled to ground (0.1µF)

Output Power, P

OUT

R

= 8Ω, THD+N = 1%, f = 1kHz

= 8Ω, THD+N = 10%, f = 1kHz

25

-

941

1.23

0.4

0.7

7.7

-

mW

W

L

-

Total Harmonic Distortion + Noise,

THD + N

= 8Ω, P

= 8Ω, V

= 8Ω, P

= 800mW, f = 1kHz

-

%

OUT

= 800mW, f = 20Hz to 20kHz

-

7.2

-

%

OUT

Max Output Voltage Swing, V

Signal to Noise Ratio, SNR

= 5V , f = 1kHz

P-P

V

OUT

SIGNAL

P-P

= 900mW, f = 1kHz

85

dB

OUT

Output Noise, N

OUT

A - Weight filter, BW = 22Hz to 22kHz

-

140

µV

RMS

FN6514.2

October 30, 2007

4

ISL54003, ISL54005, ISL54006

Electrical Specifications - 5V Supply

Test Conditions: V

= +5V, GND = 0V, V

= 2.4V, V

= 0.8V, SD = MIX = INS = HD =

INL

DD

INH

V

, C

= 1µF, R is terminated between SPK+ and SPK- for BTL driver and between

INL REF

L

Hp_ and GND for SE drivers, Unless Otherwise Specified (Note 3). (Continued)

TEMP

(°C)

MIN

MAX

PARAMETER

TEST CONDITIONS

(Notes 4, 5) TYP (Notes 4, 5) UNITS

Crosstalk

to L , L

R

= 8Ω, P

= 800mW, f = 1kHz, Signal coupled

OUT

25

-

80

-

dB

L

R

to R

CH CH CH

from the input of active amplifier to the output of an

adjacent amplifier with its input AC coupled to

ground.

CH

Off-Isolation

SD = V

P

= 800mW, f = 10kHz, Signal

130

DD, OUT

coupled from input to output of a disabled amplifier.

SINGLE ENDED AMPLIFIER DRIVERS, HD = V HO = V UNLESS OTHERWISE SPECIFIED

INH,

INL,

Power Supply Rejection Ratio, PSRR V

R

= 200mV , HD = 0V,

= 32Ω, Input AC coupled to

F

= 217Hz

= 1kHz

25

-

48

47

-

dB

RIPPLE

P-P

RIPPLE

L

RIPPLE

ground (0.1µF)

Output Power, P

OUT

R

= 16Ω, THD+N = 1%, f = 1kHz

= 32Ω, THD+N = 1%, f = 1kHz

25

-

170

94

-

mW

%

L

-

= 16Ω, THD+N = 10%, f = 1kHz

= 32Ω, THD+N = 10%, f = 1kHz

-

215

116

0.07

0.09

0.3

-

Total Harmonic Distortion + Noise,

THD + N

= 32Ω, P

= 32Ω, V

= 32Ω, P

= 15mW, f = 1kHz

-

OUT

= 15mW, f = 20Hz to 20kHz

= 50mW, f = 1kHz

-

%

OUT

-

%

OUT

= 50mW, f = 20Hz to 20kHz

0.4

%

OUT

Max Output Voltage Swing, V

Crosstalk

= 5V , f = 1kHz

P-P

3.6

-

4.7

V

OUT

SIGNAL

P-P

= 15mW, f = 1kHz

75

dB

OUT

R

to L , L

to R

CH

CH CH

CH

Off-Isolation

SD = V

R

= 32Ω, P = 15mW, f = 10kHz

OUT

25

-

120

85

-

dB

DD,

R = 32Ω, POUT = 50mW, f = 1kHz

L

Signal to Noise Ratio, SNR

Channel Gain Matching

R = 32Ω, VINxR = VINxL = 1.3V

(Connect to the

±0.2

L

RMS

R

to L

CH

same source)

CH

Channel Phase Matching

to L

R = 32Ω, VINxR = VINxL = 1.3V

25

-

1.3

-

°

L

RMS

R

same source)

CH

LOGIC INPUT

Input Leakage Current, I , I

,

V

= 5V, SD = 0V, INS = 0V, MIX = 0V, HD = 0V,

25

Full

25

-3

-

1.9

0.02

-

3

-

µA

V

SD INS

DD

HO = 0V

I

, I , I

MIX HD HO

Input Leakage Current, I , I

SD INS

V

= 5V, SD = V , INS = V , MIX = V

DD DD

,

DD

-1

-

1

DD

I

, I , I

HD = V , HO = V

MIX HD HO

DD

Full

-

V

2.4

-

INH

INL

-

0.8

V

FN6514.2

October 30, 2007

5

ISL54003, ISL54005, ISL54006

Electrical Specifications - 3.6V Supply Test Conditions: V = +3.6V, GND = 0V, V

= 1.4V. V

= 0.4V, SD = MIX = INS =

INL

DD

INH

GSO = GS1 = V , C

= 1µF, R is terminated between SPK+ and SPK- for BTL driver

INL REF

L

and between Hp_ and GND for SE drivers, Unless Otherwise Specified (Note 3).

TEMP

(°C)

MIN

(Notes 4, 5)

MAX

PARAMETER

GENERAL

Quiescent Supply Current, I

TEST CONDITIONS

TYP

(Notes 4, 5) UNITS

HO = V

or V

, HD = V , INS = V

INH INL INL

or V ,

INH

25

-

2.7

3

12

-

mA

DD

INL

MIX = V

or V , RL = None, Input AC coupled

INL

INH

Full

to ground (0.1µF)

Shutdown Supply Current, I

SD = V , HO = V

DD

or V

, MIX = V

, HD = Float,

25

-

13

15

50

-

µA

SD

INL

INH

INS = V

or V

, R = 8Ω

INL

INH

INL

INH

L

Full

µΑ

(BTL) and R = 32Ω (SE), Input AC coupled to

L

ground (0.1µF)

BTL AMPLIFIER DRIVER, HD = V

INH,

HO = V

UNLESS OTHERWISE SPECIFIED

INH,

Output Offset Voltage, V

OS

Measured between SPK+ and SPK-, Input AC

coupled to ground (0.1µF)

25

Full

25

-

25

40

49

47

-

mV

dB

Power Supply Rejection Ratio,

PSRR

V

= 200mV , HD = 0V,

P-P

F

= 217Hz

= 1kHz

RIPPLE

R

= 8Ω, input AC coupled to

L

25

dB

RIPPLE

ground (0.1µF)

Output Power, P

OUT

R

= 8Ω, THD+N = 1%, f = 1kHz

25

-

310

528

0.4

5.8

-

mW

%

L

= 8Ω, THD+N = 10%, f = 1kHz

Total Harmonic Distortion + Noise,

THD + N

= 8Ω, P

= 200mW, f = 1kHz

OUT

= 200mW, f = 20Hz to 20kHz

%

Max Output Voltage Swing, V

OUT

= 8Ω, VSIGNAL = 3.6V , f = 1kHz

P-P

V

P-P

SINGLE ENDED AMPLIFIER DRIVERS, HD = V

HO = V

UNLESS OTHERWISE SPECIFIED

INL,

INH,

Power Supply Rejection Ratio,

PSRR

V

R

= 200mV , HD = 0V,

P-P

= 32Ω, Ιnput AC coupled to

F

= 217Hz

= 1kHz

25

-

48

47

-

dB

RIPPLE

L

F

ground (0.1µF)

Output Power, P

OUT

R

= 16Ω, THD+N = 1%, f = 1kHz

25

-

80

47

-

mW

%

L

= 32Ω, THD+N = 1%, f = 1kHz

= 16Ω, THD+N = 10%, f = 1kHz

= 32Ω, THD+N = 10%, f = 1kHz

107

58

Total Harmonic Distortion + Noise,

THD + N

= 32Ω, P

= 32Ω, V

= 15mW, f = 1kHz

0.15

3.2

OUT

= 15mW, f = 20Hz to 20kHz

%

OUT

Max Output Voltage Swing, V

= 3.6V , f = 1kHz

P-P

V

P-P

OUT

SIGNAL

LOGIC INPUT

Input Leakage Current, I , I

SD INS

,

V

= 3.6V, SD = 0V, INS = 0V, MIX = 0V, HD = 0V,

25

Full

25

-

1.9

0.02

-

µA

V

DD

I

, I , I

HO = 0V

MIX HD HO

-

Input Leakage Current, I , I

SD INS

V

= 3.6V, SD = V , INS = V , MIX = V

DD DD

,

DD

-

DD

HD = V , HO = V

I

, I , I

MIX HD HO

DD

Full

-

V

1.4

-

INH

INL

-

0.4

V

NOTES:

3. V = input voltage to perform proper function.

IN

4. The algebraic convention, whereby the most negative value is a minimum and the most positive a maximum, is used in this data sheet.

5. Parts are 100% tested at +25°C. Over-temperature limits established by characterization and are not production tested.

FN6514.2

October 30, 2007

6

ISL54003, ISL54005, ISL54006

ISL54003 Typical Application Circuit and Block Diagram

0.1µF

V

DD

SPK+

SPK-

HpR

0.22µF

BTL

IN

R

L

RIGHT AUDIO

LEFT AUDIO

100kΩ

ROUTER/

MIXER

SE

HD

HpL

HEADPHONE JACK

V

DD

^10kΩ

THERMAL

PROTECTION

BIAS

CLICK AND POP

C

REF

SD

1µF

MICRO

CONTROLLER

LOGIC CONTROL

HO

GND

ISL54005 Typical Application Circuit and Block Diagram

0.1µF

V

0.22µF

DD

IN

1R

RIGHT 1 AUDIO

RIGHT 2 AUDIO

SPK+

SPK-

HpR

BTL

0.22µF

2R

100kΩ

MUX/

ROUTER/

MIXER

SE

0.22µF

IN

1L

LEFT 1 AUDIO

LEFT 2 AUDIO

HD

HpL

2L

HEADPHONE JACK

V

DD

^10kΩ

THERMAL

PROTECTION

BIAS

CLICK AND POP

C

REF

SD

1µF

INS

MICRO

CONTROLLER

LOGIC CONTROL

HO

GND

FN6514.2

October 30, 2007

7

ISL54003, ISL54005, ISL54006

ISL54006 Typical Application Circuit and Block Diagram

0.1µF

V

0.22µF

DD

IN

1R

2R

RIGHT 1 AUDIO

RIGHT 2 AUDIO

SPK+

SPK-

HpR

BTL

100kΩ

MUX/

ROUTER/

MIXER

SE

0.22µF

IN

1L

2L

LEFT 1 AUDIO

LEFT 2 AUDIO

HD

HpL

HEADPHONE JACK

V

DD

^10kΩ

BIAS

THERMAL

PROTECTION

CLICK AND POP

C

REF

SD

1µF

INS

MICRO

CONTROLLER

LOGIC CONTROL

MIX

HO

GND

When in Mono Mode (BTL driver active) these devices

automatically mix the active left and right audio inputs and

send the combined signal to the BTL driver. In Headphone

Mode the active right channel input is sent to the right

headphone speaker and the active left channel is sent to the

left headphone speaker.

Detailed Description

The Intersil ISL54003, ISL54005, and ISL54006 family of

devices are integrated audio power amplifier systems

designed to provide quality audio, while requiring minimal

external components. The low 0.4% THD+N ensures clean,

low distortion amplification of the audio signals. The devices

are designed to operate from a single +2.7V to +5V power

supply. All devices are offered in a 20 Ld 4x4 TQFN package.

Targeted applications include battery powered equipment

such as cell-phones, MP3 players, and games/toys.

The ISL54005 and ISL54006 feature a 2:1 stereo input

multiplexer front-end. This allows selection between two

stereo sources. The INS control pin determines which stereo

input is active. Applying logic “0” to the INS control pin

selects stereo input 1 (R and L ). Applying logic “1” to the

1

These parts contain one class AB BTL type power amplifier

for driving an 8Ω mono speaker and two class AB

single-ended (SE) type amplifiers for driving 16Ω or 32Ω

headphones.

INS control pin selects stereo input 2 (R and L ).

2

The ISL54006 has the capablity of mixing the two stereo

inputs. When in MIX Mode and HEADPHONE Mode, the

part mixes the R input with the R input and sends the

1

2

The BTL when using a 5V supply is capable of delivering

800mW (typ) with 0.4% THD+N and 941mW (typ) with 1%

THD+N of continuous average power into an 8Ω BTL speaker

load. When the speaker load is connected across the

positive and negative terminals of the BTL driver the voltage

is doubled across the load and the power is quadrupled.

combined signal to the HpR headphone driver and it mixes

the L input with the L input and sends the combined signal

1

2

to the HpL headphone driver. When in MIX Mode and

MONO Mode, it mixes all four inputs (R + R + L + L ) and

1

2

1

2

sends the combined signal to the BTL mono driver.

These parts have headphone sense input circuitry that

detects when a headphone jack has been inserted and

automatically switches the active audio inputs from the mono

BTL output driver to the headphone drivers. These parts also

feature a logic control pin (HO) that can override the sense

input circuitry.

Each SE amplifier when using a 5V supply is capable of

delivering 15mW (typ) with 0.07% THD+N and 50mW (typ)

with 0.3% THD+N of continuous average power into a 32Ω

headphone speaker.

FN6514.2

October 30, 2007

8

ISL54003, ISL54005, ISL54006

All devices in this family feature low power shutdown,

Headphone (Single-Ended) Amplifiers

thermal overload protection and click/pop suppression. The

click and pop circuitry prohibits switching between input

channels until the audio input signals are at there lowest

point which eliminates audible transients in the speakers

when changing the audio input sources. The click/pop

circuitry also keeps speaker transients to an inaudibile level

when entering and leaving shutdown.

The ISL54003, ISL54005, and ISL54006 contains two

single-ended (SE) headphone amplifiers for driving the left

and right channels of a 32Ω or 16Ω headphone speaker.

One SE amplifier drives the right speaker of the headphone

and other SE amplifier drives the left speaker of the

headphone. The speaker load gets connected between the

output of the amplifier and ground.

“Typical Application Circuits and Block Diagrams” for each

device in the family are provided on page 7 and page 8.

Truth tables for each device are provided on page 3.

The audio signal at the output of each SE driver is biased at

V

/2 and unlike the BTL driver that cancels this offset due

DD

to its differential connection, a capacitor is required at the

output of each SE drivers to remove this DC voltage from the

headphone load.

DC Bias Voltage

The ISL54003, ISL54005, and ISL54006 have internal DC

bias circuitry, which DC offsets the incoming audio signal at

This coupling capacitor along with the resistance of the

speaker load creates a high pass filter that sets the

amplifier’s lower bandpass frequency limit. The value of this

AC coupling capacitor depends on the low frequency range

required by the application. The formula required to calculate

the capacitor value is shown in Equation 2:

V

/2. When using a 5V supply, the DC offset will be 2.5V.

DD

When using a 3.6V supply, the DC offset will be 1.8V.

Since the signal gets biased internally at V /2 the audio

DD

signals need to be AC coupled to the inputs of the device.

The value of the AC coupling capacitor depends on the low

frequency range required for the application. A capacitor of

0.22µF will pass a signal as low as 7.2Hz. The formula

required to calculated the capacitor value is shown in

Equation 1:

(EQ. 2)

C ≥ 1 ⁄ 6.28 • f • Rspeaker

For an application driving a 32Ω headphone with a lower

frequency requirement of 150Hz, the required capacitor

value would be determined by using Equation 3:

(EQ. 1)

C ≥ 1 ⁄ 6.28 • f • 100kΩ

(EQ. 3)

C ≥ 1 ⁄ 6.28 • 150 • 32= 33μF

The 100kΩ is the impedance looking into the input of the

ISL54003, ISL54004, ISL54006 devices.

Use the closest standard value.

Headphone Sense Function

BTL Speaker Amplifier

The ISL54003, ISL54005, and ISL54006 contain one

bridge-tied load (BTL) amplifier designed to drive an 8Ω

speaker load differentially. The output to the BTL amplifier

are SPK+ and SPK-. The speaker load gets connected

across these terminals.

With a logic “1” at the HP control pin while the HO control pin

is low will activate the headphone drivers and disable the

BTL driver.

The “Typical Application Circuits and Block Diagrams” on

page 7 and page 8 show the implementation of the

headphone control function using a common headphone

jack.

A single BTL driver consists of an inverting and non-inverting

power op amps. The AC signal out of each op amp are equal

in magnitude but 180° out-of-phase, so the AC signal at

SPK+ and SPK- have the same amplitude but are 180°

out-of-phase.

The HP pin gets connected to the mechanical wiper blade of

the headphone jack. Two external resistors are required for

proper operation. A 100kΩ pull-up resistor from the HP pin to

Driving the load differentially using a BTL configuration

doubles the output voltage across the speaker load and

quadruples the power to the load. In effect you get a gain of

two due to this configuration at the load as compared to

driving the load with a single-ended amplifier with its load

connected between a single amplifier’s output and ground.

V

and a 10kΩ pull-down resistor from the jack’s audio

DD

signal pin to ground of the jack signal pin to which the wiper

is connected. See the block diagrams on page 7 and page 8.

When no headphone plug is inserted into the jack, the

voltage at the HP pin gets set at a low voltage level due to

the 10kΩ resistor and 100kΩ resistor divider network

The outputs of the BTL are biased at V /2. When the load

DD

connection to V

.

DD

gets connected across the + and - terminal of the BTL the

mid supply DC bias voltage at each output gets cancelled

out eliminating the need for large bulky output coupling

capacitors.

When a headphone is inserted into the jack, the 10kΩ

resistor gets disconnected from the HP control pin and the

HP pin gets pulled up to V . Since the HP pin is now high,

DD

the headphone drivers are activated.

FN6514.2

October 30, 2007

9

ISL54003, ISL54005, ISL54006

A microprocessor or a switch can be used to drive the HP

pin rather than using the headphone jack contact pin.

QFN Thermal Pad Considerations

The QFN package features an exposed thermal pad on its

underside. This pad lowers the package’s thermal resistance

by providing a direct heat conduction path from the die to the

PCB. Connect the exposed thermal pad to GND by using a

large copper pad and multiple vias to the GND plane. The

vias should be plugged and tented with plating and solder

mask to ensure good thermal conductivity.

Note: With a logic “1” at the HO pin, the BTL driver remains

active regardless of the voltage level at the HD pin. This

allows a headphone to be plugged into the headphone jack

without activating the HP drivers. Music will continue to play

through the internal 8Ω speaker rather than the headphones.

Low Power Shutdown

Best thermal performance is achieved with the largest

practical copper ground plane area.

With a logic “1” at the SD control pin the device enters the

low power shutdown state. When in shutdown the BTL and

headphone amplifiers go into an high impedance state and

PCB Layout Considersations and Power

Supply Bypassing

I

supply current is reduced to 26µA (typ).

DD

In shutdown mode before the amplifiers enter the high

impedance/low current drive state, the bias voltage of V /2

remains connected at the output of the amplifiers through a

100kΩ resistor.

To maintain the highest load dissipation and widest output

voltage swing, the power supply PCB traces and the traces

that connect the output of the drivers to the speaker loads

should be made as wide as possible to minimize losses due

to parasitic trace resistance.

DD

This resistor is not present during active operation of the

drivers but gets switched in when the SD pin goes high. It

gets removed when the SD pin goes low.

Proper supply bypassing is necessary for high power supply

rejection and low noise performance. A filter network

consisting of a 10µF capacitor in parallel with a 0.1µF

capacitor is recommended at the voltage regulator that is

providing the power to the ISL54003, ISL54004, ISL54006

IC.

Leaving the DC bias voltage connected through a 100kΩ

resistor while going into and out of shutdown reduces the

transient at the speakers to a small level preventing clicking

or popping in the speakers.

Local bypass capacitors of 0.1µF should be put at each VDD

pin of the ISL54003, ISL54004, ISL54006 devices. They

should be located as close as possible to the pin, keeping

the length of leads and traces as short as possible.

Note: When the SD pin is High it over-rides all other logic

pins.

A 1µF capacitor from the REF pin (pin 10) to ground is

needed for optimum PSRR and internal bias voltage stability.

Typical Performance Curves

T = +25°C, Unless Otherwise Specified.

A

1.0

0.9

0.8

1.0

0.9

0.8

0.7

0.6

V

= 5V

V

= 3.6V

DD

BTL

L

DD

BTL

0.7

R

P

= 8Ω

R

P

= 8Ω

= 200mW

L

= 800mW

0.6

0.5

O

0.5

0.4

0.3

0.2

0.1

20

50

100 200

500 1k

2k

5k

10k 20k

20

50

100 200

500

1k

2k

5k

10k 20k

FREQUENCY (Hz)

FIGURE 1. THD+N vs FREQUENCY

FIGURE 2. THD+N vs FREQUENCY

FN6514.2

October 30, 2007

10

ISL54003, ISL54005, ISL54006

Typical Performance Curves

T

= +25°C, Unless Otherwise Specified. (Continued)

A

10.0

V

= 5V

V

= 3.6V

DD

BTL

= 8Ω

DD

BTL

= 8Ω

5.00

R

L

2.00

1.00

0.50

2.00

1.00

0.50

f = 1kHz

0.20

0.10

0.05

0.20

0.10

0.05

0.02

0.01

0.02

0.01

10m

20m

40m

70m 100m

200m

600m

10m

20m

50m

100m 200m

500m

600m

OUTPUT POWER (W)

FIGURE 3. THD+N vs OUTPUT POWER

FIGURE 4. THD+N vs OUTPUT POWER

0.20

0.40

0.30

V

SE

R

= 3.6V

V

SE

R

= 5V

DD

= 32Ω

= 15mW

= 32Ω

L

0.20

P

O

P

O

= 15mW

0.10

0.09

0.08

0.07

0.06

0.10

0.05

0.04

0.05

0.04

0.03

0.02

0.03

0.02

0.01

20

50

100 200

500 1k

2k

5k

10k 20k

20

50

100 200

500 1k

2k

5k

10k 20k

FREQUENCY (Hz)

FIGURE 5. THD+N vs FREQUENCY

FIGURE 6. THD+N vs FREQUENCY

1.0

0.9

0.8

0.9

0.8

V

= 5V

DD

V

= 5V

DD

SE

L

SE

0.7

R

= 32Ω

R

= 16Ω

L

0.6

P

= 50mW

O

P

= 50mW

O

0.5

0.4

0.5

0.4

0.3

0.2

0.3

0.2

0.1

20

50

100 200

500 1k

2k

5k

10k 20k

20

50

100 200

500 1k

2k

5k

10k 20k

FREQUENCY (Hz)

FIGURE 8. THD+N vs FREQUENCY

FIGURE 7. THD+N vs FREQUENCY

FN6514.2

October 30, 2007

11

ISL54003, ISL54005, ISL54006

Typical Performance Curves

T

= +25°C, Unless Otherwise Specified. (Continued)

A

1.00

V

= 3.6V

DD

SE

L

V

= 3.6V

DD

SE

L

0.50

R

= 32Ω

R

= 16Ω

P

= 30mW

O

P

= 60mW

O

0.20

0.10

0.05

0.20

0.10

0.05

0.02

0.01

0.02

0.01

20

50

100 200

500 1k

2k

5k

10k 20k

20

50

100 200

500 1k

2k

5k

10k 20k

FREQUENCY (Hz)

FIGURE 9. THD+N vs FREQUENCY

FIGURE 10. THD+N vs FREQUENCY

0.20

0.10

0.09

0.08

V

= 5V

DD

SE

L

R

= 32Ω

0.07

f = 1kHz

0.06

0.10

0.09

0.08

0.07

0.06

0.05

0.04

V

= 5V

DD

SE

L

0.05

R

= 16Ω

0.03

0.02

0.04

f = 1kHz

0.03

0.02

0.01

2

3

4

5

6

7

8

9 10

20

2

3

4

5

6

7

8

9

10

20

OUTPUT POWER (mW)

FIGURE 12. THD+N vs OUTPUT POWER

FIGURE 11. THD+N vs OUTPUT POWER

0.30

0.20

0.10

0.09

0.08

V

SE

R

= 3.6V

DD

= 32Ω

0.07

0.06

L

f = 1kHz

V

SE

R

= 3.6V

= 16W

DD

0.05

0.04

0.10

0.09

0.08

0.07

0.06

L

f = 1kHz

0.03

0.02

0.05

0.04

0.03

0.02

0.01

2

3

4

5

6

7

8

9

10

20

2

3

4

5

6

7

8

9

10

20

OUTPUT POWER (mW)

FIGURE 13. THD+N vs OUTPUT POWER

FIGURE 14. THD+N vs OUTPUT POWER

FN6514.2

October 30, 2007

12

ISL54003, ISL54005, ISL54006

Typical Performance Curves

T

= +25°C, Unless Otherwise Specified. (Continued)

A

10.0

5.00

V

= 5V

5.00

DD

SE

V

= 5V

DD

SE

R

= 32Ω

L

2.00

1.00

0.50

2.00

1.00

0.50

R

= 16Ω

L

f = 1kHz

0.20

0.10

0.05

0.20

0.10

0.05

0.02

0.01

0.02

0.01

10m

20m

30m 40m 50m

70m

100m

10m

20m

30m

50m 70m 100m

200m

OUTPUT POWER (W)

FIGURE 15. THD+N vs OUTPUT POWER

FIGURE 16. THD+N vs OUTPUT POWER

1.00

5.00

10.0

5.00

V

= 3.6V

DD

SE

L

V

= 3.6V

DD

SE

L

R

= 16Ω

R

= 32Ω

2.00

1.00

0.50

2.00

1.00

0.50

f = 1kHz

0.20

0.10

0.05

0.20

0.01

0.05

0.02

0.01

0.02

0.01

10m 12m 15m

20m 25m

35m

45m 55m

10m

20m

30m 40m 50m

70m

100m

OUTPUT POWER (W)

FIGURE 17. THD+N vs OUTPUT POWER

FIGURE 18. THD+N vs OUTPUT POWER

-50

-55

-80

-85

V

P

= 5V

DD

= 15mW

-90

O

-60

-95

-65

-100

-105

-110

-115

-120

-125

-130

-135

-140

-145

-150

-155

-160

INxR TO HPL

INxL TO HPR

-70

-75

-80

-85

HPR AND HPL

BTL

-90

-95

-100

-105

-110

20

50 100 200

FREQUENCY (Hz)

FIGURE 20. OFF ISOLATION vs FREQUENCY

500 1k

2k

5k 10k 20k

20

50 100 200

500 1k

2k

5k 10k 20k

FREQUENCY (Hz)

FIGURE 19. CROSSTALK vs FREQUENCY

FN6514.2

October 30, 2007

13

ISL54003, ISL54005, ISL54006

Typical Performance Curves

T

= +25°C, Unless Otherwise Specified. (Continued)

A

-20

-25

-22

V

= 5V

DD

V

= 5V

DD

-26

-30

-34

-38

-42

-46

-50

-54

-58

-62

-66

-70

BTL

V

SE

V

-30

-35

-40

-45

-50

-55

-60

-65

-70

-75

-80

-85

-90

= 200mV

P-P

= 200mV

RIPPLE

P-P

HPR

HPL

10 20

50 100 200

500 1k 2k

5k 10k 20k

10 20

50 100 200

500 1k 2k

5k 10k 20k

FREQUENCY (Hz)

FIGURE 22. PSRR vs FREQUENCY

FIGURE 21. PSRR vs FREQUENCY

700

600

500

400

300

200

100

400

350

300

250

200

150

100

50

V

= 3.6V

DD

BTL

= 8W

V

= 5V

DD

BTL

L

R

= 8W

R

L

0

100

200

300

(mW)

400

500

250

500

(mW)

750

1000

P

OUT

FIGURE 23. POWER DISSIPATION vs OUTPUT POWER

FIGURE 24. POWER DISSIPATION vs OUTPUT POWER

Die Characteristics

SUBSTRATE POTENTIAL (POWERED UP):

GND

PROCESS:

Submicron CMOS

FN6514.2

October 30, 2007

14

ISL54003, ISL54005, ISL54006

Thin Quad Flat No-Lead Plastic Package

(TQFN)

Thin Micro Lead FramePlastic Package

(TMLFP)

L20.4x4A

20 LEAD QUAD FLAT NO-LEAD PLASTIC PACKAGE

(COMPLIANT TO JEDEC MO-220WGGD-1 ISSUE I)

MILLIMETERS

SYMBOL

MIN

NOMINAL

MAX

0.80

0.05

0.80

NOTES

A

A1

A2

A3

b

0.70

0.75

-

0.02

-

0.55

9

0.20 REF

9

0.18

1.95

0.25

0.30

2.25

5, 8

D

4.00 BSC

-

D1

D2

E

3.75 BSC

9

2.10

7, 8

4.00 BSC

-

E1

E2

e

3.75 BSC

9

2.10

7, 8

0.50 BSC

-

k

0.20

0.35

-

0.60

20

5

-

L

0.75

8

N

2

Nd

Ne

P

3

5

3

-

0.60

12

9

θ

-

9

Rev. 0 11/04

NOTES:

1. Dimensioning and tolerancing conform to ASME Y14.5-1994.

2. N is the number of terminals.

3. Nd and Ne refer to the number of terminals on each D and E.

4. All dimensions are in millimeters. Angles are in degrees.

5. Dimension b applies to the metallized terminal and is measured

between 0.15mm and 0.30mm from the terminal tip.

6. The configuration of the pin #1 identifier is optional, but must be

located within the zone indicated. The pin #1 identifier may be

either a mold or mark feature.

7. Dimensions D2 and E2 are for the exposed pads which provide

improved electrical and thermal performance.

8. Nominal dimensionsare provided toassistwith PCBLandPattern

Design efforts, see Intersil Technical Brief TB389.

9. Features and dimensions A2, A3, D1, E1, P & θ are present when

Anvil singulation method is used and not present for saw

singulation.

All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.

Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality

Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without

notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and

reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result

from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.

For information regarding Intersil Corporation and its products, see www.intersil.com

FN6514.2

October 30, 2007

15


型号：	ISL54005
厂家：	Intersil
描述：	Integrated Audio Amplifier Systems 集成音频放大器系统音频放大器
文件：	总15页 (文件大小：312K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

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