ISL71831SEHX [INTERSIL]
Radiation Hardened 5V 32-Channel Analog Multiplexer;
| 型号： | ISL71831SEHX |
| 厂家： | 
Intersil |
| 描述： | Radiation Hardened 5V 32-Channel Analog Multiplexer |
| 文件： | 总21页 (文件大小：1101K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
DATASHEET
Radiation Hardened 5V 32-Channel Analog Multiplexer
ISL71831SEH
Features
The ISL71831SEH is a radiation tolerant, 32-channel
multiplexer that is fabricated using Intersil’s proprietary P6-SOI
process technology to provide excellent latch-up performance.
It operates with a single supply range from 3V to 5.5V and has
a 5-bit address line plus an enable that can be driven with
adjustable logic thresholds to conveniently select one of 32
available channels. An inactive channel is separated from the
active channel by a high impedance, which inhibits any
interaction between them.
• DLA SMD# 5962-15248
• Fabricated using P6 SOI process technology
• Rail-to-rail operation
• No latch-up
• Low rDS(ON). . . . . . . . . . . . . . . . . . . . . . . . . .<120Ω (maximum)
• Single supply operation . . . . . . . . . . . . . . . . . . . . . . 3V to 5.5V
- Adjustable logic threshold control
The ISL71831SEH’s low rDS(ON) allows for improved signal
integrity and reduced power losses. The ISL71831SEH is also
designed for cold sparing, making it excellent for redundancy
in high reliability applications. It is designed to provide a high
impedance to the analog source in a powered off condition,
making it easy to add additional backup devices without
incurring extra power dissipation. The ISL71831SEH also has
analog overvoltage protection on the input that disables the
switch during an overvoltage event to protect upstream and
downstream devices.
• Cold sparing capable. . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 7V
• Analog overvoltage range . . . . . . . . . . . . . . . . . . . . -0.4V to 7V
• Switch input off leakage . . . . . . . . . . . . . . . . . . . . . . . . . 120nA
• Transition times (tAHL) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70ns
• Internally grounded metal lid
• Break-before-make switching
• ESD protection ≥5kV (HBM)
• Operating temperature range. . . . . . . . . . . .-55°C to +125°C
The ISL71831SEH is available in a 48 Ld CQFP and operates
across the extended temperature range of -55°C to +125°C.
• Radiation tolerance
- Low dose rate (0.01rad(Si)/s) . . . . . . . . . . . . . . .75krad(Si)
- SEL/SEB LETTH (V+ = 6.3V). . . . . . . . . . . . . 60MeV•cm2/mg
There is also a 16-channel version available offered in a 28 Ld
CDFP. Refer to the ISL71830SEH datasheet for more
information. For a list of differences, refer to Table 1 on
page 2.
NOTE: All lots are assurance tested to 75krad (0.01rad(Si)/s)
wafer-by-wafer.
Applications
• Telemetry signal processing
• Harsh environments
• Down-hole drilling
Related Literature
• For a full list of related documents, visit our website
- ISL71831SEH product page
ISL71831SEH
90
80
+125°C
IN01
IN02
IN03
.
.
.
70
+25°C
60
50
40
OUT
ADC
IN32
30
-55°C
20
10
0
5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
COMMON-MODE VOLTAGE (V)
ADDRESS
EN
FIGURE 1. TYPICAL APPLICATION
FIGURE 2. rDS(ON) vs COMMON-MODE VOLTAGE (V+ = 5V)
November 18, 2016
FN8759.2
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2015, 2016. All Rights Reserved
Intersil (and design) is a trademark owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
1
ISL71831SEH
Ordering Information
ORDERING NUMBER
PART NUMBER
TEMP RANGE
(°C)
PACKAGE
(RoHS COMPLIANT)
PKG.
DWG. #
(Note 2)
(Note 1)
5962L1524801VXC
ISL71831SEHVF
-55 to +125
-55 to +125
48 Ld CQFP
R48.A
R48.A
N/A
ISL71831SEHF/PROTO
ISL71831SEHVX
48 Ld CQFP
DIE
5962L1524801V9A
-55 to +125
N/A
ISL71831SEHX/SAMPLE
ISL71831SEHEV1Z
-55 to +125
DIE
N/A
Evaluation Board
NOTES:
1. These Intersil Pb-free Hermetic packaged products employ 100% Au plate - e4 termination finish, which is RoHS compliant and compatible with both
SnPb and Pb-free soldering operations.
2. Specifications for Rad Hard QML devices are controlled by the Defense Logistics Agency Land and Maritime (DLA). The SMD numbers listed must be
used when ordering.
TABLE 1. KEY DIFFERENCES BETWEEN FAMILY OF PARTS
PART NUMBER
ISL71830SEH
NUMBER OF CHANNELS
OUTPUT LEAKAGE
60nA
PACKAGE
28 Ld CDFP
48 Ld CQFP
16
32
ISL71831SEH
120nA
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2
ISL71831SEH
Pin Configuration
ISL71831SEH
(48 LD CQFP)
TOP VIEW
6
5
4
3
2
1 48 47 46 45 44 43
42
IN28
IN27
IN26
IN25
IN24
IN23
IN22
IN21
IN20
IN19
IN18
IN17
7
IN12
IN11
IN10
IN9
IN8
IN7
IN6
IN5
IN4
IN3
IN2
IN1
41
40
39
38
37
36
35
34
33
32
31
8
9
10
11
12
13
14
15
16
17
18
1920 2122232425 26 2728 2930
Pin Descriptions
PIN NAME
ESD CIRCUIT
PIN NUMBER
DESCRIPTION
OUT
2
1
1
1
Output for multiplexer.
Positive power supply.
V+
19
INx
3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, Inputs for multiplexer.
17, 18, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40,
41, 42, 43, 44, 45, 46
Ax
EN
1
1
1
-
21, 22, 23, 24, 25
Address lines for multiplexer.
28
Enable control for multiplexer (active low).
Reference voltage used to set logic thresholds.
Ground
VREF
GND
LID
20
29
-
-
Package lid is internally connected to GND (pin 29).
Not electrically connected.
NC
-
2, 26, 27, 30, 47, 48
VDD
PIN #
9V CLAMP
PIN #
9V CLAMP
9V CLAMP
GND
GND
CIRCUIT 1
CIRCUIT 2
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ISL71831SEH
Absolute Maximum Ratings
Thermal Information
Maximum Supply Voltage (V+ to GND). . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V
Maximum Supply Voltage (V+ to GND) (Note 5) . . . . . . . . . . . . . . . . . . .6.3V
Analog Input Voltage Range (INX) . . . . . . . . . . . . . . . . . . . . . . . . -0.4V to 7V
Digital Input Voltage Range (EN, Ax) . . . . . . . . . . . . . . . (GND - 0.4V) to VREF
VREF to GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7V
ESD Tolerance
Thermal Resistance (Typical)
48 Ld CQFP (Notes 3, 4) . . . . . . . . . . . . . . .
Storage Temperature Range. . . . . . . . . . . . . . . . . . . . . . . .-65°C to +150°C
JA (°C/W)
59
JC (°C/W)
5
Recommended Operating Conditions
Human Body Model (Tested per MIL-STD-883 TM 3015) . . . . . . . . . 5kV
Charged Device Model (Tested per JESD22-C101D) . . . . . . . . . . . . 250V
Machine Model (Tested per JESD22-A115-A). . . . . . . . . . . . . . . . . . 250V
Ambient Operating Temperature Range . . . . . . . . . . . . . .-55°C to +125°C
Maximum Operating Junction Temperature . . . . . . . . . . . . . . . . . .+150°C
Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3V to 5.5V
V
REF to GND. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .3V to 5.5V
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact product
reliability and result in failures not covered by warranty.
NOTES:
3. JA is measured with the component mounted on a high-effective thermal conductivity test board in free air. See Tech Brief TB379 for details.
4. For JC, the “case temp” location is the center of the package underside.
5. Tested in a heavy ion environment at LET = 60MeV•cm2/mg at +125°C.
+
Electrical Specifications (V = 5V) GND = 0V, VREF = 3.3V, VIH = 3.3V, VIL = 0V, TA = +25°C, unless otherwise noted.
Boldface limits apply across the operating temperature range, -55°C to +125°C.; over a total ionizing dose of 75krad(Si) with exposure at a low dose
rate of <10mrad(Si)/s.
MIN
MAX
PARAMETER
Analog Input Signal Range
Channel On-Resistance
SYMBOL
VIN
TEST CONDITIONS
(Note 6)
TYP
(Note 6)
UNIT
V
0
-
V+
rDS(ON)
V+ = 4.5V, VIN = 0V to V+
IOUT = 1mA
40
-
120
Ω
rDS(ON) Match between Channels
ΔrDS(ON)
V+ = 4.5V, VIN = 0V, 2.25V, 4.5V
-
5
Ω
IOUT = 1mA
On-Resistance Flatness
Switch Input Off Leakage
rFLAT(ON)
IIN(OFF)
V+ = 4.5V, VIN = 0V to V+
-
-
-
40
30
Ω
V+ = 5.5V, VIN = 5V,
-30
nA
Unused inputs and VOUT = 0.5V
V+ = 5.5V, VIN = 0.5V,
Unused inputs and VOUT = 5V
-30
-
-
30
nA
nA
Switch Input Off Overvoltage Leakage
IIN(OFF-OV)
IIN(POWER-OFF)
IIN(POWER-OFF)
IIN(ON-OV)
V+ = 5.5V, VIN = 7V,
-30
30
Unused inputs and VOUT = 0V
TA = +25°C, -55°C
TA = +125°C
-30
-30
-20
-
-
-
120
30
nA
nA
nA
Post radiation, +25°C
Switch Input Off Leakage
with Supply Voltage Grounded
VIN = 7V, VOUT = 0V
V+ = VEN = VREF = 0V
TA = +25°C, -55°C
20
TA = +125°C
-20
-20
-20
-
-
-
100
20
nA
nA
nA
Post radiation, +25°C
Switch Input Off Leakage
with Supply Voltage Open
VIN = 7V, VOUT = 0V
V+ = VEN = VREF = Open,
TA = +25°C, -55°C
20
TA = +125°C
-20
-20
-
-
-
100
20
nA
nA
µA
Post radiation, +25°C
V+ = 5.5V, VIN = 7V
Switch On Input Leakage with
Overvoltage Applied to the Input
2.75
5.50
VOUT = Open
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ISL71831SEH
+
Electrical Specifications (V = 5V) GND = 0V, VREF = 3.3V, VIH = 3.3V, VIL = 0V, TA = +25°C, unless otherwise noted.
Boldface limits apply across the operating temperature range, -55°C to +125°C.; over a total ionizing dose of 75krad(Si) with exposure at a low dose
rate of <10mrad(Si)/s. (Continued)
MIN
MAX
PARAMETER
SYMBOL
IOUT(OFF)
TEST CONDITIONS
V+ = 5.5V, VOUT = 5V
(Note 6)
TYP
-
(Note 6)
UNIT
nA
Switch Output Off Leakage
-30
30
All inputs = 0.5V,
TA = +25°C, -55°C
TA = +125°C
0
-
-
-
200
30
nA
nA
nA
Post radiation, +25°C
-30
-30
V+ = 5.5V, VOUT = 0.5V
All inputs = 5V,
30
TA = +25°C, -55°C
TA = +125°C
-60
-30
-30
-
-
-
0
nA
nA
nA
Post radiation, +25°C
30
30
Switch Output Leakage
with Switch Enabled
IOUT(ON)
V+ = 5.5V, VIN = VOUT = 5V
All unused inputs at 0.5V
TA = +25°C, -55°C
TA = +125°C
0
-
-
-
200
30
nA
nA
nA
Post radiation, +25°C
-30
-30
V+ = 5.5V, VIN = VOUT = 0.5V
All unused inputs at 5V
TA = +25°C, -55°C
30
TA = +125°C
-60
-30
1.3
-
-
-
0
nA
nA
V
Post radiation, +25°C
V+ = 5.5V
30
1.6
Logic Input Voltage High/Low
Input Current with VAH, VENH
Input Current with VAL, VENL
Quiescent Supply Current
VIH/L
V
REF = 3.3V
IAH, IENH
IAL, IENL
ISUPPLY
V+ = 5.5V
V
-0.1
-0.1
-
-
-
-
0.1
0.1
100
µA
µA
nA
EN = VA = VREF
V+ = 5.5V
V
EN = VA = 0V
V+ = VREF = VEN = 5.5V
VA = 0V, TA = +25°C, -55°C
TA = +125°C
-
-
-
-
-
-
500
300
200
nA
nA
nA
Post radiation, +25°C
V+ = VREF = VEN = 5.5V
Reference Quiescent Supply Current
IREF
VA = 0V
DYNAMIC
Addressing Transition Time
Break-Before-Make Delay
Enable Turn-On Time
Enable Turn-Off Time
Charge Injection
Off Isolation
tAHL
tBBM
V+ = 4.5V; Figure 3
10
5
-
70
40
40
50
5.0
-
ns
ns
ns
ns
pC
dB
dB
V+ = 4.5V; Figure 5
18
tEN(ON)
tEN(OFF)
VCTE
V+ = 4.5V; Figure 4
-
-
V+ = 4.5V; Figure 4
-
-
CL = 100pF, VIN = 0V, Figure 6
VEN = VREF, RL = open, f = 1kHz
-
1.4
VISO
60
73
-
-
Crosstalk
VCT
VEN = 0V, f = 1kHz, VP-P = 1V
RL = open
-
Input Capacitance
Output Capacitance
CIN(OFF)
f = 1MHz
f = 1MHz
-
-
-
-
5
pF
pF
COUT(OFF)
25
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ISL71831SEH
+
Electrical Specifications (V = 3.3V) VREF = 3.3V, VIH = 3.3V, VIL = 0V, TA = +25°C, unless otherwise noted.
Boldface limits apply across the operating temperature range, -55°C to +125°C.; over a total ionizing dose of 75krad(Si) with exposure at a low dose
rate of <10mrad(Si)/s.
MIN
MAX
PARAMETER
VIN
DESCRIPTION
Analog Input Signal Range
Channel On-Resistance
CONDITIONS
(Note 6)
TYP
(Note 6)
UNIT
V
0
V+
rDS(ON)
V+ = 3V, VIN = 0V to V+
OUT = 1mA
25
70
-
200
Ω
I
ΔrDS(ON)
rDS(ON) Match Between Channels
V+ = 3V, VIN = 0.5V, 2.5V
-
5
Ω
IOUT = 1mA
rFLAT(ON)
IIN(OFF)
On-Resistance Flatness
Switch Input Off Leakage
V+ = 3V, VIN = 0V to V+
-
-
-
50
30
Ω
V+ = 3.6V, VIN = 3.1V,
-30
nA
Unused inputs and VOUT = 0.5V
V+ = 3.6V, VIN = 0.5V,
Unused inputs and VOUT = 3.1V
-30
-
-
30
nA
nA
IIN(OFF-OV)
Switch Input Off Overvoltage Leakage V+ = 3.6V, VIN = 7V,
Unused inputs and VOUT = 0V,
-30
30
TA = +25°C, -55°C
TA = +125°C
-30
-30
1.8
-
-
-
100
30
nA
nA
µA
Post radiation, +25°C
V+ = 3.6V, VIN = 7V
IIN(ON-OV)
Switch On Input Leakage with
Overvoltage Applied to the Input
3.6
VOUT = OPEN
IOUT(OFF)
Switch Output Off Leakage
V+ = 3.6V, VOUT = 3.1V,
All inputs = 0.5V,
-30
-
30
nA
TA = +25°C, -55°C
TA = +125°C
0
-
-
-
120
30
nA
nA
nA
Post radiation, +25°C
-30
-30
V+ = 3.6V, VOUT = 0.5V,
All inputs = 3.1V,
30
TA = +25°C, -55°C
TA = +125°C
0
-
-
-
30
30
30
nA
nA
nA
Post radiation, +25°C
-30
-30
IOUT(ON)
Switch Output Leakage with Switch
Enabled
V+ = 3.6V, VIN = VOUT = 3.1V
All unused inputs at 0.5V,
TA = +25°C, -55°C
TA = +125°C
0
-
-
-
120
30
nA
nA
nA
Post radiation, +25°C
-30
-30
V+ = 3.6V, VIN = VOUT = 0.5V
All unused inputs at 3.1V,
TA = +25°C, -55°C
30
TA = +125°C
0
-30
-
-
-
-
30
30
nA
nA
nA
Post radiation, +25°C
V+ = VREF = VEN = 3.6V
ISUPPLY
Quiescent Supply Current
100
VA = 0V, TA = +25°C, -55°C
TA = +125°C
-
-
-
-
-
-
300
300
200
nA
nA
nA
Post radiation, +25°C
V+ = VREF = VEN = 3.6V, VA = 0V
IREF
Reference Quiescent Supply Current
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ISL71831SEH
+
Electrical Specifications (V = 3.3V) VREF = 3.3V, VIH = 3.3V, VIL = 0V, TA = +25°C, unless otherwise noted.
Boldface limits apply across the operating temperature range, -55°C to +125°C.; over a total ionizing dose of 75krad(Si) with exposure at a low dose
rate of <10mrad(Si)/s. (Continued)
MIN
MAX
PARAMETER
DYNAMIC
tAHL
DESCRIPTION
CONDITIONS
(Note 6)
TYP
(Note 6)
UNIT
Addressing Transition Time
Break-Before-Make Delay
Enable Turn-On Time
V+ = 3V; Figure 3
10
-
100
50
ns
ns
ns
ns
tBBM
V+ = 3V; Figure 5
V+ = 3V; Figure 4
V+ = 3V; Figure 4
5
-
15
tEN(ON)
-
-
60
tEN(OFF)
NOTE:
6. Compliance to datasheet limits is assured by one or more methods: production test, characterization and/or design.
Enable Turn Off Time
-
80
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ISL71831SEH
TABLE 2. TRUTH TABLE
A4
X
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
A3
X
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
A2
X
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
A1
X
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
A0
X
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
EN
1
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
“ON”-CHANNEL
None
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Note: X = Don’t care, “1” = Logic High, “0” = Logic Low
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ISL71831SEH
Timing Diagrams
VREF
ISL71831SEH
“11111”
V+, 0V
0V, V+
A4
A3
A2
A1
A0
IN01
IN02-IN31
IN32
ADDRESS
50%
50%
VREF
0V
50Ω
“00000”
0V
V+
tAHL
tALH
90%
90%
EN
OUT
0V
VOUT
50pF
OUTPUT
10kΩ
0V
FIGURE 4. ADDRESS TIME TO OUTPUT DIAGRAM
FIGURE 3. ADDRESS TIME TO OUTPUT TEST CIRCUIT
VREF
ISL71831SEH
IN01
A4
A3
A2
A1
A0
V+
IN02-IN32
ENABLE
50%
50%
0V
V+
EN
OUT
VOUT
50pF
tDISABLE
tENABLE
90%
VREF
0V
1kΩ
OUTPUT
50Ω
10%
0V
FIGURE 6. TIME TO ENABLE/DISABLE OUTPUT DIAGRAM
FIGURE 5. TIME TO ENABLE/DISABLE OUTPUT TEST CIRCUIT
VREF
ISL71831SEH
V+
IN01
IN02-IN31
IN32
A4
A3
A2
A1
A0
ADDRESS
VREF
0V
50Ω
0V
V+
OUT
0V
EN
VOUT
50pF
50%
100Ω
OUT
0V
tBBM
FIGURE 8. BREAK-BEFORE-MAKE DIAGRAM
FIGURE 7. BREAK-BEFORE-MAKE TEST CIRCUIT
VREF
ISL71831SEH
IN01
IN02-IN31
IN32
0V
A4
A3
A2
A1
A0
ADDRESS
VREF
0V
50Ω
0V
0V
EN
OUT
VOUT
Q = 100pF * ΔVOUT
ΔVOUT
OUT
0V
100pF
FIGURE 10. CHARGE INJECTION DIAGRAM
FIGURE 9. CHARGE INJECTION TEST CIRCUIT
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ISL71831SEH
Typical Performance Curves V+ = 5V, VREF = 3.3V, VIN = 0V, RL = Open, TA = +25°C,
unless otherwise specified.
90
80
70
60
50
40
30
20
10
0
90
80
70
60
50
40
30
20
10
0
+125°C
+125°C
+25°C
+25°C
-55°C
-55°C
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
0
0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
COMMON-MODE VOLTAGE (V)
COMMON-MODE VOLTAGE (V)
FIGURE 12. rDS(ON) vs COMMON-MODE VOLTAGE (V+ = 5V)
FIGURE 11. rDS(ON) vs COMMON-MODE VOLTAGE (V+ = 4.5V)
80
140
+125°C
70
120
+125°C
+25°C
60
50
40
30
20
10
0
100
80
60
-55°C
+25°C
40
-55°C
2
20
0
0
1
3
4
5
0
0.5
1.0
1.5
2.0
2.5
3.0
COMMON-MODE VOLTAGE (V)
COMMON-MODE VOLTAGE (V)
FIGURE 13. rDS(ON) vs COMMON-MODE VOLTAGE (V+ = 5.5V)
FIGURE 14. rDS(ON) vs COMMON-MODE VOLTAGE (V+ = 3V)
120
120
+125°C
+125°C
100
100
80
60
80
60
40
+25°C
-55°C
40
20
0
-55°C
1.0
+25°C
20
0
0
0.5
1.0
1.5
2.0
2.5
3.0
0
0.5
1.5
2.0
2.5
3.0
3.5
COMMON-MODE VOLTAGE (V)
COMMON-MODE VOLTAGE (V)
FIGURE 15. rDS(ON) vs COMMON-MODE VOLTAGE (V+ = 3.3V)
FIGURE 16. rDS(ON) vs COMMON-MODE VOLTAGE (V+ = 3.6V)
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ISL71831SEH
Typical Performance Curves V+ = 5V, VREF = 3.3V, VIN = 0V, RL = Open, TA = +25°C,
unless otherwise specified. (Continued)
80
70
60
50
40
30
20
10
0
80
70
60
50
40
30
20
10
0
+125°C
+25°C
+125°C
-55°C
-55°C
+25°C
3.0
3.5
4.0
4.5
5.0
5.5
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
SUPPLY VOLTAGE (V)
FIGURE 18. ADDRESS PROPAGATION DELAY (LOW TO HIGH)
FIGURE 17. ADDRESS PROPAGATION DELAY (HIGH TO LOW)
40
35
+125°C
2V/DIV
30
25
20
t
ADLH = 44.087ns
15
-55°C
t
+25°C
5.0
10
5
ADHL = 34.382ns
0
3.0
1V/DIV
3.5
4.0
4.5
5.5
SUPPLY VOLTAGE (V)
200ns/DIV
FIGURE 19. ADDRESS PROPAGATION DELAY
FIGURE 20. BREAK-BEFORE-MAKE DELAY
60
50
40
30
20
10
0
2V/DIV
+125°C
1V/DIV
-55°C
t
BBM = 17.929ns
+25°C
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
200ns/DIV
FIGURE 21. BREAK-BEFORE-MAKE DELAY
FIGURE 22. ENABLE TO OUTPUT PROPAGATION DELAY
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ISL71831SEH
Typical Performance Curves V+ = 5V, VREF = 3.3V, VIN = 0V, RL = Open, TA = +25°C,
unless otherwise specified. (Continued)
60
+125°C
50
40
30
20
10
0
2V/DIV
1V/DIV
t
DISABLE = 41.720ns
-55°C
+25°C
t
ENABLE = 22.670ns
3.0
3.5
4.0
4.5
5.0
5.5
SUPPLY VOLTAGE (V)
200ns/DIV
FIGURE 23. DISABLE TO OUTPUT PROPAGATION DELAY
FIGURE 24. ENABLE/DISABLE PROPAGATION DELAY
120
100
80
60
40
20
0
90
80
70
60
50
40
30
20
10
0
100
1k
10k
100k
1M
10M
100M
100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
FREQUENCY (Hz)
FIGURE 25. OFF ISOLATION (V+ = 5V, +25°C, RL = 511Ω)
FIGURE 26. OFF ISOLATION (V+ = 5V, +25°C, RL= OPEN)
2.00
120
+125°C
1.80
1.60
1.40
1.20
1.00
0.80
0.60
0.40
0.20
0
100
80
60
40
20
0
+25°C
-55°C
3.0
3.5
4.0
4.5
5.0
5.5
100
1k
10k
100k
1M
10M
SUPPLY VOLTAGE (V)
FREQUENCY (Hz)
FIGURE 27. CROSSTALK (V+ = 5V, +25°C, RL = OPEN)
FIGURE 28. CHARGE INJECTION
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ISL71831SEH
+
Post Low Dose Rate Radiation Characteristics (V = 5V) Unless otherwise specified,
V+ = 5V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a low dose rate of <10mrad(Si)/s. This data is
intended to show typical parameter shifts due to low dose rate radiation. These are not limits nor are they guaranteed.
120
100
80
60
40
20
0
120
100
80
60
40
20
0
V
= 0.5V
V
= 0.5V
IN
IN
V
= 2.25V
V = 4V
IN
V
= 2.25V
30
IN
V
= 4V
IN
IN
0
10
20
30
40
50
60
70
70
70
80
0
10
20
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 29. rDS(ON) (V+ = 4.5V), BIASED
FIGURE 30. rDS(ON) (V+ = 4.5V), GROUNDED
120
100
80
60
40
20
0
120
100
80
60
40
20
0
GROUNDED
GROUNDED
BIASED
BIASED
0
10
20
30
40
50
60
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 31. rDS(ON) MINIMUM (V+ = 4.5V)
FIGURE 32. rDS(ON) MAXIMUM (V+ = 4.5V)
45
40
35
30
25
20
15
10
5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
GROUNDED
BIASED
GROUNDED
BIASED
0
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 33. rDS(ON) FLATNESS (V+ = 4.5V)
FIGURE 34. rDS(ON) MATCH (V+ = 4.5V, VIN = 0.5V)
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ISL71831SEH
+
Post Low Dose Rate Radiation Characteristics (V = 5V) Unless otherwise specified,
V+ = 5V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a low dose rate of <10mrad(Si)/s. This data is
intended to show typical parameter shifts due to low dose rate radiation. These are not limits nor are they guaranteed. (Continued)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.0
0.8
0.6
0.4
GROUNDED
0.2
0.0
GROUNDED
BIASED
-0.2
-0.4
-0.6
-0.8
-1.0
BIASED
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 36. IS(OFF) (V+ = 5.5V, VIN = 5V)
FIGURE 35. rDS(ON) MATCH (V+ = 4.5V, VIN = 4V)
1.0
0.8
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
BIASED
0.6
GROUNDED
0.4
GROUNDED
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
BIASED
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 37. IS(OFF) (V+ = 5.5V, VIN = 7V)
FIGURE 38. IS(ON) (V+ = 5.5V, VIN = 5V)
1.0
0.8
1.0
0.8
GROUNDED
0.6
0.6
GROUNDED
0.4
0.4
0.2
0.2
0.0
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
-0.2
-0.4
-0.6
-0.8
-1.0
BIASED
BIASED
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 39. ID(ON) (V+ = 5.5V, VIN = 5V)
FIGURE 40. ID(OFF) (V+ = 3.6V, VIN = 3.1V)
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ISL71831SEH
+
Post Low Dose Rate Radiation Characteristics (V = 3.3V) Unless otherwise
specified, V+ = 3.3V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a low dose rate of <10mrad(Si)/s. This
data is intended to show typical parameter shifts due to low dose rate radiation. These are not limits nor are they guaranteed.
120
100
80
60
40
20
0
120
100
80
60
40
20
0
V
= 0.5V
IN
V
= 0.5V
V
= 1.5V
V
= 1.5V
IN
IN
IN
V
= 2.5V
V
= 2.5V
IN
IN
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 42. rDS(ON) (V+ = 3V) - GROUNDED
FIGURE 41. rDS(ON) (V+ = 3V), BIASED
120
100
80
60
40
20
0
120
100
80
60
40
20
0
GROUNDED
BIASED
BIASED
GROUNDED
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 43. rDS(ON) MINIMUM (V+ = 3V)
FIGURE 44. rDS(ON) MAXIMUM (V+ = 3V)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
45
40
35
30
25
20
15
10
5
GROUNDED
GROUNDED
BIASED
BIASED
0
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 45. rDS(ON) FLATNESS (V+ = 3V)
FIGURE 46. rDS(ON) MATCH (V+ = 3V, VIN = 0.5V)
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ISL71831SEH
+
Post Low Dose Rate Radiation Characteristics (V = 3.3V) Unless otherwise
specified, V+ = 3.3V, VCM = 0, VO = 0V, TA = +25°C. This data is typical mean test data post radiation exposure at a low dose rate of <10mrad(Si)/s. This
data is intended to show typical parameter shifts due to low dose rate radiation. These are not limits nor are they guaranteed. (Continued)
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
1.0
0.8
0.6
GROUNDED
0.4
0.2
0.0
GROUNDED
BIASED
-0.2
-0.4
-0.6
-0.8
-1.0
BIASED
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 47. rDS(ON) MATCH (V+ = 3V, VIN = 2.5V)
FIGURE 48. IS(OFF) (V+ = 3.6V, VIN = 3.1V)
1.0
0.8
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
0.6
GROUNDED
0.4
GROUNDED
BIASED
0.2
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
BIASED
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 49. IS(OFF) (V+ = 3.6V, VIN = 7V)
FIGURE 50. IS(ON) (V+ = 3.6V, VIN = 7V)
1.0
0.8
1.0
0.8
0.6
0.6
GROUNDED
BIASED
BIASED
0.4
GROUNDED
0.4
0.2
0.2
0.0
0.0
-0.2
-0.4
-0.6
-0.8
-1.0
-0.2
-0.4
-0.6
-0.8
-1.0
0
10
20
30
40
50
60
70
80
0
10
20
30
40
50
60
70
80
LOW DOSE RATE RADIATION (krad(Si))
LOW DOSE RATE RADIATION (krad(Si))
FIGURE 51. ID(ON) (V+ = 3.6V, VIN = 3.1V)
FIGURE 52. ID(OFF) (V+ = 3.6V, VIN = 3.1V)
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ISL71831SEH
ISL71830SEH vs ISL71831SEH
Applications Information
A 16-channel version of the ISL71831SEH is available in a 28 Ld
CDFP. In terms of performance specs, the parts are very similar
in behavior. Apart from the apparent increase in channel density,
the ISL71831SEH does have slightly higher output leakage
compared to the ISL71830SEH due to having more channels
connected to the output. The supply current for the ISL71831SEH
is also a bit higher compared to the ISL71830SEH.
Power-Up Considerations
The circuit is designed to be insensitive to any given power-up
sequence between V+ and VREF, however, it is recommended
that all supplies power-up relatively close to each other.
Overvoltage Protection
The ISL71831SEH has overvoltage protection on both the input
as well as the output. On the output, the voltage is limited to a
diode past the rails. Each of the inputs has independent
overvoltage protection that works regardless of the switch being
selected. If a switch experiences an overvoltage condition, the
switch is turned off. As soon as the voltage returns within the
rails, the switch returns to normal operation.
VREF and Logic Functionality
The VREF pin sets the logic threshold for the ISL71831SEH. The
range for VREF is between 3V and 5.5V. The switching point is set
to around 50% of the voltage presented to VREF. This switching
point allows for both 5V and 3.3V logic control.
For additional products, see www.intersil.com/en/products.html
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
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ISL71831SEH
Assembly Related Information
Die Characteristics
SUBSTRATE POTENTIAL
Die Dimensions
Floating
3102µm x 2800µm (122.1260 mils x 110.2362 mils)
Thickness: 483µm ±25µm (19 mils ±1 mil)
Additional Information
Interface Materials
WORST CASE CURRENT DENSITY
1.6 x 105 A/cm2
GLASSIVATION
Type: 12kÅ Silicon Nitride on 3kÅ Oxide
TRANSISTOR COUNT
TOP METALLIZATION
7734
Type: 300Å TiN on 2.8µm AlCu
In Bondpads, TiN has been removed.
Weight of Packaged Device
1.522 grams
BACKSIDE FINISH
Lid Characteristics
Silicon
Finish: Gold
Potential: Grounded, tied to package pin 29
PROCESS
P6SOI
Metalization Mask Layout
IN32
IN31
IN30
IN29
IN28
IN27
IN26
IN25
IN24
IN23
IN22
IN21
IN20
IN19
IN18
IN17
IN12
IN11
IN13
IN14
IN15
IN16
OUT
IN10
IN09
IN08
IN07
IN06
IN05
IN04
IN03
IN02
IN01
V+
VREF
A0
A1
A2
A3
A4
EN
GND
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ISL71831SEH
TABLE 3. ISL71831SEH DIE LAYOUT X-Y COORDINATES
PAD
NUMBER
PAD
NAME
PACKAGING
PIN
ΔX
(µm)
ΔY
(µm)
X
(µm)
Y
(µm)
1
IN28
IN29
IN30
IN31
IN32
OUT
IN16
IN15
IN14
IN13
IN12
IN11
IN10
IN9
P42
P43
P44
P45
P46
P1
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
110
2769.8
2526.8
2320.8
2114.8
1908.8
1268.8
1062.8
856.8
2467.8
2467.8
2467.8
2467.8
2467.8
2467.8
2467.8
2467.8
2467.8
2467.8
2467.8
2261.8
2055.8
1849.8
1643.8
1437.8
1231.8
1025.8
819.8
2
3
4
5
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
36
37
38
39
40
41
42
43
44
45
46
47
48
P3
P4
P5
650.8
P6
444.8
P7
201.8
P8
201.8
P9
201.8
P10
P11
P12
P13
P14
P15
P16
P17
P18
P19
P20
P21
P22
P23
P24
P25
P28
P29
P31
P32
P33
P34
P35
P36
P37
P38
P39
P40
P41
201.8
IN8
201.8
IN7
201.8
IN6
201.8
IN5
201.8
IN4
201.8
IN3
201.8
613.8
IN2
201.8
407.8
IN1
201.8
201.8
V+
427.8
201.8
VREF
A0
638.8
201.8
849.8
201.8
A1
1055.8
1261.8
1467.8
1673.8
2313.8
2543.8
2769.8
2769.8
2769.8
2769.8
2769.8
2769.8
2769.8
2769.8
2769.8
2769.8
2769.8
201.8
A2
201.8
A3
201.8
A4
201.8
EN
201.8
GND
IN17
IN18
IN19
IN20
IN21
IN22
IN23
IN24
IN25
IN26
IN27
201.8
201.8
407.8
613.8
819.8
1025.8
1231.8
1437.8
1643.8
1849.8
2055.8
2261.8
NOTE: Origin of coordinates is the center of the die.
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19
ISL71831SEH
Revision History The revision history provided is for informational purposes only and is believed to be accurate, but not warranted.
Please visit our website to make sure you have the latest revision.
DATE
November 18, 2016 FN8759.2 On page 1 - Updated Related Literature section
On page 3 - Added Circuit 1 and Circuit 2 diagrams and ESD Circuit column in the pin description table.
December 10, 2015 FN8759.1 On page 1
Changed in Description, 2nd paragraph “rON“to “rDS(ON)
REVISION
CHANGE
“
Changed in Description and Features supply voltage from “3.3V to 5V” to “3V to 5.5V”.
Updated Features “SEL/SEB LETTH” by changing V+ from 5V to 6.3V and value from 86.4 to 60MeV•cm2/mg.
Removed High Dose rate feature.
Updated Low Dose value from 100 to 75krad(Si) on Feature bullet and Note.
Made correction to package in last paragraph of description from “CQFP” to “CDFP”
Made correction to SMD from “5962-1548” to “5962-15248”
On page 4
- In the Abs Max Section, changed from “Maximum Supply Voltage (V+ to V-) (Note 5) . . . . . 7V” to “Maximum Supply
Voltage (V+ to GND) (Note 5) . . . . . 6.3V”
Updated Note 5 by changing value from 86.3 to 60MeV•cm2/mg
Electrical Spec changes
- Updated heading on “Electrical Specifications (V+ = 5V)” table.
- Changed Parameter names from rON to rDS(ON)
- Changed rDS(ON) typical from 60 to 40.
- Removed MIN “15” from rDS(ON)
- Added Leakage to description of IIN(OFF-0V)
On page 5
.
- Changed tBBM typical from “15” to “18”
- Changed VCTE typical from “2” to “1.4”
- For VISO
,
-Updated Test Conditions from “VEN = 0V” to “VEN = VREF”
-Moved typical values to MIN column.
- For VCT
,
-Updated Test Conditions from “VEN = VREF” to “VEN = 0V”
-Moved typical values to MIN column.
On page 6
- Changed Parameter names from rON to rDS(ON)
- Changed rDS(ON) typical from 60 to 70.
.
- Added Leakage to description of IIN(OFF-0V)
On page 7 - Changed tBBM typical from “15” to “25”
On page 8 - Added Table 2
On page 9 - Updated Figure 7 by changing 1kΩ to 100Ω.
On page 11 through page 16
- Updated y-axis label on Figures 20, 22 and 23
- Updated y-axis label and title on Figures 29 through 35 and Figures 41 through 47
On page 18 - Replaced Metalization Mask Layout image.
On page 19 - Updated the Pad Name for Pad 26 from “VDD” to “V+”
September 24, 2015 FN8759.0 Initial Release
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FN8759.2
November 18, 2016
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ISL71831SEH
For the most recent package outline drawing, see R48.A.
Package Outline Drawing
R48.A
48 CERAMIC QUAD FLATPACK PACKAGE (CQFP)
Rev 3, 10/12
1.118 (28.40)
1.080 (27.43)
0.572 (14.53)
0.555 (14.10)
#1#48
0.287 (7.29)
0.253 (6.43)
0.040 (1.02) BSC
PIN 1
INDEX AREA
1.118 (28.40)
1.080 (27.43)
0.572 (14.53)
0.555 (14.10)
0.007 (0.18) MIN
0.015 (0.38)
0.008 (0.20)
0.015 (0.38) MIN
TOP VIEW
0.099 (2.51)
0.076 (1.93)
0.016 (0.41)
0.009 (0.23)
SIDE VIEW
NOTE:
1. All dimensions are in inches (millimeters).
FN8759.2
November 18, 2016
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