RFD12N06RLESM [INTERSIL]
12A, 60V, 0.135 Ohm, N-Channel, Logic Level, Power MOSFETs; 12A ， 60V ， 0.135 Ohm的N通道，逻辑电平功率MOSFET
| 型号： | RFD12N06RLESM |
| 厂家： | 
Intersil |
| 描述： | 12A, 60V, 0.135 Ohm, N-Channel, Logic Level, Power MOSFETs |
| 文件： | 总6页 (文件大小：52K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
RFD12N06RLE, RFD12N06RLESM,
RFP12N06RLE
Data Sheet
July 1999
File Number 2407.4
12A, 60V, 0.135 Ohm, N-Channel, Logic
Level, Power MOSFETs
Features
• 12A, 60V
[ /Title
(RFD1
These N-Channel logic level ESD protected power
MOSFETs are manufactured using the MegaFET process.
• r
= 0.135Ω
DS(ON)
• Electrostatic Discharge Protected
• UIS Rating Curve (Single Pulse)
• Design Optimized for 5V Gate Drive
• Related Literature
2N06R This process, which uses feature sizes approaching those of
LE,
RFD12
N06RL
ESM,
RFP12
LSI integrated circuits, gives optimum utilization of silicon,
resulting in outstanding performance. They were designed
for use with logic level (5V) driving sources in applications
such as programmable controllers, automotive switching,
switching regulators, switching converters, motor drivers,
relay drivers, and emitter switches for bipolar transistors.
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
N06RL This performance is accomplished through a special gate
Symbol
oxide design which provides full rated conductance at gate
E)
/Sub-
ject
D
biases in the 3V to 5V range, thereby facilitating true on-off
power control directly from logic circuit supply voltages.
Formerly developmental type TA09861.
(12A,
60V,
0.135
Ohm,
N-
Chan-
nel,
Logic
Level,
Power
G
Ordering Information
PART NUMBER
PACKAGE
BRAND
12N6LE
RFD12N06RLE
TO-251AA
RFD12N06RLESM TO-252AA
RFP12N06RLE TO-220AB
12N6LE
S
12N06RLE
NOTE: When ordering, use the entire part number. Add the suffix 9A to
obtain the TO-252AA variant in tape and reel, i.e., RFD12N06RLESM9A.
MOS- Packaging
JEDEC TO-251AA
JEDEC TO-252AA
FETs)
/Autho
r ()
/Key-
words
(Inter-
sil
SOURCE
DRAIN
DRAIN
GATE
(FLANGE)
DRAIN
(FLANGE)
GATE
SOURCE
JEDEC TO-220AB
Corpo-
ration,
N-
SOURCE
DRAIN
GATE
Chan-
nel,
DRAIN (FLANGE)
Logic
Level,
Power
MOS-
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-12
RFD12N06RLE, RFD12N06RLESM, RFP12N06RLE
o
Absolute Maximum Ratings
T
= 25 C, Unless Otherwise Specified
C
RFD12N06RLE,
RFD12N06RLESM,
RFP12N06RLE
UNITS
Drain to Source Voltage (Note 1). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
60
V
V
DSS
DGR
Drain to Gate Voltage (R
GS
= 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
60
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
12
A
D
Pulsed Drain Current (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
26
A
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
-5 to10
V
GS
Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .P
40
W
D
o
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
0.32
W/ C
Single Pulse Avalanche Energy Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .E
Electrostatic Discharge Rating ESD, MIL-STD-883, Category B(2)
Refer to UIS SOA Curve
AS
2
kV
o
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
Maximum Temperature for Soldering
T
-55 to 150
C
J, STG
o
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
300
260
C
C
L
o
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
o
o
1. T = 25 C to 125 C.
J
o
Electrical Specifications
PARAMETER
T = 25 C, Unless Otherwise Specified
C
SYMBOL
TEST CONDITIONS
= 250µA, V = 0V
GS
MIN
TYP
MAX
-
UNITS
V
Drain to Source Breakdown Voltage
Gate Threshold Voltage
BV
I
60
1
-
-
-
DSS
D
V
V
V
V
V
= V , I = 250µA
2
V
GS(TH)
GS
DS
DS
GS
DS
D
Zero Gate Voltage Drain Current
I
= Rated BV
, V
= 0V
, V = 0V, T = 150 C
-
1
µA
µA
µA
Ω
DSS
DSS GS
o
= 0.8 x Rated BV
= -5 to 10V
-
-
25
±10
0.135
0.160
60
-
DSS GS
C
Gate to Source Leakage Current
I
-
-
GSS
Drain to Source On Resistance (Note 2)
r
I
I
= 12A, V
= 12A, V
= 5V (Figures 7, 8)
= 4V
-
-
DS(ON)
D
D
GS
-
-
Ω
GS
Turn-On Time
t
V
= 30V, ID ≈ 6A, R = 5Ω, R
= 6.25Ω,
-
-
ns
(ON)
DD
L
GS
V
= 5V, (Figures 15, 16)
GS
Turn-On Delay Time
Rise Time
t
-
12
20
24
12
-
ns
d(ON)
t
-
-
ns
r
Turn-Off Delay Time
Fall Time
t
-
-
ns
d(OFF)
t
-
-
ns
f
Turn-Off Time
t
-
60
40
20
1.5
3.125
100
62
ns
(OFF)
Total Gate Charge
Q
V
= 0V to 10V
= 0V to 5V
= 0V to 1V
GS
V
R
= 48V, I = 12A,
= 4Ω,
-
-
nC
nC
nC
g(TOT)
GS
DD
D
L
Gate Charge at 5V
Threshold Gate Charge
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
Q
V
-
-
g(5)
GS
I
= 0.25mA
G(REF)
Q
V
(Figures 17, 18)
-
-
g(TH)
o
R
-
-
C/W
θJC
θJA
o
R
TO-251AA and TO-252AA
TO-220AB
-
-
C/W
o
-
-
C/W
Source to Drain Diode Specifications
PARAMETER
Source to Drain Diode Voltage
Reverse Recovery Time
NOTES:
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
V
V
I
I
= 12A
-
-
-
-
1.2
SD
SD
t
= 12A, dI /dt = 100A/µs
SD
200
ns
rr
SD
2. Pulse test: pulse width ≤ 300ms, duty cycle ≤ 2%.
3. Repetitive rating: pulse width is limited by maximum junction temperature.
6-13
RFD12N06RLE, RFD12N06RLESM, RFP12N06RLE
Typical Performance Curves Unless Otherwise Specified
1.2
1.0
0.8
15
10
5
0.6
0.4
0.2
0
0
25
50
75
100
125
150
0
25
50
75
100
125
150
o
o
T
, CASE TEMPERATURE ( C)
T , CASE TEMPERATURE ( C)
C
C
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
100
100
If R = 0
T
T
= MAX RATED
= 25 C
J
t
= (L)(I ) / (1.3 RATED BV - V
)
o
av
If R ≠ 0
= (L/R) In ((I x R) / (1.3 RATED BV
as
DSS DD
C
t
- V ) + 1)
DD
av
as
DSS
I
MAX CONTINUOUS
D
Idm
10
10
1
o
STARTING T = 25 C
J
STARTING T = 150 C
DC OPERATION
o
J
OPERATION IN THIS
AREA MAY BE LIMITED
BY r
DS(ON)
1
0.1
0.01
0.1
1
10
1
10
, DRAIN TO SOURCE VOLTAGE (V)
100
t
, TIME IN AVALANCHE (ms)
V
AV
DS
NOTE: Refer to Intersil Application Notes AN9321 and AN9322.
FIGURE 4. UNCLAMPED INDUCTIVE SWITCHING
CAPABILITY
FIGURE 3. FORWARD BIAS SAFE OPERATING AREA
30
20
10
0
30
PULSE DURATION = 80µs
DUTY CYCLE = 0.5 % MAX
V
= 10V
GS
o
V
= 5V
25 C
GS
V
= 15V
DS
o
o
150 C
-55 C
V
= 4V
GS
20
10
0
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
o
T
= 25 C
C
V
= 3V
= 2V
GS
V
GS
0
1.5
3
4.5
6
7.5
0
1.5
3
4.5
6
7.5
V
, DRAIN TO SOURCE VOLTAGE (V)
V
GS
, GATE TO SOURCE VOLTAGE (V)
DS
FIGURE 5. SATURATION CHARACTERISTICS
FIGURE 6. TRANSFER CHARACTERISTICS
6-14
RFD12N06RLE, RFD12N06RLESM, RFP12N06RLE
Typical Performance Curves Unless Otherwise Specified (Continued)
1.4
1.3
1.2
1.1
1.0
0.9
0.8
0.7
0.6
2.5
2.0
1.5
1.0
0.5
V
= 15V, I = 12A
I
D
= 12A, V = 5V
GS
DS
D
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
PULSE DURATION = 80µs
DUTY CYCLE = 0.5% MAX
0
-50
0
50
100
150
200
4.0
4.5
5.0
5.5
6.0
6.5
7.0
o
V
, GATE TO SOURCE VOLTAGE (V)
T , JUNCTION TEMPERATURE ( C)
GS
J
FIGURE 7. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs GATE TO SOURCE VOLTAGE
FIGURE 8. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
1.4
1.4
V
= V , I = 250µA
DS
I = 250µA
D
GS
D
1.3
1.2
1.1
1.0
1.3
1.2
1.1
1.0
0.9
0.8
0.9
0.8
0.7
0.6
0.7
0.6
-50
0
50
100
150
200
-50
0
50
100
150
200
o
o
T , JUNCTION TEMPERATURE ( C)
T , JUNCTION TEMPERATURE ( C)
J
J
FIGURE 9. NORMALIZED GATE THRESHOLD VOLTAGE vs
JUNCTION TEMPERATURE
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
1500
60
45
30
15
0
10
V
= 0V, f = 1MHz
GS
PLATEAU VOLTAGES IN
DESCENDING ORDER:
C
C
C
= C
+ C
GD
ISS
GS
= C
1250
1000
750
500
250
0
RSS
OSS
GD
V
V
V
V
= BV
DD
DD
DD
DD
DSS
= 0.75 BV
= 0.50 BV
≈ C
+ C
GD
DS
DSS
DSS
DSS
= 0.25BV
5
GATE
C
ISS
SOURCE
VOLTAGE
R
= 5.0Ω
L
C
C
I
= 0.25mA
OSS
RSS
G(REF)
V
= 5V
GS
DRAIN SOURCE VOLTAGE
0
0
5
10
15
20
25
I
I
I
I
G(REF)
G(REF)
t, TIME (µs)
80
20
V
, DRAIN TO SOURCE VOLTAGE (V)
DS
G(ACT)
G(ACT)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
FIGURE 12. NORMALIZED SWITCHING WAVEFORMS FOR
CONSTANT GATE CURRENT
6-15
RFD12N06RLE, RFD12N06RLESM, RFP12N06RLE
Test Circuits and Waveforms
V
DS
BV
DSS
L
t
P
V
DS
I
VARY t TO OBTAIN
P
AS
+
-
V
DD
R
REQUIRED PEAK I
G
AS
V
DD
V
GS
DUT
t
P
I
0V
AS
0
0.01Ω
t
AV
FIGURE 13. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 14. UNCLAMPED ENERGY WAVEFORMS
t
t
ON
OFF
t
d(OFF)
t
d(ON)
t
t
f
R
L
r
V
DS
V
90%
DS
90%
+
-
V
GS
V
GS
10%
10%
0
0
0V
90%
50%
DUT
R
GS
V
GS
50%
PULSE WIDTH
10%
FIGURE 15. SWITCHING TIME TEST CIRCUIT
FIGURE 16. RESISTIVE SWITCHING WAVEFORMS
V
DS
V
Q
R
DD
g(TOT)
L
V
DS
V
= 10V
GS
V
Q
GS
g(5)
+
-
V
DD
V
= 5V
V
GS
GS
DUT
V
= 1V
GS
I
g(REF)
0
Q
g(TH)
I
g(REF)
0
FIGURE 17. GATE CHARGE TEST CIRCUIT
FIGURE 18. GATE CHARGE WAVEFORMS
6-16
RFD12N06RLE, RFD12N06RLESM, RFP12N06RLE
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6-17
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