X9319WS8 [INTERSIL]
Digitally Controlled Potentiometer; 数字控制电位器
| 型号： | X9319WS8 |
| 厂家： | 
Intersil |
| 描述： | Digitally Controlled Potentiometer |
| 文件： | 总10页 (文件大小：244K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
X9319
®
Data Sheet
September 14, 2005
FN8185.1
DESCRIPTION
Digitally Controlled Potentiometer
(XDCP™)
The Intersil X9319 is a digitally controlled potentiometer
(XDCP). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory.
The wiper position is controlled by a 3-wire interface.
FEATURES
• Solid-state potentiometer
• 3-wire serial interface
• Terminal voltage, 0 to +10V
• 100 wiper tap points
—Wiper position stored in nonvolatile memory
and recalled on power-up
• 99 resistive elements
—Temperature compensated
—End to end resistance range ± 20%
• Low power CMOS
The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switch-
ing network. Between each element and at either end
are tap points accessible to the wiper terminal. The
position of the wiper element is controlled by the CS,
U/D, and INC inputs. The position of the wiper can be
stored in nonvolatile memory and then be recalled
upon a subsequent power-up operation.
—V
= 5V
The device can be used as a three-terminal potentiometer
for voltage control or as a two-terminal variable resistor for
current control in a wide variety of applications.
CC
—Active current, 3mA max.
—Standby current, 1mA max.
• High reliability
—Endurance, 100,000 data changes per bit
—Register data retention, 100 years
PIN CONFIGURATION
DIP/SOIC
• R
• Packages
value = 10kΩ and 50kΩ
TOTAL
V
INC
U/D
1
2
3
4
8
7
6
5
CC
—8 Ld SOIC and DIP
• Pb-free plus anneal available (RoHS compliant)
CS
X9319
R
L
R
H
V
R
SS
W
APPLICATIONS
• LCD bias control
• DC bias adjustment
• Gain and offset trim
• Laser diode bias control
• Voltage regulator output control
BLOCK DIAGRAM
U/D
INC
CS
R
99
H
Up/Down
Counter
V
(Supply Voltage)
CC
98
97
96
R
R
Up/Down
H
(U/D)
7-Bit
Nonvolatile
Memory
One
Control
and
Memory
Increment
(INC)
of
W
One
Wiper
Switches
Resistor
Array
Hundred
Decoder
Device Select
(CS)
R
L
2
Store and
Recall
Control
Circuitry
V
(Ground)
SS
1
0
V
V
CC
SS
General
R
R
L
W
Detailed
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
XDCP is a trademark of Intersil Americas Inc. Copyright Intersil Americas Inc. 2005. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.
1
X9319
Ordering Information
PART NUMBER
PART MARKING
X9319WP
X9319WP I
R
(kΩ)
TEMP RANGE (°C)
0 to 70
PACKAGE
TOTAL
X9319WP8
10
8 Ld PDIP
8 Ld PDIP
X9319WP8I
-40 to 85
0 to 70
X9319WS8*
X9319W
8 Ld SOIC (150 mil)
8 Ld SOIC (150 mil) (Pb-free)
8 Ld SOIC (150 mil)
8 Ld SOIC (150 mil) (Pb-free)
8 Ld PDIP
X9319WS8Z* (Note)
X9319WS8I*
X9319W Z
X9319W I
X9319W Z I
0 to 70
-40 to 85
-40 to 85
0 to 70
X9319WS8IZ* (Note)
X9319UP8
50
X9319UP8I
X9319UP I
-40 to 85
0 to 70
8 Ld PDIP
X9319US8
8 Ld SOIC (150 mil)
8 Ld SOIC (150 mil) (Pb-free)
8 Ld SOIC (150 mil)
8 Ld SOIC (150 mil) (Pb-free)
X9319US8Z (Note)
X9319US8I*
X9319U Z
X9319U I
X9319U Z I
0 to 70
-40 to 85
-40 to 85
X9319US8IZ (Note)
*Add "T1" suffix for tape and reel.
NOTE: Intersil Pb-free plus anneal products employ special Pb-free material sets; molding compounds/die attach materials and 100% matte tin plate
termination finish, which are RoHS compliant and compatible with both SnPb and Pb-free soldering operations. Intersil Pb-free products are MSL
classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC J STD-020.
PIN DESCRIPTIONS
DIP/SOIC Symbol
Brief Description
1
2
3
4
5
6
7
INC
U/D
Increment. Toggling INC while CS is low moves the wiper either up or down.
Up/Down. The U/D input controls the direction of the wiper movement.
The high terminal is equivalent to one of the fixed terminals of a mechanical potentiometer.
Ground.
R
H
V
SS
RW
The wiper terminal is equivalent to the movable terminal of a mechanical potentiometer.
The low terminal is equivalent to one of the fixed terminals of a mechanical potentiometer.
R
L
CS
Chip Select. The device is selected when the CS input is LOW, and de-selected when CS is
high.
8
V
Supply Voltage.
CC
FN8185.1
September 14, 2005
2
X9319
ABSOLUTE MAXIMUM RATINGS
COMMENT
Junction Temperature under bias...... -65°C to +135°C
Storage temperature ......................... -65°C to +150°C
Stresses above those listed under “Absolute Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only; functional operation of the
device (at these or any other conditions above those
listed in the operational sections of this specification) is
not implied. Exposure to absolute maximum rating con-
ditions for extended periods may affect device reliability.
Voltage on CS, INC, U/D and V
CC
with respect to V ................................. -1V to +7V
SS
R , R , R to ground..........................................+12V
H
W
L
Lead temperature (soldering 10s) ..................... 300°C
(10s)..............................................................±6mA
I
W
POTENTIOMETER CHARACTERISTICS
(V
= 5V ±10%, T = Full Operating Temperature Range unless otherwise stated)
CC
A
Limits
(4)
Symbol
Parameter
Min. Typ.
Max.
Unit
Test Conditions/Notes
End to end resistance tolerance
-20
+20
%
See ordering information
for values
V
/
R /R terminal voltage
V
10
25
V
mW
Ω
V
= 0V
SS
RH RL
H
L
SS
Power rating
R
Wiper resistance
40
200
+3.0
I
= 1mA
W
W
(5)
I
Wiper current
-3.0
mA
dBV
%
See test circuit
Ref: 1kHz
W
(7)
Noise
-120
1
Resolution
(1)
(3)
Absolute linearity
-1
+1
MI
V(RH) = 10V,
V(RL) = 0V
(2)
(3)
MI
Relative linearity
temperature coefficient
-0.2
+0.2
(5)
R
±300
ppm/°C
ppm/°C
pF
TOTAL
(5),(6)
Ratiometric temperature coefficient
Potentiometer capacitances
Supply Voltage
-20
4.5
+20
5.5
(5)
C /C /C
W
10/10/25
See equivalent circuit
H
L
V
V
CC
FN8185.1
September 14, 2005
3
X9319
D.C. OPERATING CHARACTERISTICS
(V
= 5V ±10%, T = Full Operating Temperature Range unless otherwise stated)
CC
A
Limits
(4)
Symbol
Parameter
Min. Typ.
Max.
Unit
Test Conditions
I
V
active current (Increment)
1
3
mA
CS = V , U/D = V or V and
CC
CC
IL
IL
IH
INC = 0.4V/2.4V @ min. t
CYC
R , R , R not connected
L
H
W
I
Standby supply current
300
1000
+10
µA
µA
CS ≥ 2.4V, U/D and INC = 0.4V
SB
R , R , R not connected
L
H
W
I
CS, INC, U/D input leakage
current
-10
V
= V to V
SS CC
LI
IN
V
CS, INC, U/D input HIGH voltage
CS, INC, U/D input LOW voltage
CS, INC, U/D input capacitance
2
V
+ 1
V
V
IH
CC
0.8
10
V
-1
IL
(5)
C
pF
V
= 5V, V = V , T = 25°C,
IN
CC
IN
SS
A
f = 1MHz
ENDURANCE AND DATA RETENTION
(V = 5V ±10%, T = Full Operating Temperature Range)
CC
A
Parameter
Minimum endurance
Data retention
Min.
Unit
100,000
100
Data changes per bit
Years
Notes: (1) Absolute linearity is utilized to determine actual wiper voltage versus expected voltage = [V(R
) - V(R
)]/MI
W(n)(actual)
W(n)(expected)
V(R
) = n(V(R ) - V(R ))/99 + V(R ), with n from 0 to 99.
H L L
W(n)(expected)
(2) Relative linearity is a measure of the error in step size between taps = [V(R
) - (V(R
W(n+1)
) - MI)]/MI
W(n)
(3) 1 Ml = Minimum Increment = [V(R ) - V(R )]/99.
H
L
(4) Typical values are for T = 25°C and nominal supply voltage.
A
(5) Guaranteed by device characterization.
(6) Ratiometric temperature coefficient = (V(R
and n from 0 to 99.
6
)
- V(R
)
)/[V(R
)
(T1 - T2) x 10 ], with T1 & T2 being 2 temperatures,
W T1(n)
W T2(n)
W T1(n)
(7) Measured with wiper at tap position 31, R grounded, using test circuit.
L
Test Circuit
Equivalent Circuit
R
TOTAL
Test Point
R
L
R
H
C
L
C
W
C
H
10pF
R
W
Force
Current
25pF
10pF
R
W
A.C. CONDITIONS OF TEST
Input pulse levels
0.8V to 2.0V
Input rise and fall times
Input reference levels
10ns
1.4V
FN8185.1
4
September 14, 2005
X9319
A.C. OPERATING CHARACTERISTICS
(V
= 5V ±10%, T = Full Operating Temperature Range unless otherwise stated)
CC
A
Limits
(4)
Typ.
Symbol
Parameter
Min.
100
100
1
Max.
Unit
ns
t
CS to INC setup
Cl
(5)
t
INC HIGH to U/D change
U/D to INC setup
ns
lD
(5)
t
µs
DI
t
INC LOW period
1
µs
lL
t
t
INC HIGH period
1
µs
lH
lC
INC inactive to CS inactive
CS deselect time (STORE)
CS deselect time (NO STORE)
1
µs
t
20
1
ms
µs
CPHS
(5)
t
CPHNS
(5)
t
INC to R change
W
100
500
µs
IW
t
INC cycle time
4
µs
CYC
(5)
t
t
INC input rise and fall time
Power-up to wiper stable
500
500
50
µs
,
R
F
(5)
t
µs
PU
V
(5)
t
V
CC
power-up rate
0.2
V/ms
R
CC
POWER-UP AND DOWN REQUIREMENTS
In order to prevent unwanted tap position changes, or an inadvertant store, bring the CS and INC high before or con-
currently with the V pin on powerup. The potentiometer voltages must be applied after this sequence is completed.
CC
During power-up, the data sheet parameters for the DCP do not fully apply until 1 millisecond after V
reaches its
CC
final value. The V
ramp spec is always in effect.
CC
A.C. TIMING
CS
t
CYC
t
CPHNS
t
t
t
t
t
CPHS
CI
IL
IH
IC
90%
90%
INC
U/D
10%
t
t
t
t
R
ID
DI
F
t
IW
(3)
MI
R
W
FN8185.1
5
September 14, 2005
X9319
PIN DESCRIPTIONS
R and R
PIN NAMES
Symbol
Description
High terminal
H
L
The high (R ) and low (R ) terminals of the X9319 are
H
L
R
H
equivalent to the fixed terminals of a mechanical
potentiometer. The terminology of R and R refer-
R
W
Wiper terminal
L
H
R
L
Low terminal
ences the relative position of the terminal in relation to
wiper movement direction selected by the U/D input
and not the voltage potential on the terminal.
V
Ground
SS
CC
V
Supply voltage
RW
U/D
INC
CS
Up/Down control input
Increment control input
Chip select control input
R
is the wiper terminal and is equivalent to the mov-
w
able terminal of a mechanical potentiometer. The posi-
tion of the wiper within the array is determined by the
control inputs. The wiper terminal series resistance is
typically 40Ω.
PRINCIPLES OF OPERATION
There are three sections of the X9319: the control
section, the nonvolatile memory, and the resistor
array. The control section operates just like an
up/down counter. The output of this counter is
decoded to turn on a single electronic switch
connecting a point on the resistor array to the wiper
output. The contents of the counter can be stored in
nonvolatile memory and retained for future use. The
resistor array is comprised of 99 individual resistors
connected in series. Electronic switches at either end
of the array and between each resistor provide an
Up/Down (U/D)
The U/D input controls the direction of the wiper move-
ment and whether the counter is incremented or dec-
remented.
Increment (INC)
The INC input is negative-edge triggered. Toggling
INC will move the wiper and either increment or decre-
ment the counter in the direction indicated by the logic
level on the U/D input.
electrical connection to the wiper pin, R .
Chip Select (CS)
W
The device is selected when the CS input is LOW. The
current counter value is stored in nonvolatile memory
when CS is returned HIGH while the INC input is also
HIGH. After the store operation is complete the X9319
will be placed in the low power standby mode until the
device is selected once again.
The wiper acts like its mechanical equivalent and does
not move beyond the first or last position. That is, the
counter does not wrap around when clocked to either
extreme.
The electronic switches on the device operate in a
“make before break” mode when the wiper changes
tap positions. If the wiper is moved several positions,
PIN CONFIGURATION
multiple taps are connected to the wiper for t (INC to
IW
V
change). The R value for the device can
TOTAL
W
DIP/SOIC
temporarily be reduced by a significant amount if the
wiper is moved several positions.
V
INC
U/D
1
2
3
4
8
7
6
5
CC
When the device is powered-down, the last wiper posi-
tion stored will be maintained in the nonvolatile mem-
ory. When power is restored, the contents of the
memory are recalled and the wiper is set to the value
last stored.
CS
X9319
R
L
R
H
V
R
SS
W
FN8185.1
6
September 14, 2005
X9319
INSTRUCTIONS AND PROGRAMMING
MODE SELECTION
The INC, U/D and CS inputs control the movement of
the wiper along the resistor array. With CS set LOW
the device is selected and enabled to respond to the
U/D and INC inputs. HIGH to LOW transitions on INC
will increment or decrement (depending on the state of
the U/D input) the seven bit counter. The output of this
counter is decoded to select one of one hundred wiper
positions along the resistive array.
CS
INC
U/D
Mode
L
H
Wiper up
L
L
Wiper down
Store wiper position to
nonvolatile memory
H
X
L
X
X
X
H
Standby
The value of the counter is stored in nonvolatile mem-
ory whenever CS transitions HIGH while the INC input
is also HIGH.
No store, return to standby
L
L
H
L
Wiper Up (not recommended)
The system may select the X9319, move the wiper
and deselect the device without having to store the lat-
est wiper position in nonvolatile memory. After the
wiper movement is performed as described above and
once the new position is reached, the system must
keep INC LOW while taking CS HIGH. The new wiper
position will be maintained until changed by the sys-
tem or until a powerup/down cycle recalled the previ-
ously stored data. This procedure allows the system to
always power-up to a preset value stored in nonvola-
tile memory; then during system operation minor
adjustments could be made. The adjustments might
be based on user preference, system parameter
changes due to temperature drift, etc.
Wiper Down
(not recommended)
The state of U/D may be changed while CS remains
LOW. This allows the host system to enable the
device and then move the wiper up and down until the
proper trim is attained.
FN8185.1
7
September 14, 2005
X9319
APPLICATIONS INFORMATION
Electronic digitally controlled (XDCP) potentiometers provide three powerful application advantages; (1) the variability
and reliability of a solid-state potentiometer, (2) the flexibility of computer-based digital controls, and (3) the retentivity
of nonvolatile memory used for the storage of multiple potentiometer settings or data.
Basic Configurations of Electronic Potentiometers
V
V
REF
REF
R
H
R
W
R
L
I
Three terminal potentiometer;
variable voltage divider
Two terminal variable resistor;
variable current
Basic Circuits
Single Supply Inverting Amplifier
+8V
Buffered Reference Voltage
Cascading Techniques
+V +V
R
1
+V
R
R
2
1
+5V
LMC7101
V
S
R
W
+
–
V
REF
X
V
OUT
R
W
–
+
100K
V
O
+V
+10V
LMC7101
100K
R
V
= V /R
W
W
OUT
W
(a)
(b)
V = (R2/R1)V
O S
Voltage Regulator
Offset Voltage Adjustment
Comparator with Hysteresis
R
R
2
1
LT311A
V
V (REG)
O
317
IN
V
V
–
+
S
S
V
+12V
O
R
1
100kΩ
–
+
V
O
I
adj
R
2
LMC7101
R
R
10kΩ
10kΩ
+15V
1
2
10kΩ
V
V
= {R /(R +R )} V (max)
1 1 2 O
UL
LL
V
(REG) = 1.25V (1+R /R )+I
R
= {R /(R +R )} V (min)
O
2
1
adj
2
1 1 2 O
(for additional circuits see AN115)
FN8185.1
September 14, 2005
8
X9319
PACKAGING INFORMATION
8-Lead Plastic Small Outline Package, Type S (8-lead SOIC)
0.150 (3.80) 0.228 (5.80)
0.158 (4.00) 0.244 (6.20)
Pin 1 Index
Pin 1
0.014 (0.35)
0.019 (0.49)
0.188 (4.78)
0.197 (5.00)
(4X) 7°
0.053 (1.35)
0.069 (1.75)
0.004 (0.19)
0.010 (0.25)
0.050 (1.27)
0.010 (0.25)
0.020 (0.50)
0.050"Typical
X 45°
0.050"
Typical
0° - 8°
0.0075 (0.19)
0.010 (0.25)
0.250"
0.016 (0.410)
0.037 (0.937)
0.030"
Typical
8 Places
FOOTPRINT
NOTE: ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
FN8185.1
9
September 14, 2005
X9319
PACKAGING INFORMATION
8-Lead Plastic, DIP, Package Code P8
0.430 (10.92)
0.360 (9.14)
0.260 (6.60)
0.240 (6.10)
Pin 1 Index
Pin 1
0.060 (1.52)
0.020 (0.51)
0.300
(7.62) Ref.
Half Shoulder Width On
All End Pins Optional
0.145 (3.68)
0.128 (3.25)
Seating
Plane
0.025 (0.64)
0.015 (0.38)
0.065 (1.65)
0.150 (3.81)
0.125 (3.18)
0.045 (1.14)
0.110 (2.79)
0.090 (2.29)
0.020 (0.51)
0.016 (0.41)
0.325 (8.25)
0.300 (7.62)
.073 (1.84)
Max.
0°
Typ. 0.010 (0.25)
15°
NOTE:
1. ALL DIMENSIONS IN INCHES (IN PARENTHESES IN MILLIMETERS)
2. PACKAGE DIMENSIONS EXCLUDE MOLDING FLASH
All Intersil U.S. products are manufactured, assembled and tested utilizing ISO9000 quality systems.
Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without
notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and
reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result
from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8185.1
10
September 14, 2005
相关型号：
X9319WS8I
10K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 100 POSITIONS, PDSO8, PLASTIC, SOIC-8
RENESAS
X9319WS8IT1
10K DIGITAL POTENTIOMETER, INCREMENT/DECREMENT CONTROL INTERFACE, 100 POSITIONS, PDSO8, PLASTIC, SOIC-8
RENESAS
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