IRLZ24NS [INFINEON]
HEXFET Power MOSFET; HEXFET功率MOSFET
| 型号： | IRLZ24NS |
| 厂家： | 
Infineon |
| 描述： | HEXFET Power MOSFET |
| 文件： | 总10页 (文件大小：180K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
PD - 91358E
IRLZ24NS/L
HEXFET® Power MOSFET
l Logic-Level Gate Drive
l Advanced Process Technology
l SurfaceMount(IRLZ24NS)
l Low-profilethrough-hole(IRLZ24NL)
l 175°C Operating Temperature
l Fast Switching
D
VDSS = 55V
RDS(on) = 0.06Ω
G
l Fully Avalanche Rated
Description
ID = 18A
S
Fifth Generation HEXFETs from International Rectifier
utilize advanced processing techniques to achieve
extremely low on-resistance per silicon area. This
benefit, combined with the fast switching speed and
ruggedizeddevicedesignthatHEXFETPowerMOSFETs
arewellknownfor,providesthedesignerwithanextremely
efficient and reliable device for use in a wide variety of
applications.
The D2Pak is a surface mount power package capable of
accommodating die sizes up to HEX-4. It provides the
highest power capability and the lowest possible on-
resistance in any existing surface mount package. The
D2Pak is suitable for high current applications because of
its low internal connection resistance and can dissipate
up to 2.0W in a typical surface mount application.
Thethrough-holeversion(IRLZ24NL)isavailableforlow-
profileapplications.
2
T O -262
D
Pak
Absolute Maximum Ratings
Parameter
Max.
18
Units
ID @ TC = 25°C
ID @ TC = 100°C
IDM
Continuous Drain Current, VGS @ 10Vꢀ
Continuous Drain Current, VGS @ 10Vꢀ
Pulsed Drain Current ꢀ
13
A
72
PD @TA = 25°C
PD @TC = 25°C
Power Dissipation
3.8
45
W
W
Power Dissipation
Linear Derating Factor
0.30
±16
68
W/°C
V
VGS
EAS
IAR
Gate-to-Source Voltage
Single Pulse Avalanche Energyꢀ
Avalanche Current
mJ
A
11
EAR
dv/dt
TJ
Repetitive Avalanche Energy
Peak Diode Recovery dv/dt ꢀ
Operating Junction and
4.5
5.0
mJ
V/ns
-55 to + 175
TSTG
Storage Temperature Range
Soldering Temperature, for 10 seconds
°C
300 (1.6mm from case )
Thermal Resistance
Parameter
Junction-to-Case
Junction-to-Ambient ( PCB Mounted,steady-state)**
Typ.
–––
Max.
3.3
40
Units
RθJC
RθJA
°C/W
–––
5/12/98
IRLZ24NS/L
Electrical Characteristics @ TJ = 25°C (unless otherwise specified)
Parameter
Min. Typ. Max. Units
55 ––– –––
Conditions
VGS = 0V, ID = 250µA
V(BR)DSS
Drain-to-Source Breakdown Voltage
V
∆V(BR)DSS/∆TJ Breakdown Voltage Temp. Coefficient ––– 0.061 ––– V/°C Reference to 25°C, ID = 1mAꢀ
––– ––– 0.060
––– ––– 0.075
––– ––– 0.105
VGS = 10V, ID = 11A
VGS = 5.0V, ID = 11A
VGS = 4.0V, ID = 9.0A
VDS = VGS, ID = 250µA
VDS = 25V, ID = 11Aꢀ
VDS = 55V, VGS = 0V
VDS = 44V, VGS = 0V, TJ = 150°C
VGS = 16V
RDS(on)
Static Drain-to-Source On-Resistance
Ω
VGS(th)
gfs
Gate Threshold Voltage
1.0
8.3
––– 2.0
––– –––
V
S
Forward Transconductance
––– ––– 25
––– ––– 250
––– ––– 100
––– ––– -100
––– ––– 15
––– ––– 3.7
––– ––– 8.5
µA
nA
IDSS
IGSS
Drain-to-Source Leakage Current
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Total Gate Charge
VGS = -16V
Qg
ID = 11A
Qgs
Qgd
td(on)
tr
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Turn-On Delay Time
nC VDS = 44V
VGS = 5.0V, See Fig. 6 and 13 ꢀ
–––
–––
–––
–––
7.1 –––
74 –––
20 –––
29 –––
VDD = 28V
RiseTime
ID = 11A
ns
td(off)
tf
Turn-Off Delay Time
FallTime
RG = 12Ω, VGS = 5.0V
RD = 2.4Ω, See Fig. 10 ꢀ
Between lead,
LS
Internal Source Inductance
7.5
–––
–––
nH
pF
and center of die contact
VGS = 0V
Ciss
Coss
Crss
Input Capacitance
––– 480 –––
––– 130 –––
Output Capacitance
VDS = 25V
Reverse Transfer Capacitance
–––
61 –––
ƒ = 1.0MHz, See Fig. 5ꢀ
Source-Drain Ratings and Characteristics
Parameter
Continuous Source Current
(Body Diode)
Min. Typ. Max. Units
Conditions
MOSFETsymbol
D
IS
––– ––– 18
A
showing the
G
ISM
Pulsed Source Current
(Body Diode)
integral reverse
––– ––– 72
S
p-n junction diode.
VSD
trr
Diode Forward Voltage
Reverse Recovery Time
Reverse Recovery Charge
Forward Turn-On Time
––– ––– 1.3
––– 60 90
––– 130 200
Intrinsic turn-on time is negligible (turn-on is dominated by LS+LD)
V
TJ = 25°C, IS = 11A, VGS = 0V
ns
TJ = 25°C, IF = 11A
Qrr
ton
nC di/dt = 100A/µs ꢀ
Notes:
Repetitive rating; pulse width limited by
ISD ≤ 11A, di/dt ≤ 290A/µs, VDD ≤ V(BR)DSS
,
max. junction temperature. ( See fig. 11 )
TJ ≤ 175°C
VDD = 25V, starting TJ = 25°C, L = 790µH
RG = 25Ω, IAS = 11A. (See Figure 12)
Pulse width ≤ 300µs; duty cycle ≤ 2%.
ꢀ Uses IRLZ24N data and test conditions
** When mounted on 1" square PCB ( FR-4 or G-10 Material ).
For recommended footprint and soldering techniques refer to application note #AN-994.
IRLZ24NS/L
100
10
1
100
10
1
VGS
15V
VGS
15V
TOP
TOP
12V
12V
10V
10V
8.0V
6.0V
4.0V
3.0V
8.0V
6.0V
4.0V
3.0V
BOTTOM 2.5V
BOTTOM 2.5V
2.5V
2.5V
20µs PULSE W IDTH
20µs PULSE W IDTH
T
= 25°C
J
T
= 175°C
J
0.1
0.1
A
A
0.1
1
10
100
0.1
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Drain-to-Source Voltage (V)
DS
DS
Fig 2. Typical Output Characteristics
Fig 1. Typical Output Characteristics
3.0
2.5
2.0
1.5
1.0
0.5
0.0
100
10
1
I
= 18A
D
TJ = 25°C
TJ = 175°C
V
DS = 15V
V
= 10V
20µs PULSE W IDTH
G S
0.1
A
10 A
-60 -40 -20
0
20
40
60
80 100 120 140 160 180
2
3
4
5
6
7
8
9
T
J
, Junction Tem perature (°C)
VG S , Gate-to-Source Voltage (V)
Fig 4. Normalized On-Resistance
Fig 3. Typical Transfer Characteristics
Vs.Temperature
IRLZ24NS/L
800
15
12
9
V
C
C
C
= 0V ,
f = 1M Hz
I
= 11A
G S
iss
D
= C
= C
= C
+ C
+ C
,
C
SHORTED
gs
gd
ds
gd
ds
V
V
= 44V
= 28V
D S
D S
rss
oss
gd
C
iss
600
400
200
0
C
C
oss
rss
6
3
FO R TEST CIRCUIT
SEE FIGURE 13
0
A
A
1
10
100
0
4
8
12
16
20
V
, Drain-to-Source Voltage (V)
Q
, Total Gate Charge (nC)
DS
G
Fig 5. Typical Capacitance Vs.
Fig 6. Typical Gate Charge Vs.
Drain-to-Source Voltage
Gate-to-Source Voltage
100
1000
100
10
OPE RATION IN THIS AREA LIM ITE D
BY R
DS(on)
T
= 175°C
J
T
= 25°C
J
10µs
10
100µs
1m s
T
T
= 25°C
= 175°C
C
J
V
= 0V
G S
10m s
S ingle Pulse
A
1
1
A
0.4
0.8
1.2
1.6
2.0
1
10
100
V
, Drain-to-Source Voltage (V)
V
, Source-to-Drain Voltage (V)
SD
DS
Fig 7. Typical Source-Drain Diode
Fig 8. Maximum Safe Operating Area
IRLZ24NS/L
20
16
12
8
RD
VDS
VGS
D.U.T.
RG
+
-
VDD
5.0V
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
Fig 10a. Switching Time Test Circuit
4
V
DS
90%
0
A
175
25
50
75
100
125
150
T
, Case Tem perature (°C)
C
10%
V
GS
Fig 9. Maximum Drain Current Vs.
t
t
r
t
t
f
d(on)
d(off)
CaseTemperature
Fig 10b. Switching Time Waveforms
10
D = 0.50
0.20
1
0.10
0.05
P
0.02
0.01
D M
0.1
t
SINGLE PULSE
1
(THERM AL RESPO NSE)
t
2
N otes:
1 . D u ty fa ctor D
=
t
/ t
2
1
2. Pe ak T = P
x Z
+ T
C
D M
J
th JC
0.1
A
0.01
0.00001
0.0001
0.001
0.01
1
t1 , Rectangular Pulse Duration (sec)
Fig11. MaximumEffectiveTransientThermalImpedance,Junction-to-Case
IRLZ24NS/L
140
120
100
80
I
D
L
TO P
4.5A
7.8A
11A
V
DS
B OTTOM
D.U.T.
R
+
-
G
V
DD
I
5.0V
AS
t
p
0.01Ω
60
40
Fig 12a. Unclamped Inductive Test Circuit
V
20
(BR)DSS
t
p
V
= 25V
50
DD
0
A
175
25
75
100
125
150
V
DD
Starting T , Junction Tem perature (°C)
J
V
DS
Fig 12c. Maximum Avalanche Energy
I
AS
Vs. Drain Current
Fig12b. UnclampedInductiveWaveforms
Current Regulator
Same Type as D.U.T.
50KΩ
Q
G
.2µF
12V
.3µF
10 V
+
V
Q
Q
DS
GS
GD
D.U.T.
-
V
GS
V
G
3mA
I
I
Charge
G
D
Current Sampling Resistors
Fig 13b. Gate Charge Test Circuit
Fig 13a. Basic Gate Charge Waveform
IRLZ24NS/L
Peak Diode Recovery dv/dt Test Circuit
+
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
D.U.T
-
+
-
-
+
RG
• dv/dt controlled by RG
+
-
• Driver same type as D.U.T.
• ISD controlled by Duty Factor "D"
• D.U.T. - Device Under Test
VDD
Driver Gate Drive
P.W.
Period
Period
D =
P.W.
V
=10V
*
GS
D.U.T. I Waveform
SD
Reverse
Recovery
Current
Body Diode Forward
Current
di/dt
D.U.T. V Waveform
DS
Diode Recovery
dv/dt
V
DD
Re-Applied
Voltage
Body Diode
Forward Drop
Inductor Curent
I
SD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig14.ForN-ChannelHEXFETS
IRLZ24NS/L
D2Pak Package Outline
10.54 (.415)
10.29 (.405)
10.16 (.400)
REF.
- B -
1.32 (.052)
4.69 (.185)
4.20 (.165)
1.40 (.055)
- A -
M AX.
1.22 (.048)
2
6.47 (.255)
6.18 (.243)
1.78 (.070)
1.27 (.050)
15.49 (.610)
14.73 (.580)
2.79 (.110)
2.29 (.090)
1
3
2.61 (.103)
2.32 (.091)
5.28 (.208)
4.78 (.188)
8.89 (.350)
REF.
1.40 (.055)
1.14 (.045)
1.39 (.055)
1.14 (.045)
3X
0.55 (.022)
0.46 (.018)
0.93 (.037)
0.69 (.027)
3X
5.08 (.200)
0.25 (.010)
M
B A M
M INIMUM RECOM MENDED FOOTPRINT
11.43 (.450)
8.89 (.350)
LEAD ASSIGNMENTS
1 - GATE
NO TES:
1
2
3
4
DIM ENSIONS AFTER SOLDER DIP.
17.78 (.700)
2 - DRAIN
3 - SOURCE
DIM ENSIONING & TOLERANCING PER ANSI Y14.5M , 1982.
CONTROLLING DIM ENSION : INCH.
HEATSINK & LEAD DIM ENSIONS DO NOT INCLUDE BURRS.
3.81 (.150)
2.54 (.100)
2.08 (.082)
2X
2X
Part Marking Information
D2Pak
A
INTERNATIONAL
RECTIFIER
LOGO
PART NUM BER
F530S
9246
1M
DATE CODE
(YYW W )
9B
ASSEM BLY
YY
=
YEAR
= W EEK
LOT CODE
W W
IRLZ24NS/L
Package Outline
TO-262 Outline
Part Marking Information
TO-262
IRLZ24NS/L
Tape & Reel Information
D2Pak
TRR
1 .6 0 (.063 )
1 .5 0 (.059 )
1.60 (.06 3)
1.50 (.05 9)
4.10 (.16 1)
3.90 (.15 3)
0.3 68 (.0145)
0.3 42 (.0135)
FEED DIRECTION
1.85 (.07 3)
11.60 (.457)
11.40 (.449)
1.65 (.06 5)
24.30 (.957)
23.90 (.941)
15.42 (.609)
15.22 (.601)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.42 9)
10.70 (.42 1)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
M A X.
60.00 (2.362)
MIN .
30.40 (1.197)
M AX.
NO TES :
1. CO M FO RM S TO EIA-418.
2. CO N TR O LLIN G D IM ENSIO N : M ILLIM ET ER .
3. DIM ENSIO N MEASUR ED
26.40 (1.039)
24.40 (.961)
4
@ HU B.
3
4. INC LUD ES FLAN G E D ISTO R TIO N
@
O UTER EDG E.
WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, Tel: (310) 322 3331
EUROPEAN HEADQUARTERS: Hurst Green, Oxted, Surrey RH8 9BB, UK Tel: ++ 44 1883 732020
IR CANADA: 7321 Victoria Park Ave., Suite 201, Markham, Ontario L3R 2Z8, Tel: (905) 475 1897
IR GERMANY: Saalburgstrasse 157, 61350 Bad Homburg Tel: ++ 49 6172 96590
IR ITALY: Via Liguria 49, 10071 Borgaro, Torino Tel: ++ 39 11 451 0111
IR FAR EAST: K&H Bldg., 2F, 30-4 Nishi-Ikebukuro 3-Chome, Toshima-Ku, Tokyo Japan 171 Tel: 81 3 3983 0086
IR SOUTHEAST ASIA: 315 Outram Road, #10-02 Tan Boon Liat Building, Singapore 0316 Tel: 65 221 8371
http://www.irf.com/
Data and specifications subject to change without notice.
5/98
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