IS62C10248AL-55TLI [ISSI]

1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM; 1M ×8低电压,超低功耗CMOS静态RAM
IS62C10248AL-55TLI
型号: IS62C10248AL-55TLI
厂家: INTEGRATED SILICON SOLUTION, INC    INTEGRATED SILICON SOLUTION, INC
描述:

1M x 8 LOW VOLTAGE, ULTRA LOW POWER CMOS STATIC RAM
1M ×8低电压,超低功耗CMOS静态RAM

存储 内存集成电路 静态存储器 光电二极管
文件: 总14页 (文件大小:367K)
中文:  中文翻译
下载:  下载PDF数据表文档文件
IS62C10248AL  
IS65C10248AL  
1M x 8 LOW VOLTAGE,  
ULTRA LOW POWER CMOS STATIC RAM  
PRELIMINARY INFORMATION  
OCTOBER 2009  
FEATURES  
DESCRIPTION  
Theꢀ ISSIꢀ IS62C10248AL/IS65C10248ALꢀ areꢀ ꢀ high-  
speed,ꢀ 8Mꢀ bitꢀ staticꢀ RAMsꢀ organizedꢀ asꢀ 1Mꢀ wordsꢀ byꢀ  
8ꢀ bits.ꢀ Itꢀ isꢀ fabricatedꢀ usingꢀ ISSI'sꢀ high-performanceꢀ  
CMOStechnology.Thishighlyreliableprocesscoupledꢀ  
withꢀ innovativeꢀ circuitꢀ designꢀ techniques,ꢀ yieldsꢀ high-  
performance and low power consumption devices.  
•ꢀ High-speedꢀaccessꢀtime:ꢀ45ns,ꢀ55ns  
•ꢀ CMOSꢀlowꢀpowerꢀoperation  
– 36 mW (typical) operating  
ꢀ –ꢀ12ꢀµWꢀ(typical)ꢀCMOSꢀstandby  
•ꢀ TTLꢀcompatibleꢀinterfaceꢀlevels  
•ꢀ Singleꢀpowerꢀsupplyꢀꢀ  
When CS1isHIGH(deselected)orwhenCS2isLOW  
(deselected), the device assumes a standby mode at  
which the power dissipation can be reduced down with  
CMOSꢀinputꢀlevels.  
ꢀ –ꢀ4.5V--5.5VꢀVdd  
Easy memory expansion is provided by using Chip Enable  
andꢀOutputꢀEnableꢀinputs.ꢀTheꢀactiveꢀLOWꢀWriteꢀEnableꢀ  
(WE) controls both writing and reading of the memory.  
•ꢀ Threeꢀstateꢀoutputs  
•ꢀ Automotiveꢀtemperatureꢀ(-40oC to +125oC)  
TheꢀIS62C10248ALꢀandꢀIS65C10248ALꢀareꢀpackagedꢀinꢀ  
theꢀJEDECꢀstandardꢀ48-pinꢀminiꢀBGAꢀ(9mmꢀxꢀ11mm)ꢀandꢀ  
44-PinꢀTSOPꢀ(TYPEꢀII).  
•ꢀ Lead-freeꢀavailable  
FUNCTIONAL BLOCK DIAGRAM  
1M x 8  
MEMORY ARRAY  
A0-A19  
DECODER  
VDD  
GND  
I/O  
DATA  
COLUMN I/O  
I/O0-I/O7  
CIRCUIT  
CS2  
CS1  
OE  
CONTROL  
CIRCUIT  
WE  
Copyright © 2009 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no  
liability arising out of the application or use of any information, products or services described herein. Customers are advised to obtain the latest version of this device specification before relying on  
any published information and before placing orders for products.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
1
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
PIN CONFIGURATION (1M x 8 Low Power)  
48-pin mini BGA (B) (9mm x 11mm)  
44-pin TSOP (Type II)  
1
2
3
4
5
6
A4  
A3  
A2  
A1  
A0  
CS1  
NC  
NC  
I/O0  
I/O1  
1
44  
43  
42  
41  
40  
39  
38  
37  
36  
35  
34  
33  
32  
31  
30  
29  
28  
27  
26  
25  
24  
23  
A5  
A6  
A7  
2
A
A
A
2
NC  
NC  
OE  
CS  
2
0
1
3
A
B
C
D
E
F
4
OE  
CS2  
A8  
NC  
NC  
I/O7  
I/O6  
GND  
5
A
NC  
NC  
A
CS1  
NC  
4
6
3
6
7
I/O  
A
A
A
NC  
I/O  
4
0
5
8
9
10  
11  
12  
13  
14  
15  
16  
17  
18  
19  
20  
21  
22  
GND  
A
17  
I/O  
I/O  
5
V
V
DD  
7
1
V
DD  
GND  
I/O2  
I/O3  
NC  
VDD  
V
DD  
I/O  
6
I/O  
NC  
A
16  
SS  
2
I/O5  
I/O4  
NC  
NC  
A9  
A10  
A11  
A12  
A13  
A14  
I/O  
A
NC  
NC  
NC  
A
I/O  
7
3
14  
15  
NC  
WE  
A19  
A18  
A17  
A16  
A15  
A
12  
A
A
NC  
13  
WE  
NC  
G
H
A
A
A
A
A
19  
18  
8
9
10  
11  
PIN DESCRIPTIONS  
A0-A19ꢀ ꢀ  
CS1  
AddressꢀInputs  
Chip Enable 1 Input  
Chip Enable 2 Input  
OutputꢀEnableꢀInput  
Write Enable Input  
Input/Output  
CS2  
OEꢀꢀ  
WE  
I/O0-I/O7ꢀ  
NC  
No Connection  
Power  
Vddꢀ  
GNDꢀ  
Ground  
2
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
TRUTH TABLE  
Mode  
WE  
CS1  
CS2  
OE  
I/O Operation Vdd Current  
NotꢀSelectedꢀ  
(Power-down)ꢀ  
Xꢀ  
Xꢀ  
Hꢀ  
Xꢀ  
Xꢀ  
Lꢀ  
Xꢀ  
Xꢀ  
High-Zꢀꢀꢀ  
High-Z  
isb1, isb2  
isb1, isb2  
OutputꢀDisabledꢀ Hꢀ  
Lꢀ  
Lꢀ  
Lꢀ  
Hꢀ  
Hꢀ  
Hꢀ  
Hꢀ  
Lꢀ  
Xꢀ  
High-Zꢀ  
dout  
din  
iCC  
iCC  
iCC  
Readꢀ  
Writeꢀ  
Hꢀ  
Lꢀ  
OPERATING RANGE (Vdd)  
Range  
Ambient Temperature  
0°Cꢀtoꢀ+70°Cꢀ  
Vdd  
Speed  
Commercialꢀ  
Industrialꢀ  
4.5Vꢀ-ꢀ5.5Vꢀ  
4.5Vꢀ-ꢀ5.5Vꢀ  
4.5Vꢀ-ꢀ5.5Vꢀ  
45ns  
55ns  
55ns  
–40°Cꢀtoꢀ+85°Cꢀ  
–40°Cꢀtoꢀ+125°Cꢀ  
ꢀ Automotiveꢀ  
CAPACITANCE(1,2)  
Symbol  
Parameter  
Input Capacitance  
OutputꢀCapacitanceꢀ  
Conditions  
Max.  
Unit  
pF  
Cin  
Vin = 0V  
5
7
Coutꢀ  
Vout = 0V  
pF  
Notes:  
1.ꢀꢀTestedꢀinitiallyꢀandꢀafterꢀanyꢀdesignꢀorꢀprocessꢀchangesꢀthatꢀmayꢀaffectꢀtheseꢀparameters.  
2.ꢀ Testꢀconditions:ꢀTa = 25°C, fꢀ=ꢀ1ꢀMHz,ꢀVddꢀ=ꢀ5.0V.  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
3
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
ABSOLUTE MAXIMUM RATINGS(1)  
Symbol Parameter  
Value  
–0.5ꢀtoꢀ+7.0ꢀ  
–65ꢀtoꢀ+150ꢀ  
1.5ꢀ  
Unit  
V
°C  
Vterm  
tstg  
Pt  
TerminalꢀVoltageꢀwithꢀRespectꢀtoꢀGNDꢀ  
StorageꢀTemperatureꢀ  
PowerꢀDissipationꢀ  
W
ioutꢀ  
DCꢀOutputꢀCurrentꢀ(LOW)ꢀ  
20ꢀ  
mAꢀ  
Notes:  
1.ꢀꢀStressꢀgreaterꢀthanꢀthoseꢀlistedꢀunderꢀABSOLUTEꢀMAXIMUMꢀRATINGSꢀmayꢀcauseꢀ  
permanentꢀdamageꢀtoꢀtheꢀdevice.ꢀThisꢀisꢀaꢀstressꢀratingꢀonlyꢀandꢀfunctionalꢀoperationꢀ  
of the device at these or any other conditions above those indicated in the operational  
sections of this specification is not implied. Exposure to absolute maximum rating con-  
ditions for extended periods may affect reliability.  
DC ELECTRICAL CHARACTERISTICS (OverꢀOperatingꢀRange)  
Symbol Parameter  
Test Conditions  
Min.  
2.4ꢀ  
—ꢀ  
Max.  
—ꢀ  
Unit  
V
Voh  
Vol  
Vih  
Vil  
ili  
OutputꢀHIGHꢀVoltageꢀ  
Vdd = Min.,ꢀioh = –1ꢀmAꢀ  
OutputꢀLOWꢀVoltageꢀ  
InputꢀHIGHꢀVoltageꢀ  
InputꢀLOWꢀVoltage(1)  
InputꢀLeakageꢀ  
Vdd = Min.,ꢀiol = 2.1ꢀmAꢀ  
0.4ꢀ  
V
2.2ꢀ  
–0.3ꢀ  
Vdd + 0.5  
0.8ꢀ  
V
V
GNDꢀVin Vdd  
Com.  
Ind.  
Auto.  
–1  
–2  
–5  
1
2
5
µA  
ilo  
OutputꢀLeakage  
GNDꢀVout Vdd  
OutputsꢀDisabledꢀ  
Com.  
Ind.ꢀ  
Auto.  
–1  
–2ꢀ  
–5  
1
2
5
µA  
Note:  
1. Vil (min) = -0.3V DC; Vil (min) = -2.0VꢀACꢀ(pulseꢀwidthꢀ-2.0ꢀns).ꢀNotꢀ100%ꢀtested.ꢀ  
Vih (max) = Vdd + 0.3V DC; Vih (max) = Vdd + 2.0VꢀACꢀ(pulseꢀwidthꢀ-2.0ꢀns).ꢀNotꢀ100%ꢀtested.ꢀ  
4ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
AC TEST CONDITIONS  
Parameter  
InputꢀPulseꢀLevelꢀ  
InputꢀRiseꢀandꢀFallꢀTimesꢀ  
Unit  
0Vꢀtoꢀ3.0V  
5ꢀns  
InputꢀandꢀOutputꢀTimingꢀ  
andꢀReferenceꢀLevel  
1.5V  
OutputꢀLoadꢀ  
SeeꢀFiguresꢀ1ꢀandꢀ2  
AC TEST LOADS  
481  
481  
5V  
5V  
OUTPUT  
OUTPUT  
255 Ω  
255 Ω  
30 pF  
Including  
jig and  
5 pF  
Including  
jig and  
scope  
scope  
Figure 1  
Figure 2  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
5
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
POWER SUPPLY CHARACTERISTICS(1) (OverꢀOperatingꢀRange)  
-45 ns  
-55 ns  
Symbol Parameter  
Test Conditions  
dd = Max.,ꢀCS1 = Vil, CS2ꢀ=ꢀVih  
out = 0 mA  
in = Vih or Vil  
Min. Max. Min. Max. Unit  
iCC  
VddꢀDynamicꢀOperating  
Com.  
Ind.  
25  
mA  
V
Supply Current  
25  
i
Auto.  
typ(2)  
40  
V
13  
12  
f = fmax  
iCC1  
Isb1  
Isb2  
Com.  
Ind.  
10  
1
mA  
mA  
µA  
Average operating  
Current  
CS1 = Vil, Cs2 = Vih  
i i/o = 0 mA  
10  
20  
Auto.  
Com.  
Ind.  
V
V
V
in = Vih or Vil  
TTLꢀStandbyꢀCurrent  
(TTLꢀInputs)  
dd = Max.,ꢀCS1 Vih, CS2 ꢀVil  
in = Vih or Vil  
1.5  
2
Auto.  
Com.  
Ind.  
f = 0  
Vdd = Max.,ꢀ  
40  
CMOSꢀStandby  
60  
Currentꢀ(CMOSꢀInputs) CS1Vdd – 0.2V and CS2 Vss + 0.2V  
in Vdd – 0.2V or Vin Vss + 0.2V  
f = 0  
Auto.  
typ(2)  
180  
V
15  
Note:  
1. At f = fmax, address and data inputs are cycling at the maximum frequency, f = 0 means no input lines change.  
ꢀꢀꢀꢀꢀ2.ꢀꢀTypicalꢀValuesꢀareꢀmeasuredꢀatꢀVccꢀ=ꢀ5V,Ta = 25oCꢀandꢀnotꢀ100%ꢀtested.  
6
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
READ CYCLE SWITCHING CHARACTERISTICS(1) (OverꢀOperatingꢀRange)  
45 ns  
55 ns  
Symbol  
trCꢀ  
Parameter  
Min.  
Max.  
—ꢀ  
Min.  
55ꢀ  
—ꢀ  
10ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
5ꢀ  
Max.  
—ꢀ  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ReadꢀCycleꢀTimeꢀ  
45ꢀ  
—ꢀ  
10ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
5ꢀ  
taaꢀ  
AddressꢀAccessꢀTimeꢀ  
OutputꢀHoldꢀTimeꢀ  
45ꢀ  
—ꢀ  
55ꢀ  
—ꢀ  
tohaꢀ  
taCs1/taCs2  
tdoe  
CS1/CS2ꢀAccessꢀTimeꢀ  
OEꢀAccessꢀTimeꢀ  
45ꢀ  
20ꢀ  
15ꢀ  
—ꢀ  
55ꢀ  
25ꢀ  
20ꢀ  
—ꢀ  
(2)  
thzoe  
OEꢀtoꢀHigh-ZꢀOutputꢀ  
OEꢀtoꢀLow-ZꢀOutputꢀ  
CS1/CS2ꢀtoꢀHigh-ZꢀOutputꢀ  
CS1/CS2ꢀtoꢀLow-ZꢀOutputꢀ  
(2)  
tlzoe  
(2)  
thzCs1/thzCs2  
0ꢀ  
15ꢀ  
—ꢀ  
0ꢀ  
20ꢀ  
—ꢀ  
(2)  
tlzCs1/tlzCs2  
10ꢀ  
10ꢀ  
Notes:  
1.ꢀ Testꢀconditionsꢀassumeꢀsignalꢀtransitionꢀtimesꢀofꢀ5ꢀnsꢀorꢀless,ꢀtimingꢀreferenceꢀlevelsꢀofꢀ1.5V,ꢀinputꢀpulseꢀlevelsꢀofꢀ0Vꢀtoꢀ3.0Vꢀ  
and output loading specified in Figure 1.  
2.ꢀ TestedꢀwithꢀtheꢀloadꢀinꢀFigureꢀ2.ꢀTransitionꢀisꢀmeasuredꢀ±500ꢀmVꢀfromꢀsteady-stateꢀvoltage.ꢀNotꢀ100%ꢀtested.  
AC WAVEFORMS  
READ CYCLE NO. 1(1,2) (Address Controlled) (CS1 = OEꢀ=ꢀVil, Cs2 = WEꢀ=ꢀVih)  
t
RC  
ADDRESS  
DOUT  
t
AA  
t
OHA  
tOHA  
DATA VALID  
PREVIOUS DATA VALID  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774 ꢀ  
7
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
AC WAVEFORMS  
READ CYCLE NO. 2(1,3) (CS1, CS2, AND OE Controlled)  
t
RC  
ADDRESS  
OE  
t
AA  
t
OHA  
tHZOE  
t
DOE  
t
LZOE  
CS1  
t
ACS1/tACS2  
CS2  
tLZCS1/  
tLZCS2  
t
HZCS  
HIGH-Z  
DOUT  
DATA VALID  
Notes:  
1. WEꢀisꢀHIGHꢀforꢀaꢀReadꢀCycle.  
2.ꢀ Theꢀdeviceꢀisꢀcontinuouslyꢀselected.ꢀOE, CS1 = Vil. Cs2=WE=Vih.  
3. Address is valid prior to or coincident with CS1ꢀLOWꢀandꢀCS2ꢀHIGHꢀtransition.  
8ꢀ  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. 00A  
09/25/09  
ꢀꢀꢀꢀꢀ  
ꢀꢀꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
                                                                                           
IS62C10248AL, IS65C10248AL  
WRITE CYCLE SWITCHING CHARACTERISTICS(1,2)ꢀ(OverꢀOperatingꢀRange)  
45ns  
55 ns  
Symbol  
Parameter  
Min. Max.  
Min.  
55ꢀ  
45ꢀ  
45ꢀ  
0ꢀ  
Max.  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
20ꢀ  
—ꢀ  
Unit  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
ns  
twCꢀ  
WriteꢀCycleꢀTimeꢀ  
ꢀꢀꢀ45ꢀꢀ  
ꢀꢀꢀ35ꢀ  
ꢀꢀꢀ35ꢀ  
ꢀꢀꢀ0ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
20ꢀ  
—ꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀ  
ꢀꢀꢀ  
tsCs1/tsCs2 CS1/CS2ꢀtoꢀWriteꢀEndꢀ  
ꢀꢀꢀꢀ  
tawꢀ  
thaꢀ  
tsaꢀ  
tPwe  
tsdꢀ  
thdꢀ  
AddressꢀSetupꢀTimeꢀtoꢀWriteꢀEndꢀꢀ  
ꢀꢀꢀꢀ  
AddressꢀHoldꢀfromꢀWriteꢀEndꢀ  
AddressꢀSetupꢀTimeꢀ  
ꢀꢀꢀꢀꢀꢀ  
ꢀꢀꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀ0ꢀ  
0ꢀ  
(4)  
WEꢀPulseꢀWidthꢀ  
ꢀꢀꢀ35ꢀ  
ꢀꢀꢀ25ꢀ  
ꢀꢀꢀ0ꢀ  
40ꢀ  
30ꢀ  
0ꢀ  
DataꢀSetupꢀtoꢀWriteꢀEndꢀ  
DataꢀHoldꢀfromꢀWriteꢀEndꢀ  
WEꢀLOWꢀtoꢀHigh-ZꢀOutputꢀ  
WEꢀHIGHꢀtoꢀLow-ZꢀOutputꢀ  
ꢀꢀꢀꢀ  
(3)  
thzwe  
tlzwe  
ꢀꢀꢀ—ꢀ  
ꢀꢀꢀꢀ5ꢀ  
ꢀꢀꢀꢀ  
ꢀꢀꢀꢀ  
—ꢀ  
5ꢀ  
(3)  
Notes:  
1.ꢀ Testꢀconditionsꢀassumeꢀsignalꢀtransitionꢀtimesꢀofꢀ5ꢀnsꢀorꢀless,ꢀtimingꢀreferenceꢀlevelsꢀofꢀ1.5V,ꢀinputꢀpulseꢀlevelsꢀofꢀ0Vꢀtoꢀ3.0Vꢀ  
and output loading specified in Figure 1.  
2. Theꢀinternalꢀwriteꢀtimeꢀisꢀdefinedꢀbyꢀtheꢀoverlapꢀof CS1 LOW,ꢀCS2ꢀHIGH,ꢀandꢀWEꢀLOW.ꢀAllꢀsignalsꢀmustꢀbeꢀinꢀvalidꢀstatesꢀtoꢀinitiateꢀaꢀWrite,ꢀbutꢀanyꢀoneꢀcanꢀ  
go inactive to terminateꢀtheꢀWrite.ꢀTheꢀDataꢀInputꢀSetupꢀandꢀHoldꢀtimingꢀareꢀreferencedꢀtoꢀtheꢀrisingꢀorꢀfallingꢀedgeꢀofꢀtheꢀsignalꢀthatꢀterminatesꢀtheꢀwrite.  
3.ꢀ TestedꢀwithꢀtheꢀloadꢀinꢀFigureꢀ2.ꢀTransitionꢀisꢀmeasuredꢀ±500ꢀmVꢀfromꢀsteady-stateꢀvoltage.ꢀNotꢀ100%ꢀtested.  
4.ꢀꢀꢀtPwe > thzwe + tsd when OEꢀisꢀLOW.  
AC WAVEFORMS  
WRITE CYCLE NO. 1 (CS1/CS2 Controlled, OEꢀ=ꢀHIGHꢀorꢀLOW)  
t
WC  
ADDRESS  
CS1  
t
HA  
tSCS1  
tSCS2  
CS2  
tAW  
t
PWE  
WE  
DOUT  
DIN  
t
SA  
tHZWE  
t
LZWE  
HIGH-Z  
SD  
DATA UNDEFINED  
t
t
HD  
DATA-IN VALID  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
9
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
WRITE CYCLE NO. 2 (WEꢀControlled:ꢀOEꢀisꢀHIGHꢀDuringꢀWriteꢀCycle)  
t
WC  
ADDRESS  
OE  
t
HA  
tSCS1  
CS1  
tSCS2  
CS2  
tAW  
t
PWE  
WE  
t
SA  
tHZWE  
t
LZWE  
HIGH-Z  
SD  
DOUT  
DIN  
DATA UNDEFINED  
t
t
HD  
DATA-IN VALID  
WRITE CYCLE NO. 3 (WEꢀControlled:ꢀOEꢀisꢀLOWꢀDuringꢀWriteꢀCycle)  
t
WC  
ADDRESS  
OE  
t
HA  
tSCS1  
CS1  
tSCS2  
CS2  
tAW  
t
PWE  
WE  
t
SA  
tHZWE  
t
LZWE  
HIGH-Z  
SD  
DOUT  
DIN  
DATA UNDEFINED  
t
t
HD  
DATA-IN VALID  
10  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
DATA RETENTION SWITCHING CHARACTERISTICS (4.5V - 5.5V)  
Symbol  
ꢀ ꢀ Vdr  
Parameter  
Test Condition  
Min.  
Typ.(1)  
Max.  
Unit  
VddꢀforꢀDataꢀRetentionꢀ  
DataꢀRetentionꢀCurrentꢀ  
SeeꢀDataꢀRetentionꢀWaveformꢀ  
2.0ꢀ  
5.5ꢀ  
V
idrꢀ  
Vddꢀ=ꢀ2.0Vꢀandꢀꢀ  
Com.ꢀ  
Ind.ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
—ꢀ  
20ꢀ  
40ꢀ  
60ꢀ  
µAꢀ  
CS1 ꢀVdd –ꢀ0.2Vꢀandꢀꢀꢀ  
(a) CS2 ꢀVdd –ꢀ0.2Vꢀorꢀꢀ  
(b) CS2 ꢀGNDꢀ+ꢀ0.2Vꢀ  
15ꢀ  
—ꢀ  
—ꢀ  
Auto.ꢀ  
180  
tsdr  
trdr  
DataꢀRetentionꢀSetupꢀTimeꢀ SeeꢀDataꢀRetentionꢀWaveformꢀ  
RecoveryꢀTimeꢀ SeeꢀDataꢀRetentionꢀWaveformꢀ  
0ꢀ  
—ꢀ  
—ꢀ  
ns  
ns  
trCꢀ  
Note:  
1.ꢀꢀTypicalꢀValuesꢀareꢀmeasuredꢀatꢀVccꢀ=ꢀ5V,Ta = 25oCꢀandꢀnotꢀ100%ꢀtested.  
DATA RETENTION WAVEFORM (CS1 Controlled)  
t
SDR  
Data Retention Mode  
tRDR  
VDD  
1.65V  
1.4V  
VDR  
CS1 VDD - 0.2V  
CS1  
GND  
DATA RETENTION WAVEFORM (CS2 Controlled)  
Data Retention Mode  
V
DD  
3.0  
t
t
RDR  
SDR  
CE2  
2.2V  
V
DR  
CS2 0.2V  
0.4V  
GND  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
11  
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
IS62C10248AL (4.5V - 5.5V)  
Industrial Range: –40°C to +85°C  
Speed (ns)  
Order Part No.*  
Package  
55ꢀ  
IS62C10248AL-55TLIꢀ  
IS62C10248AL-55MLIꢀ  
TSOP-II,ꢀLead-free  
miniꢀBGA,ꢀLead-freeꢀ(9mmx11mm)  
*Devices will meet 45ns when used in 0oC to +70oC temperature range.  
IS65C10248AL (4.5V - 5.5V)  
Industrial Range: –40°C to +125°C  
Speed (ns)  
Order Part No.  
Package  
55ꢀ  
IS65C10248AL-55CTLA3ꢀ  
IS65C10248AL-55MLA3ꢀ  
TSOP-II,ꢀLead-free,ꢀCopperꢀLead-frame  
miniꢀBGA,ꢀLead-freeꢀ(9mmx11mm)  
12  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
13  
Rev. 00A  
09/25/09  
IS62C10248AL, IS65C10248AL  
14  
Integrated Silicon Solution, Inc. — www.issi.com — 1-800-379-4774  
Rev. 00A  
09/25/09  

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