IXDE514_技术文档

Preliminary Technical Information

IXDD514 / IXDE514

14 Ampere Low-Side Ultrafast MOSFET Drivers

with Enable for fast, controlled shutdown

Features

General Description

• Built using the advantages and compatibility

of CMOS and IXYS HDMOS^TMprocesses

• Latch-UpProtectedoverentireOperatingRange

• High Peak Output Current: 14A Peak

• Wide Operating Range: 4.5V to 30V

• -55°Cto+125°CExtendedOperating

Temperature

• Ability to Disable Output under Faults

• High Capacitive Load

Drive Capability: 15nF in <30ns

• Matched Rise And Fall Times

• Low Propagation Delay Time

• LowOutputImpedance

TheIXDD514andIXDE514arehighspeedhighcurrentgate

drivers specifically designed to drive the largest IXYS

MOSFETs & IGBTs to their minimum switching time and

maximum parctical frequency limits. The IXDD514 and

IXDE514 can source and sink 14 Amps of Peak Current

while producing voltage rise and fall times of less than

30ns. The inputs of the Drivers are compatible with TTL or

CMOS and are virtually immune to latch up over the entire

operatingrange! Patented*designinnovationseliminate

crossconductionandcurrent"shoot-through". Improved

speedanddrivecapabilitiesarefurtherenhancedbyvery

quick & matched rise and fall times.

TheIXDD514andIXDE514incorporateauniqueabilityto

disable the output under fault conditions. When a logical

low is forced into the Enable input, both final output stage

MOSFETs, (NMOS and PMOS) are turned off. As a result,

the output of the IXDD514 or IXDE514 enters a tristate

modeandachievesaSoftTurn-OffoftheMOSFET/IGBT

when a short circuit is detected. This helps prevent dam-

age that could occur to the MOSFET/IGBT if it were to be

switchedoffabruptlyduetoadv/dtover-voltagetransient.

• LowSupplyCurrent

• TwoDriversinSingleChip

Applications

• DrivingMOSFETsandIGBTs

• Limiting di/dt under Short Circuit

• MotorControls

• LineDrivers

• PulseGenerators

• Local Power ON/OFF Switch

• Switch Mode Power Supplies (SMPS)

• DCtoDCConverters

• PulseTransformerDriver

• Class D Switching Amplifiers

• PowerChargePumps

TheIXDD514andIXDE514areeachavailableinthe8-Pin

P-DIP (PI) package, the 8-Pin SOIC (SIA) package, and the

6-Lead DFN (D1) package, (which occupies less than 65%

of the board area of the 8-Pin SOIC).

*United States Patent 6,917,227

Ordering Information

Part Number

Description

Package

Type

Packing Style

Pack Configuration

Qty

IXDD514PI

IXDD514SIA

14A Low Side Gate Driver I.C. 8-Pin PDIP

14A Low Side Gate Driver I.C. 8-Pin SOIC

Tube

50

94

Non-Inverting

with Enable

IXDD514SIAT/R 14A Low Side Gate Driver I.C. 8-Pin SOIC

IXDD514D1 14A Low Side Gate Driver I.C. 6-Lead DFN 2” x 2” Waffle Pack 56

IXDD514D1T/R 14A Low Side Gate Driver I.C. 6-Lead DFN 13” Tape and Reel 2500

13” Tape and Reel 2500

IXDE514PI

IXDE514SIA

14A Low Side Gate Driver I.C. 8-Pin PDIP

14A Low Side Gate Driver I.C. 8-Pin SOIC

Tube

50

94

Inverting

with Enable

IXDE514SIAT/R 14A Low Side Gate Driver I.C. 8-Pin SOIC

IXDE514D1 14A Low Side Gate Driver I.C. 6-Lead DFN 2” x 2” Waffle Pack 56

13” Tape and Reel 2500

IXDE514D1T/R 14A Low Side Gate Driver I.C. 6-Lead DFN 13” Tape and Reel 2500

NOTE: All parts are lead-free and RoHS Compliant

DS99671(01/07)

First Release

IXDD514 / IXDE514

Figure 1 - IXDD514 14A Non-Inverting Gate Driver Functional Block Diagram

Vcc

200K

P

N

ANTI-CROSS

CONDUCTION

OUT

IN

CIRCUIT *

*

EN

GND

Vcc

Figure 2 - IXDE514 Inverting 14A Gate Driver Functional Block Diagram

Vcc

200K

P

ANTI-CROSS

OUT

GND

CONDUCTION

IN

CIRCUIT *

*

N

EN

GND

* United States Patent 6,917,227

PIN CONFIGURATIONS

8 PIN DIP (PI)

8 PIN SOIC (SIA)

1

8

7

6

5

1

2

8

7

6

5

VCC

OUT

I

VCC

IN

X

D

E

5

1

4

X

D

5

1

4

2

OUT

IN

3

EN

OUT

GND

OUT

GND

4

GND

6 LEAD DFN (D1)

(Bottom View)

6 LEAD DFN (D1)

(Bottom View)

I

6

5

4

IN

6

5

4

IN

VCC

1

2

3

VCC

1

2

3

X

D

E

5

1

4

X

D

5

1

4

OUT

GND

EN

OUT

GND

EN

GND

NOTE: Solder tabs on bottoms of DFN packages are grounded

2

IXDD514 / IXDE514

Operating Ratings ⁽²⁾

Absolute Maximum Ratings ⁽¹⁾

Parameter

Value

Parameter

Value

Supply Voltage

All Other Pins (unless specified

otherwise)

JunctionTemperature

StorageTemperature

LeadTemperature(10Sec)

35 V

Operating Supply Voltage

OperatingTemperatureRange

PackageThermalResistance*

4.5V to 30V

-55 °C to 125°C

-0.3 V to V_CC+ 0.3V

150 °C

-65 °C to 150 °C

300°C

8-PinPDIP

(PI)

θ

(typ) 125°C/W

8-PinSOIC

6-LeadDFN

(SIA)

(D1)

θ_J^J_-^-A_A(typ) 200°C/W

θ

(typ) 125-200°C/W

θ^J-A(max) 1.5°C/W

θ^J_J^-_-^C_S(typ) 5.8°C/W

Electrical Characteristics @ T_A= 25 ^oC ⁽³⁾

Unless otherwise noted, 4.5V ≤ V_CC≤ 30V .

All voltage measurements with respect to GND. IXD_514 configured as described in Test Conditions.

(4)

Symbol

Parameter

Test Conditions

Min

Typ

Max

Units

V

V_IH, V_ENHHigh input & EN voltage

2.5

4.5V ≤ V_CC≤ 18V

V_IL, V_ENL

V_IN

Low input & EN voltage

Input voltage range

Enable voltage range

Input current

1.0

V_CC+ 0.3

10

V

-5

-.3

V

V_EN

V

I_IN

-10

0V ≤ V_IN≤ V_CC

µA

V

V_OH

V_OL

High output voltage

Low output voltage

V_CC- 0.025

0.025

1000

V

R_OH

Output resistance

@ Output high

Output resistance

@ Output Low

I_OUT= 10mA, V_CC= 18V

V_CCis 18V

600

14

mΩ

R_OL

1000

mΩ

I_PEAK

I_DC

Peak output current

A

Continuous output

current

Limited by package power

dissipation

4

t_R

Rise time

C_L=15nF Vcc=18V

23

21

29

25

22

30

40

50

30

ns

t_F

Fall time

C_L=15nF Vcc=18V

t_ONDLY

On-time propagation

delay

t_OFFDLY

t_ENOH

t_DOLD

Off-time propagation

delay

Enable to output high

delay time

Disable to output low

Disable delay time

Power supply voltage

C_L=15nF Vcc=18V

V_CC= 18V

29

31

50

40

30

ns

V

V_CC= 18V

V_CC

I_CC

4.5

18

Power supply current

V_IN= 3.5V

V_IN= 0V

V_IN= + V_CC

1

0

3

10

mA

µA

IXYS reserves the right to change limits, test conditions, and dimensions.

3

IXDD514 / IXDE514

Electrical Characteristics @ temperatures over -55 ^oC to 125 ^oC ⁽³⁾

Unless otherwise noted, 4.5V ≤ V_CC≤ 30V , Tj < 150^oC

All voltage measurements with respect to GND. IXD_502 configured as described in Test Conditions. All specifications are for one channel.

Symbol

V_IH

Parameter

Test Conditions

Min

Typ⁽⁴⁾

Max

Units

V

High input voltage

Low input voltage

Input voltage range

Input current

2.7

4.5V ≤ V_CC≤ 18V

V_IL

0.8

V_CC+ 0.3

10

V

V_IN

-5

V

I_IN

-10

0V ≤ V_IN≤ V_CC

µA

V_OH

V_OL

R_OH

High output voltage

Low output voltage

V_CC- 0.025

V

Ω

0.025

1.25

Output resistance

@ Output high

Output resistance

@ Output Low

Continuous output

current

V_CC= 18V

R_OL

I_DC

1.25

1

Ω

A

t_R

Rise time

C_L=15 nF Vcc=18V

23

30

20

100

60

ns

t_F

Fall time

t_ONDLY

On-time propagation

delay

t_OFFDLY

Off-time propagation

delay

Power supply voltage

C_L=15 nF Vcc=18V

40

18

60

30

ns

V

V_CC

I_CC

4.5

Power supply current

V_IN= 3.5V

V_IN= 0V

V_IN= + V_CC

1

0

3

10

mA

µA

Notes:

1. Operating the device beyond the parameters listed as “Absolute Maximum Ratings” may cause permanent

damage to the device. Exposure to absolute maximum rated conditions for extended periods may affect device

reliability.

2. The device is not intended to be operated outside of the Operating Ratings.

3. Electrical Characteristics provided are associated with the stated Test Conditions.

4. Typical values are presented in order to communicate how the device is expected to perform, but not necessarily

to highlight any specific performance limits within which the device is guaranteed to function.

4

IXDD514 / IXDE514

* The following notes are meant to define the conditions for the θ_J-A, θ_J-Cand θ_J-Svalues:

1) Theθ_J-A(typ)isdefinedasjunctiontoambient. Theθ_J-Aofthestandardsingledie8-LeadPDIPand8-LeadSOICaredominatedbythe

resistanceofthepackage,andtheIXD_5XXaretypical. Thevaluesforthesepackagesarenaturalconvectionvalueswithverticalboards

andthevalueswouldbelowerwithnaturalconvection. Forthe6-LeadDFNpackage,theθ_J-AvaluesupposestheDFNpackageissoldered

onaPCB. Theθ_J-A(typ)is200°C/W with no special provisions on the PCB, but because the center pad provides a low thermal resistance

to the die, it is easy to reduce the θ_J-Aby adding connected copper pads or traces on the PCB. These can reduce the θ_J-A(typ) to 125 °C/W

easily, andpotentiallyevenlower. Theθ_J-AforDFNonPCBwithoutheatsinkorthermalmanagementwillvarysignificantlywithsize,

construction, layout, materials, etc. Thistypicalrangetellstheuserwhatheislikelytogetifhedoesnothermalmanagement.

2) θ_J-C(max) is defined as juction to case, where case is the large pad on the back of the DFN package. The θ_J-Cvalues are generally not

publishedforthePDIPandSOICpackages. Theθ_J-CfortheDFNpackagesareimportanttoshowthelowthermalresistancefromjunctionto

thedieattachpadonthebackoftheDFN, --andaguardbandhasbeenaddedtobesafe.

3) Theθ_J-S(typ)isdefinedasjunctiontoheatsink,wheretheDFNpackageissolderedtoathermalsubstratethatismountedonaheatsink.

Thevaluemustbetypicalbecausethereareavarietyofthermalsubstrates. ThisvaluewascalculatedbasedoneasilyavailableIMSinthe

U.S.orEurope,andnotapremiumJapaneseIMS. A4mildialectricwithathermalconductivityof2.2W/mCwasassumed. Theresultwas

given as typical, and indicates what a user would expect on a typical IMS substrate, and shows the potential low thermal resistance for the

DFNpackage.

Pin Description

SYMBOL

VCC

FUNCTION

Supply Voltage

Input

DESCRIPTION

Positive power-supply voltage input. This pin provides power to the

entire chip. The range for this voltage is from 4.5V to 30V.

Input signal-TTL or CMOS compatible.

IN

The system Enable pin. This pin, when driven low, disables the

chip, forcing a high impedance state to the output. EN pulled high

by a resistor.

Driver Output. For application purposes, this pin is connected,

through a resistor, to Gate of a MOSFET/IGBT.

EN

Enable

Output

OUT

The system ground pin. Internally connected to all circuitry, this pin

provides ground reference for the entire chip. This pin should be

connected to a low noise analog ground plane for optimum

performance.

GND

Ground

CAUTION: Follow proper ESD procedures when handling and assembling this component.

Figure 3 - Characteristics Test Diagram

5.0V

Vcc

10uF

25V

0V

IXDI414

IXDE514

Vcc

VIN

0V

IXDN414

IXDD514

2500pf

15nF

Agilent 1147A

Current Probe

5

IXDD514 / IXDE514

Figure 4 - Timing Diagrams

Non-Inverting (IXDD514) Timing Diagram

5V

90%

INPUT

2.5V

10%

0V

PWMIN

tOFFDLY

tONDLY

tR

t

F

Vcc

90%

OUTPUT

10%

0V

Inverting (IXDE514) Timing Diagram

5V

90%

2.5V

INPUT

10%

0V

PWMIN

tONDLY

tOFFDLY

tF

tR

VCC

90%

OUTPUT

10%

0V

IXYS reserves the right to change limits, test conditions, and dimensions.

6

IXDD514 / IXDE514

Typical Performance Characteristics

Fig. 5

40

Fig. 6

40

Rise Time vs. Supply Voltage

Fall Time vs. Supply Voltage

30

20

10

30

20

10

CL=15,000 pF

7,500 pF

3,600 pF

7,500 pF

3,600 pF

0

8

0

8

10

12

14

16

18

10

12

14

16

18

Supply Voltage (V)

Rise And Fall Times vs. Case Temperature

C = 15 nF, V = 18V

Fig. 7

Fig. 8

50

Rise Time vs. Load Capacitance

L

cc

40

35

30

25

20

15

10

5

8V

40

30

20

10

10V

12V

t_R

t_F

18V

16V

14V

0

0k

5k

10k

15k

20k

-40

-20

0

20

40

60

80

100

120

Load Capacitance (pF)

Temperature (°C)

Fall Time vs. Load Capacitance

Fig. 10

3.2

Max / Min Input vs. Case Temperature

V_CC=18V C_L=15nF

Fig. 9

40

3.0

8V

12V

14V

Minimum Input High

Maximum Input Low

2.8

10V

30

20

10

2.6

18V

16V

2.4

2.2

2.0

1.8

1.6

-60

-40

-20

0

20

40

60

80

100

0

0k

5k

10k

15k

20k

Temperature (^oC)

Load Capacitance (pF)

7

IXDD514 / IXDE514

Fig. 11

Supply Current vs. Load Capacitance

Vcc=18V

Supply Current vs. Frequency

Vcc=18V

Fig. 12

1000

CL= 30 nF

15 nF

100

10

1

2 MHz

100

10

1

1 MHz

5000 pF

2000 pF

500 kHz

100 kHz

50 kHz

0.1

10

100

1000

10000

1k

10k

100k

Frequency (kHz)

Load Capacitance (pF)

Fig. 13

1000

Supply Current vs. Load Capacitance

Vcc=12V

Supply Current vs. Frequency

Vcc=12V

Fig. 14

1000

100

10

CL = 30 nF

15 nF

100

2 MHz

5000 pF

2000 pF

1 MHz

500 kHz

10

1

100 kHz

50 kHz

1

0.1

10

100

1000

10000

1k

10k

Frequency (kHz)

Load Capacitance (pF)

Fig. 15

1000

Supply Current vs. Load Capacitance

Vcc=8V

Fig. 16

Supply Current vs. Frequency

Vcc=8V

1000

100

10

CL= 30 nF

15 nF

100

2 MHz

5000 pF

2000 pF

1 MHz

10

1

500 kHz

1

100 kHz

50 kHz

0.1

10

100

1000

10000

1k

10k

Frequency (kHz)

Load Capacitance (pF)

8

IXDD514 / IXDE514

Fig. 18

Propagation Delay vs. Input Voltage

C_L=15nF V_CC=15V

Fig. 17

Propagation Delay vs. Supply Voltage

C_L=15nF V =5V@1kHz

IN

50

t_OFFDLY

40

30

20

10

40

30

20

10

0

t_ONDLY

t_OFFDLY

0

2

4

6

8

10

12

8

10

12

14

16

18

Input Voltage (V)

Supply Voltage (V)

Propagation Delay vs. Case Temperature

Fig. 19

Fig. 20

Quiescent Supply Current vs. Case Temperature

C = 2500pF, V_CC= 18V

V_CC=18V V =5V@1kHz

L

IN

0.60

50

45

40

35

30

25

20

15

10

0.58

0.56

0.54

0.52

0.50

t_ONDLY

t_OFFDLY

-40

-20

0

20

40

60

80

-40

-20

0

20

40

60

80

100

120

o

Temperature ( C)

Temperature (°C)

Fig. 21

P Channel Output Current vs. Case Temperature

N Channel Output Current vs. Case Temperature

Fig. 22

V_CC=18V C =.1uF

L

V_CC=18V C =.1uF

L

16

17

15

14

13

12

16

15

14

-40

-20

0

20

40

o

60

80

100

-40

-20

0

20

40

o

60

80

100

Temperature ( C)

9

IXDD514 / IXDE514

Fig. 24

High State Output Resistance

vs. Supply Voltage

Fig. 23

Enable Threshold vs. Supply Voltage

14

1.0

12

10

8

0.8

0.6

0.4

0.2

6

4

2

0.0

8

0

8

10

15

20

25

10

12

14

16

18

20

22

24

26

Supply Voltage (V)

Fig. 25

Low-State Output Resistance

vs. Supply Voltage

V_CCvs. P Channel Output Current

Fig. 26

C_L=.1uF V =0-5V@1kHz

IN

1.0

0

-2

-4

0.8

0.6

0.4

0.2

-6

-8

-10

-12

-14

-16

-18

-20

-22

-24

8

0.0

8

10

15

20

25

10

15

20

25

Supply Voltage (V)

Vcc

Fig. 27

Vcc vs. N Channel Output Current

C =.1uF V =0-5V@1kHz

Figure 28 - Typical Application Short Circuit di/dt Limit

L

IN

24

22

20

18

16

14

12

10

8

IXDD514

6

4

2

0

8

10

15

20

25

Vcc

10

IXDD514 / IXDE514

APPLICATIONS INFORMATION

Short Circuit di/dt Limit

by the inductance of the wire connecting the source resistor to

ground. (Those glitches might cause false triggering of the

comparator).

A short circuit in a high-power MOSFET module such as the

VM0580-02F, (580A, 200V), as shown in Figure 28, can cause

the current through the module to flow in excess of 1500A for

10µs or more prior to self-destruction due to thermal runaway.

For this reason, some protection circuitry is needed to turn off

the MOSFET module. However, if the module is switched off

too fast, there is a danger of voltage transients occuring on the

drain due to Ldi/dt, (where L represents total inductance in

series with drain). If these voltage transients exceed the

MOSFET's voltage rating, this can cause an avalanche break-

down.

The comparator's output should be connected to a SRFF(Set

Reset Flip Flop). The flip-flop controls both the Enable signal,

andthelowpowerMOSFETgate. PleasenotethatCMOS4000-

series devices operate with a V_CCrange from 3 to 15 VDC, (with

18 VDC being the maximum allowable limit).

A low power MOSFET, such as the 2N7000, in series with a

resistor, will enable the VMO580-02F gate voltage to drop

gradually. The resistor should be chosen so that the RC time

constant will be 100us, where "C" is the Miller capacitance of

theVMO580-02F.

TheIXDD514andIXDE514havetheuniquecapabilitytosoftly

switch off the high-power MOSFET module, significantly

reducing these Ldi/dt transients.

For resuming normal operation, a Reset signal is needed at

the SRFF's input to enable the IXDD514/IXDE514 again. This

Reset can be generated by connecting a One Shot circuit

between the IXDD514/IXDE514 Input signal and the SRFF

restart input. The One Shot will create a pulse on the rise of the

IXDD514/IXDE514 input, and this pulse will reset the SRFF

outputs to normal operation.

Thus, the IXDD514/IXDE514 help to prevent device destruction

from both dangers; over-current, and avalanche breakdown

due to di/dt induced over-voltage transients.

The IXDD514/IXDE514 are designed to not only provide ±14A

under normal conditions, but also to allow their outputs to go

into a high impedance state. This permits the IXDD514/

IXDE514 output to control a separate weak pull-down circuit

during detected overcurrent shutdown conditions to limit and

separately control d_VGS/dt gate turnoff. This circuit is shown in

Figure 29.

When a short circuit occurs, the voltage drop across the low-

value, current-sensing resistor, (Rs=0.005 Ohm), connected

between the MOSFET Source and ground, increases. This

triggers the comparator at a preset level. The SRFF drives a low

input into the Enable pin disabling the IXDD514/IXDE514

output. The SRFF also turns on the low power MOSFET,

(2N7000).

Referring to Figure 29, the protection circuitry should include

a comparator, whose positive input is connected to the source

of the VM0580-02. A low pass filter should be added to the input

of the comparator to eliminate any glitches in voltage caused

In this way, the high-power MOSFET module is softly turned off

by the IXDD514/IXDE514, preventing its destruction.

Figure 29 - Application Test Diagram

+

VB

Ld

10uH

-

IXDD514/IXDE514

IXDD409

Rd

0.1ohm

VCC

VCCA

Rg

High_Power

VMO580-02F

OUT

IN

EN

1ohm

Rsh

1600ohm

+

-

+

-

VCC

VIN

GND

Rs

Low_Power

2N7002/PLP

Ls

R+

10kohm

20nH

One ShotCircuit

0

Rcomp

5kohm

Comp

LM339

+

V+

NAND

CD4011A

NOT2

CD4049A

C+

100pF

NOT1

CD4049A

V-

-

Ccomp

1pF

Ros

+

-

R

1Mohm

REF

Cos

1pF

Q

NOT3

CD4049A

NOR1

CD4001A

S

EN

NOR2

CD4001A

SR Flip-Flop

11

IXDD514 / IXDE514

Supply Bypassing and Grounding Practices, Output Lead inductance

WhendesigningacircuittodriveahighspeedMOSFETutilizingtheIXDD514/IXDE514,itisveryimportanttokeepcertaindesigncriteria

in mind, in order to optimize performance of the driver. Particular attention needs to be paid to Supply Bypassing, Grounding, and

minimizing the Output Lead Inductance.

Say, for example, we are using the IXDD514 to charge a 5000pF capacitive load from 0 to 25 volts in 25ns…

Using the formula: I= ∆V C /∆t, where ∆V=25V C=5000pF & ∆t=25ns we can determine that to charge 5000pF to 25 volts in 25ns will

take a constant current of 5A. (In reality, the charging current won’t be constant, and will peak somewhere around 8A).

SUPPLY BYPASSING

In order for our design to turn the load on properly, the IXDD514 must be able to draw this 5A of current from the power supply in the

25ns. This means that there must be very low impedance between the driver and the power supply. The most common method of

achieving this low impedance is to bypass the power supply at the driver with a capacitance value that is a magnitude larger than the

load capacitance. Usually, this would be achieved by placing two different types of bypassing capacitors, with complementary

impedancecurves,veryclosetothedriveritself. (Thesecapacitorsshouldbecarefullyselected,lowinductance,lowresistance,high-

pulsecurrent-servicecapacitors). Leadlengthsmayradiateathighfrequencyduetoinductance, socareshouldbetakentokeepthe

lengths of the leads between these bypass capacitors and the IXDD514 to an absolute minimum.

GROUNDING

Inorderforthedesigntoturntheloadoffproperly,theIXDD514mustbeabletodrainthis5Aofcurrentintoanadequategroundingsystem.

Therearethreepathsforreturningcurrentthatneedtobeconsidered: Path#1isbetweentheIXDD514andit’sload. Path#2isbetween

theIXDD514andit’spowersupply. Path#3isbetweentheIXDD514andwhateverlogicisdrivingit. Allthreeofthesepathsshouldbe

aslowinresistanceandinductanceaspossible, andthusasshortaspractical. Inaddition, everyeffortshouldbemadetokeepthese

threegroundpathsdistinctlyseparate. Otherwise,(forinstance),thereturninggroundcurrentfromtheloadmaydevelopavoltagethat

would have a detrimental effect on the logic line driving the IXDD514.

OUTPUT LEAD INDUCTANCE

OfequalimportancetoSupplyBypassingandGroundingareissuesrelatedtotheOutputLeadInductance. Everyeffortshouldbemade

to keep the leads between the driver and it’s load as short and wide as possible. If the driver must be placed farther than 2” from the

load, then the output leads should be treated as transmission lines. In this case, a twisted-pair should be considered, and the return

lineofeachtwistedpairshouldbeplacedascloseaspossibletothegroundpinofthedriver,andconnectdirectlytothegroundterminal

of the load.

12

IXDD514 / IXDE514

PRELIMINARYTECHNICALINFORMATION

The product presented herein is under development.

The Technical Specifications offered are derived from

data gathered during objective characterizations of

preliminary engineering lots; but also may yet contain

some information supplied during a pre-production

design evaluation. IXYS reserves the right to change

limits, test conditions, and dimensions without notice.

A2

b

b2

b3

c

D

D1

E

E1

e

eA

eB

L

E

H

B

C

D

E

e

H

h

L

M

N

D

A

A1

e

B

h X 45

N

L

C

M

0.035 [0.90]

0.137 [3.48]

0.197±0.005 [5.00±0.13]

IXYS Corporation

3540 Bassett St; Santa Clara, CA 95054

Tel: 408-982-0700; Fax: 408-496-0670

e-mail: sales@ixys.net

www.ixys.com

S0.002^0.000;

o

[S0.05^0.00;o

]

0.018 [0.47]

0.100 [2.54]

IXYS Semiconductor GmbH

Edisonstrasse15 ; D-68623; Lampertheim

Tel: +49-6206-503-0; Fax: +49-6206-503627

e-mail: marcom@ixys.de

13


型号：	IXDE514
厂家：	IXYS CORPORATION
描述：	14 Ampere Low-Side Ultrafast MOSFET Drivers with Enable for fast, controlled shutdown
文件：	总13页 (文件大小：469K)
中文：	中文翻译
下载：	下载PDF数据表文档文件

IXDE514 [IXYS]

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