KK74HCT240A [KODENSHI]
Octal 3-State Inverting Buffer/Line Driver/Line Receiver High-Performance Silicon-Gate CMOS; 八路三态缓冲器/线路驱动器/线接收器高性能硅栅CMOS![KK74HCT240A](http://pdffile.icpdf.com/pdf1/p00099/img/icpdf/KK74HCT240A_527306_icpdf.jpg)
型号: | KK74HCT240A |
厂家: | ![]() |
描述: | Octal 3-State Inverting Buffer/Line Driver/Line Receiver High-Performance Silicon-Gate CMOS |
文件: | 总6页 (文件大小:286K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
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TECHNICAL DATA
KK74HCT240A
Octal 3-State Inverting Buffer/Line
Driver/Line Receiver
High-Performance Silicon-Gate CMOS
The KK74HCT240A is identical in pinout to the LS/ALS240. The
KK74HCT240A may be used as a level converter for interfacing TTL or
NMOS outputs to High Speed CMOS inputs.
This octal inverting buffer/line driver/line receiver is designed to be
used with 3-state memory address drivers, clock drivers, and other bus-
oriented systems. The device has inverting outputs and two active-low
output enables.
ORDERING INFORMATION
KK74HCT240AN P lastic
KK74HCT240ADW SOIC
TA = -55° to 125° C for all packages
•
•
•
•
TTL/NMOS Compatible Input Levels
Outputs Directly Interface to CMOS, NMOS, and TTL
Operating Voltage Range: 4.5 to 5.5 V
Low Input Current: 1.0 µA
PIN ASSIGNMENT
LOGIC DIAGRAM
FUNCTION TABLE
Inputs
Enable A,
Outputs
YA,YB
A,B
Enable B
PIN 20=VCC
PIN 10 = GND
L
L
H
X
H
L
Z
L
H
X = don’t care
Z = high impedance
1
KK74HCT240A
MAXIMUM RATINGS*
Symbol
Parameter
Value
-0.5 to +7.0
-1.5 to VCC +1.5
-0.5 to VCC +0.5
±20
Unit
V
VCC
VIN
VOUT
IIN
DC Supply Voltage (Referenced to GND)
DC Input Voltage (Referenced to GND)
DC Output Voltage (Referenced to GND)
DC Input Current, per Pin
V
V
mA
mA
mA
mW
IOUT
ICC
DC Output Current, per Pin
±35
DC Supply Current, VCC and GND Pins
±75
PD
Power Dissipation in Still Air, Plastic DIP+
SOIC Package+
750
500
Tstg
TL
Storage Temperature
-65 to +150
260
°C
°C
Lead Temperature, 1 mm from Case for 10 Seconds
(Plastic DIP or SOIC Package)
*Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
VCC
Parameter
Min
4.5
0
Max
5.5
Unit
V
DC Supply Voltage (Referenced to GND)
DC Input Voltage, Output Voltage (Referenced to GND)
Operating Temperature, All Package Types
Input Rise and Fall Time (Figure 1)
VIN, VOUT
TA
VCC
+125
500
V
-55
0
°C
ns
tr, tf
This device contains protection circuitry to guard against damage due to high static voltages or electric fields.
However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this
high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND≤(VIN or
V
OUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused
outputs must be left open.
2
KK74HCT240A
DC ELECTRICAL CHARACTERISTICS (Voltages Referenced to GND)
VCC
Guaranteed Limit
Symbol
Parameter
Test Conditions
V
Unit
25 °C ≤85
≤125
°C
to
°C
-55°C
VIH
VIL
Minimum High-
Level Input Voltage
VOUT=0.1 V
⎢IOUT⎢≤ 20 µA
4.5
5.5
2.0
2.0
2.0
2.0
2.0
2.0
V
V
V
Maximum Low -
Level Input Voltage
VOUT= VCC-0.1 V
⎢IOUT⎢ ≤ 20 µA
4.5
5.5
0.8
0.8
0.8
0.8
0.8
0.8
VOH
Minimum High-
Level Output Voltage
VIN= VIL
⎢IOUT⎢ ≤ 20 µA
4.5
5.5
4.4
5.4
4.4
5.4
4.4
5.4
VIN=VIL
4.5
3.98 3.84
3.7
⎢IOUT⎢ ≤ 6.0 mA
VOL
Maximum Low-
Level Output Voltage
VIN=VIH
⎢IOUT⎢ ≤ 20 µA
4.5
5.5
0.1
0.1
0.1
0.1
0.1
0.1
V
VIN= VIH
4.5
5.5
0.26 0.33
0.4
⎢IOUT⎢ ≤ 6.0 mA
IIN
Maximum Input
Leakage Current
VIN=VCC or GND
±0.1 ±1.0
±1.0
µA
µA
IOZ
Maximum three State Output in High-Impedance
5.5
±0.5 ±5.0 ±10.0
Leakage Current
State
VIN = VIL or VIH
VOUT=VCC or GND
ICC
Maximum Quiescent
Supply Current
(per Package)
VIN=VCC or GND
5.5
4.0
40
160
µA
I
OUT=0µA
Additional Quiescent VIN = 2.4 V, Any One Input
mA
∆ICC
≥-55°C
2.9
25°C to
125°C
Supply Current
VIN=VCC or GND, Other
Inputs
5.5
2.4
IOUT=0µA
NOTE: Total Supply Current = ICC + ∑∆ICC
3
KK74HCT240A
AC ELECTRICAL CHARACTERISTICS (VCC=5.0 V ± 10%, CL=50pF,Input tr=tf=6.0 ns)
Guaranteed Limit
≤85°C ≤125°C
Symbol
Parameter
Unit
25 °C
to
-55°C
tPLH, tPHL Maximum Propagation Delay, A to YA or B to
YB (Figures 1 and 3)
20
28
25
12
25
35
31
15
30
42
38
18
ns
ns
ns
ns
tPLZ, tPHZ Maximum Propagation Delay, Output Enable to
YA or YB (Figures 2 and 4)
tPZH, tPZL Maximum Propagation Delay, Output Enable to
YA or YB (Figures 2 and 4)
tTLH, tTHL Maximum Output Transition Time, Any Output
(Figures 1 and 3)
CIN
Maximum Input Capacitance
10
15
10
15
10
15
pF
pF
COUT
Maximum Three-State Output Capacitance
(Output in High-Impedance State)
Power Dissipation Capacitance (Per Enable
Output)
Typical @25°C,VCC=5.0 V
CPD
Used to determine the no-load dynamic power
consumption:
55
pF
PD=CPDVCC2f+ICCVCC
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
4
KK74HCT240A
Figure 3. Test Circuit
Figure 4. Test Circuit
EXPANDED LOGIC DIAGRAM
(1/8 of the Device)
5
KK74HCT240A
N SUFFIX PLASTIC DIP
(MS - 001AD)
A
Dimension, mm
11
10
20
1
Symbol MIN
MAX
26.92
7.11
B
24.89
6.1
A
B
C
D
F
5.33
0.36
1.14
0.56
F
L
1.78
2.54
7.62
G
H
J
C
SEATING
PLANE
-T-
K
N
0
10
°
°
M
J
G
H
D
2.92
7.62
0.2
3.81
8.26
0.36
K
L
M
N
0.25 (0.010) M
T
NOTES:
1. Dimensions “A”, “B” do not include mold flash or protrusions.
Maximum mold flash or protrusions 0.25 mm (0.010) per side.
0.38
D SUFFIX SOIC
(MS - 013AC)
A
20
11
Dimension, mm
Symbol MIN
MAX
13
H
B
P
12.6
7.4
A
B
C
D
F
7.6
2.35
0.33
0.4
2.65
0.51
1.27
1
10
G
R x 45
C
-T-
SEATING
PLANE
1.27
9.53
G
H
J
K
M
D
J
F
M
0.25 (0.010) M T C
0
°
8
°
NOTES:
0.1
0.23
10
0.3
0.32
10.65
0.75
K
M
P
1. Dimensions A and B do not include mold flash or protrusion.
2. Maximum mold flash or protrusion 0.15 mm (0.006) per side
for A; for B 0.25 mm (0.010) per side.
‑
0.25
R
6
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