•80C51 Central Processing Unit (CPU).–Option for multiple CPU clock (XTAL1, XTAL1 x 2, or XTAL1 / 3.–Industrial standard 80C51 instruction set.–Normal mode, idle mode, and stop mode.•Program Memory : 64 kbytes on-chip flash memory.–with hardware ISP (In-System Programming).–Program code protection.•Main Data RAM: 256 bytes (upper 128 + lower 128 bytes) of on-chip SRAM.•Aux Memory (AUX RAM): 768 bytes of SRAM.•SFRs (Special Function Register): 46 SFRs.•Timers: Timer 0, Timer 1, and Timer 2.•On-chip Watchdog Timer.•Full-duplex UART•Five I/O ports: Port 0, Port 1, Port 2, Port 3, and Port 4 (P4.0 ~•On-chip power-on-reset with low-voltage detection and reset.•Interrupts: 6 sources, 2 priority level, 6 vectored addresses.•Software enable/disable of ALE output pulse to reduce EMI.•4-channel, 6-bit ADC.•5-channel, 8-bit PWM.•CPU operating freque
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The STK6035, is an one-chip video decoder with integrated scalar, OSD function, TCON, which can
drives small size 2.5, 7, 10-inch or higher TFT-LCD panels with TTL interlace. For digital panels,
STK6035 can support the display resolutions of from 640x480, 800x480, 854x480, and up to
800x600.
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The STK6036, is an one-chip video decoder with integrated scalar, OSD function, TCON, and DAC,
which can drives small size 3.5, 4, 5.6, 7, 8, 9, and up to 10-inch TFT-LCD panel with analog
interlace. For analog panels, STK6036 can support the display resolutions of 1920x468, 1440x468,
960x468, 1920x234, 1440x234, 1200x234, 960x234, 480x234.
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KODENSHI KOREA CORP. 
