LTC3588IDD-1PBF [Linear]
Piezoelectric Energy Harvesting Power Supply; 压电式能量收集电源
| 型号： | LTC3588IDD-1PBF |
| 厂家： | 
Linear |
| 描述： | Piezoelectric Energy Harvesting Power Supply |
| 文件： | 总20页 (文件大小：384K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LTC3588-1
Piezoelectric Energy
Harvesting Power Supply
FEATURES
DESCRIPTION
The LTC®3588-1 integrates a low-loss full-wave bridge
rectifier with a high efficiency buck converter to form a
complete energy harvesting solution optimized for high
output impedance energy sources such as piezoelectric
transducers. An ultralow quiescent current undervoltage
lockout(UVLO)modewithawidehysteresiswindowallows
charge to accumulate on an input capacitor until the buck
converter can efficiently transfer a portion of the stored
charge to the output. In regulation, the LTC3588-1 enters
a sleep state in which both input and output quiescent
currents are minimal. The buck converter turns on and
off as needed to maintain regulation.
n
950nA Input Quiescent Current (Output in
Regulation – No Load)
n
450nA Input Quiescent Current in UVLO
n
2.7V to 20V Input Operating Range
n
Integrated Low-Loss Full-Wave Bridge Rectifier
n
Up to 100mA of Output Current
n
Selectable Output Voltages of 1.8V, 2.5V, 3.3V, 3.6V
n
High Efficiency Integrated Hysteretic Buck DC/DC
n
Input Protective Shunt – Up to 25mA Pull-Down at
V ≥ 20V
IN
n
Wide Input Undervoltage Lockout (UVLO) Range
n
Available in 10-Lead MSE and 3mm × 3mm DFN
Packages
Four output voltages, 1.8V, 2.5V, 3.3V and 3.6V, are pin
selectablewithupto100mAofcontinuousoutputcurrent;
however, the output capacitor may be sized to service a
higher output current burst. An input protective shunt set
at 20V enables greater energy storage for a given amount
of input capacitance.
APPLICATIONS
n
Piezoelectric Energy Harvesting
n
Electro-Mechanical Energy Harvesting
n
Wireless HVAC Sensors
L, LT, LTC, LTM, Linear Technology, the Linear logo and Burst Mode are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
n
Mobile Asset Tracking
n
Tire Pressure Sensors
n
Battery Replacement for Industrial Sensors
n
Remote Light Switches
n
Standalone Nanopower Buck Regulator
TYPICAL APPLICATION
100mA Piezoelectric Energy Harvesting Power Supply
LTC3588-1 3.3V Regulator Start-Up Profile
22
C
= 22μF, C
= 47μF
OUT
STORAGE
20
18
16
14
12
10
8
NO LOAD, I = 2μA
VIN
ADVANCED CERAMETRICS PFC-W14
PZ1
PZ2
SW
10μH
V
IN
V
V
OUT
IN
LTC3588-1
1μF
6V
47μF
6V
V
OUT
CAP
PGOOD
D0, D1
C
STORAGE
2
OUTPUT
VOLTAGE
SELECT
V
25V
6
IN2
GND
V
OUT
4.7μF
6V
4
35881 TA01
2
PGOOD = LOGIC 1
0
0
200
400 600
TIME (s)
35881 TA01b
35881f
1
LTC3588-1
(Note 1)
ABSOLUTE MAXIMUM RATINGS
V
V
....................–0.3V to Lesser of (V + 0.3V) or 6V
OUT IN2
IN
Low Impedance Source .......................–0.3V to 18V*
Current Fed, I = 0A ......................................25mA
PGOOD...............–0.3V to Lesser of (V
+ 0.3V) or 6V
OUT
†
I
, I .............................................................. 50mA
SW
PZ1 PZ2
PZ1, PZ2...........................................................0V to V
I .......................................................................350mA
SW
IN
D0, D1..............–0.3V to [Lesser of (V + 0.3V) or 6V]
Operating Junction Temperature Range
IN2
IN
IN
CAP......................[Higher of –0.3V or (V – 6V)] to V
(Notes 2, 3)................................................–40 to 125°C
Storage Temperature Range.......................–65 to 125°C
Lead Temperature (Soldering, 10 sec)
IN
V
....................–0.3V to [Lesser of (V + 0.3V) or 6V]
IN2
* V has an internal 20V clamp
IN
†
MSE Only.......................................................... 300°C
For t < 1ms and Duty Cycle < 1%,
Absolute Maximum Continuous Current = 5mA
PIN CONFIGURATION
TOP VIEW
TOP VIEW
PZ1
PZ2
CAP
1
2
3
4
5
10 PGOOD
PZ1
PZ2
CAP
IN
SW
1
2
3
4
5
10 PGOOD
9
8
7
6
D0
D1
9
8
7
6
D0
D1
11
11
GND
GND
V
V
V
IN2
OUT
V
V
V
IN
IN2
SW
OUT
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
T
= 125°C, θ = 45°C/W, θ = 10°C/W
JA JC
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JMAX
10-LEAD (3mm s 3mm) PLASTIC DFN
T
= 125°C, θ = 43°C/W, θ = 7.5°C/W
JA JC
EXPOSED PAD (PIN 11) IS GND, MUST BE SOLDERED TO PCB
JMAX
ORDER INFORMATION
LEAD FREE FINISH
LTC3588EDD-1#PBF
LTC3588IDD-1#PBF
LTC3588EMSE-1#PBF
LTC3588IMSE-1#PBF
TAPE AND REEL
PART MARKING*
LFKY
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3588EDD-1#TRPBF
LTC3588IDD-1#TRPBF
–40°C to 85°C
–40°C to 125°C
–40°C to 85°C
–40°C to 125°C
10-Lead (3mm × 3mm) Plastic DFN
10-Lead (3mm × 3mm) Plastic DFN
10-Lead Plastic MSOP
LFKY
LTC3588EMSE-1#TRPBF LTFKX
LTC3588IMSE-1#TRPBF LTFKX
10-Lead Plastic MSOP
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
This product is only offered in trays. For more information go to: http://www.linear.com/packaging/
35881f
2
LTC3588-1
ELECTRICAL CHARACTERISTICS The l denotes the specifications which apply over the full operating
junction temperature range, otherwise specifications are at TJ = 25°C. VIN = 5.5V unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
l
V
Input Voltage Range
Low Impedance Source on V
18.0
V
IN
IN
I
V
IN
Quiescent Current
UVLO
Buck Enabled, Sleeping
Buck Enabled, Sleeping
Buck Enabled, Not Sleeping
VIN
V
V
V
= 2.5V, Not PGOOD
= 4.5V
450
950
1.7
700
1500
2.5
nA
nA
μA
μA
IN
IN
IN
= 18V
I
= 0A (Note 4)
150
250
SW
V
UVLO
V
IN
Undervoltage Lockout Threshold
V
Rising
IN
l
l
l
l
1.8V Output Selected; D1 = 0, D0 = 0
2.5V Output Selected; D1 = 0, D0 = 1
3.3V Output Selected; D1 = 1, D0 = 0
3.6V Output Selected; D1 = 1, D0 = 1
3.77
3.77
4.73
4.73
4.04
4.04
5.05
5.05
4.30
4.30
5.37
5.37
V
V
V
V
V
Falling
IN
l
l
l
l
1.8V Output Selected; D1 = 0, D0 = 0
2.5V Output Selected; D1 = 0, D0 = 1
3.3V Output Selected; D1 = 1, D0 = 0
3.6V Output Selected; D1 = 1, D0 = 1
2.66
2.66
3.42
3.75
2.87
2.87
3.67
4.02
3.08
3.08
3.91
4.28
V
V
V
V
V
V
Shunt Regulator Voltage
I
= 1mA
19.0
25
20.0
21.0
V
mA
mV
SHUNT
IN
VIN
I
Maximum Protective Shunt Current
1ms Duration
= 10μA
SHUNT
Internal Bridge Rectifier Loss
(|V – V | – V )
I
350
400
450
20
BRIDGE
PZ1
PZ2
IN
Internal Bridge Rectifier Reverse
Leakage Current
V
= 18V
= 1μA
nA
V
REVERSE
REVERSE
Internal Bridge Rectifier Reverse
Breakdown Voltage
I
V
30
SHUNT
V
Regulated Output Voltage
1.8V Output Selected
Sleep Threshold
Wake-Up Threshold
2.5V Output Selected
Sleep Threshold
Wake-Up Threshold
3.3V Output Selected
Sleep Threshold
OUT
l
l
1.812
1.788
1.890
2.575
3.399
3.708
V
V
1.710
2.425
3.201
l
l
2.512
2.488
V
V
l
l
3.312
3.288
V
V
Wake-Up Threshold
3.6V Output Selected
Sleep Threshold
l
l
3.612
3.588
V
V
Wake-Up Threshold
3.492
83
PGOOD Falling Threshold
Output Quiescent Current
Buck Peak Switch Current
Available Buck Output Current
Buck PMOS Switch On-Resistance
Buck NMOS Switch On-Resistance
Max Buck Duty Cycle
As a Percentage of the Selected V
92
89
%
nA
mA
mA
Ω
OUT
I
I
I
V
OUT
= 3.6V
150
350
VOUT
PEAK
LOAD
200
100
260
R
R
1.1
1.3
P
N
Ω
l
l
l
100
1.2
%
V
V
D0/D1 Input High Voltage
D0/D1 Input Low Voltage
D0/D1 Input High Current
D0/D1 Input Low Current
V
IH(D0, D1)
IL(D0, D1)
IH(D0, D1)
IL(D0, D1)
0.4
10
10
V
I
I
nA
nA
35881f
3
LTC3588-1
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note that the maximum ambient temperature is determined by specific
operating conditions in conjunction with board layout, the rated package
thermal resistance and other environmental factors.
Note 3: T is calculated from the ambient T and power dissipation P
J
A
D
Note 2: The LTC3588E-1 is guaranteed to meet performance specifications
from 0°C to 85°C. Specifications over the –40°C to 85°C operating
junction temperature range are assured by design, characterization, and
correlation with statistical process controls. The LTC3588I-1 is guaranteed
over the full –40°C to 125°C operating junction temperature range.
according to the following formula: T = T + (P • θ ).
Note 4: Dynamic supply current is higher due to gate charge being
J A D JA
TYPICAL PERFORMANCE CHARACTERISTICS
IVIN in UVLO vs VIN
IVIN in Sleep vs VIN
UVLO Rising vs Temperature
2400
2200
2000
1800
1600
1400
1200
1000
800
1000
900
800
700
600
500
400
300
200
100
0
5.2
5.0
4.8
4.6
4.4
4.2
4.0
3.8
D1 = D0 = 0
D1 = D0 = 1
D1 = D0 = 1
85°C
85°C
25°C
25°C
–40°C
–40°C
D1 = D0 = 0
600
400
2
4
6
8
10 12 14 16 18
(V)
0
1
2
3
4
5
6
–55 –35 –15
5
25 45 65 85 105 125
V
V
(V)
TEMPERATURE (°C)
IN
IN
35881 G02
35881 G01
35881 G03
Total Bridge Rectifier Drop
vs Bridge Current
UVLO Falling vs Temperature
VSHUNT vs Temperature
4.2
4.0
3.8
3.6
3.4
3.2
3.0
2.8
21.0
20.8
20.6
20.4
20.2
20.0
19.8
19.6
19.4
19.2
19.0
1800
1600
1400
1200
1000
800
600
400
200
0
|V
– V | – V
PZ2
PZ1
IN
D1 = D0 = 1
–40°C
D1 = 1, D0 = 0
I
= 25mA
SHUNT
85°C
25°C
I
= 1mA
SHUNT
D1 = D0 = 0
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
1μ
10μ
100μ
1m
10m
TEMPERATURE (°C)
TEMPERATURE (°C)
BRIDGE CURRENT (A)
35881 G04
35881 G05
35881 G06
35881f
4
LTC3588-1
TYPICAL PERFORMANCE CHARACTERISTICS
Bridge Leakage vs Temperature
Bridge Frequency Response
1.8V Output vs Temperature
20
18
16
14
12
10
8
2.0
1.8
1.6
1.4
1.2
1.0
0.8
0.6
0.4
0.2
0
1.85
1.80
1.75
1.70
1.65
1.60
4V APPLIED TO PZ1/PZ2 INPUT
P-P
MEASURED IN UVLO
V
= 18V, LEAKAGE AT PZ1 OR PZ2
IN
SLEEP THRESHOLD
WAKE-UP THRESHOLD
6
PGOOD FALLING
4
2
0
–55
–10
35
80
125
170
10 100 1k 10k 100k 1M 10M 100M
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
FREQUENCY (Hz)
TEMPERATURE (°C)
35881 G07
35881 G08
35881 G09
3.6V Output vs Temperature
2.5V Output vs Temperature
SLEEP THRESHOLD
3.3V Output vs Temperature
3.35
3.30
3.25
3.20
3.15
3.10
3.05
3.00
3.65
3.60
3.55
3.50
3.45
3.40
3.35
3.30
3.25
2.55
2.50
2.45
2.40
2.35
2.30
2.25
SLEEP THRESHOLD
SLEEP THRESHOLD
WAKE-UP THRESHOLD
WAKE-UP THRESHOLD
WAKE-UP THRESHOLD
PGOOD FALLING
PGOOD FALLING
PGOOD FALLING
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
TEMPERATURE (°C)
TEMPERATURE (°C)
TEMPERATURE (°C)
35881 G11
35881 G12
35881 G10
VOUT Load Regulation
VOUT Line Regulation
IVOUT vs Temperature
120
110
100
90
2.56
2.54
2.52
2.50
2.48
2.46
2.44
2.56
2.54
2.52
2.50
2.48
2.46
2.44
L = 10μH, I
= 100mA, D1 = 0, D0 = 1
V
= 5V, L = 10μH, D1 = 0, D0 = 1
LOAD
IN
V
V
= 3.6V
OUT
= 3.3V
OUT
80
70
V
V
= 2.5V
= 1.8V
OUT
60
50
OUT
40
30
20
–55 –35 –15
5
25 45 65 85 105 125
4
6
8
10
V
12
(V)
14
16
18
1μ
10μ
100μ
1m
10m
100m
TEMPERATURE (°C)
LOAD CURRENT (A)
IN
35881 G15
35881 G14
35881 G13
35881f
5
LTC3588-1
TYPICAL PERFORMANCE CHARACTERISTICS
RDS(ON) of PMOS/NMOS
vs Temperature
IPEAK vs Temperature
Operating Waveforms
2.0
1.8
1.6
1.4
1.2
1.0
0.8
300
290
280
270
260
250
240
230
220
210
200
OUTPUT
VOLTAGE
50mV/DIV
AC-COUPLED
NMOS
PMOS
SWITCH
VOLTAGE
2V/DIV
0V
INDUCTOR
CURRENT
200mA/DIV
0mA
35881 G18
–55 –35 –15
5
25 45 65 85 105 125
–55 –35 –15
5
25 45 65 85 105 125
5μs/DIV
V
= 5V, V
= 3.3V
TEMPERATURE (°C)
TEMPERATURE (°C)
IN
OUT
35881 G17
35881 G16
I
= 1mA
LOAD
L = 10μH, C
= 47μF
OUT
Efficiency vs VIN for
ILOAD = 100mA, L = 10μH
Efficiency vs VIN for
VOUT = 3.3V, L = 10μH
Efficiency vs ILOAD, L = 10μH
95
85
75
65
55
45
35
100
90
80
70
60
50
40
100
90
80
70
60
50
40
30
20
10
0
V
= 5V
IN
I
I
I
I
I
= 100mA
= 1mA
= 100μA
= 50μA
= 10μA
LOAD
LOAD
LOAD
LOAD
LOAD
V
= 3.6V
= 3.3V
= 2.5V
= 1.8V
V
V
V
V
= 3.6V
= 3.3V
= 2.5V
= 1.8V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
V
V
V
4
6
8
10
V
12
(V)
14
16
18
2
4
6
8
10 12 14 16 18
(V)
1μ
10μ
100μ
LOAD CURRENT (A)
1m
10m
100m
V
IN
IN
35881 G21
35881 G20
35881 G19
Efficiency vs VIN for
ILOAD = 100mA, L = 100μH
Efficiency vs VIN for
VOUT = 3.3V, L = 100μH
Efficiency vs ILOAD, L = 100μH
95
85
75
65
55
45
35
100
90
80
70
60
50
40
30
20
10
0
100
90
80
70
60
50
40
V
= 5V
IN
I
I
I
I
I
= 100mA
= 100μA
= 50μA
= 30μA
= 10μA
LOAD
LOAD
LOAD
LOAD
LOAD
V
V
V
V
= 3.6V
= 3.3V
= 2.5V
= 1.8V
V
V
V
V
= 3.6V
OUT
OUT
OUT
OUT
OUT
OUT
OUT
OUT
= 3.3V
= 2.5V
= 1.8V
4
6
8
10
12
(V)
14
16
18
1μ
10μ
100μ
LOAD CURRENT (A)
1m
10m
100m
2
4
6
8
10 12 14 16 18
(V)
V
V
IN
IN
35881 G24
35881 G22
35881 G23
35881f
6
LTC3588-1
PIN FUNCTIONS
PZ1 (Pin 1): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ2).
V
(Pin 7): Internal low voltage rail to serve as gate drive
IN2
for buck NMOS switch. Also serves as a logic high rail for
output voltage select bits D0 and D1. A 4.7μF capacitor
PZ2 (Pin 2): Input connection for piezoelectric element or
other AC source (used in conjunction with PZ1).
should be connected from V to GND. This pin is not
IN2
intended for use as an external system rail.
CAP (Pin 3): Internal rail referenced to V to serve as gate
IN
D1 (Pin 8): Output Voltage Select Bit. D1 should be tied
drive for buck PMOS switch. A 1μF capacitor should be
high to V or low to GND to select desired V
(see
IN2
OUT
connected between CAP and V . This pin is not intended
IN
Table 1).
for use as an external system rail.
D0 (Pin 9): Output Voltage Select Bit. D0 should be tied
V
(Pin 4): Rectified Input Voltage. A capacitor on this
IN
high to V or low to GND to select desired V
(see
IN2
OUT
pin serves as an energy reservoir and input supply for the
Table 1).
buck regulator. The V voltage is internally clamped to a
maximum of 20V (typical).
IN
PGOOD (Pin 10): Power good output is logic high when
is above 92% of the target value. The logic high is
V
OUT
SW (Pin 5): Switch Pin for the Buck Switching Regulator.
referenced to the V
rail.
OUT
A 10μH or larger inductor should be connected from SW
to V
.
GND (Exposed Pad Pin 11): Ground. The Exposed Pad
should be connected to a continuous ground plane on the
second layer of the printed circuit board by several vias
directly under the LTC3588-1.
OUT
V
(Pin 6): Sense pin used to monitor the output volt-
OUT
age and adjust it through internal feedback.
35881f
7
LTC3588-1
BLOCK DIAGRAM
4
V
IN
20V
INTERNAL RAIL
GENERATION
3
5
7
CAP
SW
1
2
PZ1
PZ2
V
IN2
BUCK
CONTROL
UVLO
GND
11
SLEEP
BANDGAP
REFERENCE
V
6
OUT
8, 9
D1, D0
2
PGOOD
COMPARATOR
10
PGOOD
35881 BD
35881f
8
LTC3588-1
OPERATION
The LTC3588-1 is an ultralow quiescent current power
supply designed specifically for energy harvesting and/or
lowcurrentstep-downapplications.Thepartisdesignedto
interfacedirectlytoapiezoelectricoralternativeA/Cpower
source, rectify a voltage waveform and store harvested
energyonanexternalcapacitor,bleedoffanyexcesspower
via an internal shunt regulator, and maintain a regulated
output voltage by means of a nanopower high efficiency
synchronous buck regulator.
Internal Rail Generation
Twointernalrails,CAPandV ,aregeneratedfromV and
IN2
IN
are used to drive the high side PMOS and low side NMOS
of the buck converter, respectively. Additionally the V
IN2
rail serves as logic high for output voltage select bits D0
and D1. The V rail is regulated at 4.8V above GND while
IN2
the CAP rail is regulated at 4.8V below V . These are not
IN
intended to be used as external rails. Bypass capacitors
are connected to the CAP and V pins to serve as energy
IN2
reservoirsfordrivingthebuckswitches.WhenV isbelow
IN
Internal Bridge Rectifier
4.8V, V is equal to V and CAP is held at GND. Figure 1
IN2
IN
The LTC3588-1 has an internal full-wave bridge rectifier
accessible via the differential PZ1 and PZ2 inputs that
rectifies AC inputs such as those from a piezoelectric
element. The rectified output is stored on a capacitor at
shows the ideal V , V and CAP relationship.
IN IN2
18
16
14
the V pin and can be used as an energy reservoir for the
IN
V
IN
12
10
8
buck converter. The low-loss bridge rectifier has a total
dropofabout400mVwithtypicalpiezogeneratedcurrents
(~10μA). The bridge is capable of carrying up to 50mA.
One side of the bridge can be operated as a single-ended
DC input. PZ1 and PZ2 should never be shorted together
when the bridge is in use.
6
V
IN2
4
CAP
2
0
0
5
10
15
Undervoltage Lockout (UVLO)
V
(V)
IN
35881 F01
When the voltage on V rises above the UVLO rising
IN
Figure 1. Ideal VIN, VIN2 and CAP Relationship
threshold the buck converter is enabled and charge is
transferred from the input capacitor to the output capaci-
tor. A wide (~1V) UVLO hysteresis window is employed
with a lower threshold approximately 300mV above the
selected regulated output voltage to prevent short cycling
during buck power-up. When the input capacitor voltage
is depleted below the UVLO falling threshold the buck
converter is disabled. Extremely low quiescent current
(450nA typical) in UVLO allows energy to accumulate on
the input capacitor in situations where energy must be
harvested from low power sources.
Buck Operation
The buck regulator uses a hysteretic voltage algorithm
to control the output through internal feedback from the
V
OUT
sense pin. The buck converter charges an output
capacitor through an inductor to a value slightly higher
than the regulation point. It does this by ramping the
inductor current up to 260mA through an internal PMOS
switch and then ramping it down to 0mA through an in-
ternal NMOS switch. This efficiently delivers energy to the
outputcapacitor.TheramprateisdeterminedbyV ,V
and the inductor value. If the input voltage falls below the
,
IN OUT
35881f
9
LTC3588-1
OPERATION
Table 1. Output Voltage Selection
UVLO falling threshold before the output voltage reaches
regulation, the buck converter will shut off and will not
be turned on until the input voltage again rises above the
UVLOrisingthreshold. Duringthistimetheoutputvoltage
will be loaded by less than 100nA. When the buck brings
the output voltage into regulation the converter enters a
low quiescent current sleep state that monitors the output
voltagewithasleepcomparator.Duringthisoperatingmode
loadcurrentisprovidedbythebuckoutputcapacitor.When
theoutputvoltagefallsbelowtheregulationpointthebuck
regulator wakes up and the cycle repeats. This hysteretic
method of providing a regulated output reduces losses
associated with FET switching and maintains an output
at light loads. The buck delivers a minimum of 100mA of
average load current when it is switching.
D1
0
D0
0
V
V
QUIESCENT CURRENT (I
)
OUT
OUT
VOUT
1.8V
2.5V
3.3V
3.6V
44nA
62nA
81nA
89nA
0
1
1
0
1
1
The internal feedback network draws a small amount of
current from V as listed in Table 1.
OUT
Power Good Comparator
Apowergoodcomparatorproducesalogichighreferenced
to V
on the PGOOD pin the first time the converter
OUT
reaches the sleep threshold of the programmed V
,
OUT
signaling that the output is in regulation. The PGOOD pin
will remain high until V falls to 92% of the desired
OUT
When the sleep comparator signals that the output has
reached the sleep threshold the buck converter may be
in the middle of a cycle with current still flowing through
the inductor. Normally both synchronous switches would
turn off and the current in the inductor would freewheel
to zero through the NMOS body diode. The LTC3588-1
keeps the NMOS switch on during this time to prevent the
conduction loss that would occur in the diode if the NMOS
were off. If the PMOS is on when the sleep comparator
trips the NMOS will turn on immediately in order to ramp
down the current. If the NMOS is on it will be kept on until
the current reaches zero.
regulation voltage. Several sleep cycles may occur during
thistime.Additionally,ifPGOODishighandV fallsbelow
IN
the UVLO falling threshold, PGOOD will remain high until
V
falls to 92% of the desired regulation point. This
OUT
allows output energy to be used even if the input is lost.
Figure 2 shows the behavior for V
= 3.6V and no load.
OUT
At t = 75s V becomes high impedance and is discharged
IN
by the quiescent current of the LTC3588-1 and through
servicing V
which is discharged by its own leakage
OUT
current.V crossesUVLOfallingbutPGOODremainshigh
IN
untilV decreasesto92%ofthedesiredregulationpoint.
OUT
The PGOOD pin is designed to drive a microprocessor or
other chip I/O and is not intended to drive higher current
loads such as an LED.
Though the quiescent current when the buck is switching
is much greater than the sleep quiescent current, it is still
a small percentage of the average inductor current which
results in high efficiency over most load conditions. The
buck operates only when sufficient energy has been ac-
cumulated in the input capacitor and the length of time the
converter needs to transfer energy to the output is much
less than the time it takes to accumulate energy. Thus, the
buck operating quiescent current is averaged over a long
period of time so that the total average quiescent current
is low. This feature accommodates sources that harvest
small amounts of ambient energy.
6
C
= C
= 100μF
VOUT
VIN
5
4
3
2
1
0
V
IN
V
= UVLO FALLING
IN
V
OUT
PGOOD
200
Four selectable voltages are available by tying the output
0
100
300
select bits, D0 and D1, to GND or V . Table 1 shows
IN2
TIME (s)
35881 F02
the four D0/D1 codes and their corresponding output
voltages.
Figure 2. PGOOD Operation During Transition to UVLO
35881f
10
LTC3588-1
OPERATION
The D0/D1 inputs can be switched while in regulation as
Energy Storage
showninFigure3. IfV
isprogrammedtoavoltagewith
OUT
Harvested energy can be stored on the input capacitor
or the output capacitor. The wide input range takes ad-
vantage of the fact that energy storage on a capacitor is
proportional to the square of the capacitor voltage. After
the output voltage is brought into regulation any excess
energy is stored on the input capacitor and its voltage
increases. When a load exists at the output the buck can
efficiently transfer energy stored at a high voltage to the
regulatedoutput. Whileenergystorageattheinpututilizes
the high voltage at the input, the load current is limited
to what the buck converter can supply. If larger loads
need to be serviced the output capacitor can be sized to
support a larger current for some duration. For example,
a current burst could begin when PGOOD goes high and
would continuously deplete the output capacitor until
PGOOD went low.
aPGOODfallingthresholdabovetheoldV , PGOODwill
OUT
transition low until the new regulation point is reached.
When V
is programmed to a lower voltage, PGOOD
OUT
will remain high through the transition.
5
C
= 100μF, I
= 100mA
LOAD
OUT
D1=D0=0
D1=D0=1
D1=D0=0
4
3
2
1
0
V
OUT
PGOOD = LOGIC1
0
2
4
6
8
10 12 14 16 18 20
TIME (ms)
35881 F03
Figure 3. PGOOD Operation During D0/D1 Transition
35881f
11
LTC3588-1
APPLICATIONS INFORMATION
Introduction
The LTC3588-1 is well-suited to a piezoelectric energy
harvesting application. The 20V input protective shunt
can accommodate a variety of piezoelectric elements. The
low quiescent current of the LTC3588-1 enables efficient
energy accumulation from piezoelectric elements which
can have short-circuit currents on the order of tens of
microamps. Piezoelectric elements can be obtained from
manufacturers listed in Table 2.
The LTC3588-1 harvests ambient vibrational energy
through a piezoelectric element in its primary application.
Common piezoelectric elements are PZT (lead zirconate
titanate) ceramics, PVDF (polyvinylidene fluoride) poly-
mers,orothercomposites.Ceramicpiezoelectricelements
exhibit a piezoelectric effect when the crystal structure
of the ceramic is compressed and internal dipole move-
ment produces a voltage. Polymer elements comprised
of long-chain molecules produce a voltage when flexed
as molecules repel each other. Ceramics are often used
under direct pressure while a polymer can be flexed more
readily. A wide range of piezoelectric elements are avail-
able and produce a variety of open-circuit voltages and
short-circuit currents. Typically the open-circuit voltage
andshort-circuitcurrentsincreasewithavailablevibrational
energy as shown in Figure 4. Piezoelectric elements can
be placed in series or in parallel to achieve desired open-
circuit voltages.
Table 2. Piezoelectric Element Manufacturers
Advanced Cerametrics
Piezo Systems
www.advancedcerametrics.com
www.piezo.com
Measurement Specialties
PI (Physik Instrumente)
MIDE Technology Corporation
Morgan Technical Ceramics
www.meas-spec.com
www.pi-usa.us
www.mide.com
www.morganelectroceramics.com
The LTC3588-1 will gather energy and convert it to a use-
able output voltage to power microprocessors, wireless
sensors, and wireless transmission components. Such a
wireless sensor application may require much more peak
power than a piezoelectric element can produce. However,
the LTC3588-1 accumulates energy over a long period of
time to enable efficient use for short power bursts. For
continuous operation, these bursts must occur with a low
dutycyclesuchthatthetotaloutputenergyduringtheburst
doesnotexceedtheaveragesourcepowerintegratedover
an energy accumulation cycle. For piezoelectric inputs the
time between cycles could be minutes, hours, or longer
depending on the selected capacitor values and the nature
of the vibration source.
12
9
INCREASING
VIBRATION ENERGY
6
3
0
0
10
20
30
PIEZO CURRENT (μA)
35881 F04
Figure 4. Typical Piezoelectric Load Lines
for Piezo Systems T220-A4-503X
35881f
12
LTC3588-1
APPLICATIONS INFORMATION
OUTPUT
VOLTAGE
PZ1
PZ2
20mV/DIV
V
PGOOD
T
EN
IN
X
AC-COUPLED
1μF
6V
MICROPROCESSOR
10μH
3.3V
LTC3588-1
CAP
SW
OUT
10μF
25V
CORE
GND
LOAD
CURRENT
25mA/DIV
V
V
IN2
D1
D0
47μF
6V
4.7μF
6V
GND
5mA
35881 F05a
35881 F05b
250μs/DIV
= 47μF
V
= 5V
IN
L = 10μH, C
OUT
LOAD STEP BETWEEN 5mA and 55mA
Figure 5. 3.3V Piezoelectric Energy Harvester Powering a Microprocessor
with a Wireless Transmitter and 50mA Load Step Response
PGOOD Signal
The PGOOD signal can be used to enable a sleeping
lettingV chargetoahighvoltage,orboth.Enoughenergy
IN
should be stored on the input so that the buck does not
reach the UVLO falling threshold which would halt energy
transfer to the output. In general:
microprocessor or other circuitry when V
reaches
OUT
regulation, as shown in Figure 5. Typically V will be
IN
1
2
somewhere between the UVLO thresholds at this time
and a load could only be supported by the output capaci-
tor. Alternatively, waiting a period of time after PGOOD
goes high would let the input capacitor accumulate more
energy allowing load current to be maintained longer as
the buck efficiently transfers that energy to the output.
While active, a microprocessor may draw a small load
when operating sensors, and then draw a large load to
transmit data. Figure 5 shows the LTC3588-1 responding
smoothly to such a load step.
2
P
LOADtLOAD = ηCIN
V
2 − VUVLOFALLING
(
)
IN
VUVLOFALLING ≤ V ≤ VSHUNT
IN
The above equation can be used to size the input capaci-
tor to meet the power requirements of the output for the
desired duration. Here η is the average efficiency of the
buck converter over the input range and V is the input
IN
voltage when the buck begins to switch. This equation
mayoverestimatetheinputcapacitornecessarysinceload
current can deplete the output capacitor all the way to the
lower PGOOD threshold. It also assumes that the input
source charging has a negligible effect during this time.
Input and Output Capacitor Selection
The input and output capacitors should be selected based
on the energy needs and load requirements of the ap-
The duration for which the regulator sleeps depends on
the load current and the size of the output capacitor. The
sleep time decreases as the load current increases and/or
astheoutputcapacitordecreases.TheDCsleephysteresis
window is 12mV around the programmed output volt-
age. Ideally this means that the sleep time is determined
by the following equation:
plication. In every case the V capacitor should be rated
IN
to withstand the highest voltage ever present at V .
IN
For 100mA or smaller loads, storing energy at the input
takes advantage of the high voltage input since the buck
can deliver 100mA average load current efficiently to the
output. The input capacitor should then be sized to store
enough energy to provide output power for the length of
time required. This may involve using a large capacitor,
24mV
tSLEEP =COUT
ILOAD
35881f
13
LTC3588-1
APPLICATIONS INFORMATION
This is true for output capacitors on the order of 100μF
or larger, but as the output capacitor decreases towards
10μF delays in the internal sleep comparator along with
of loss. Tradeoffs between price, size, and DCR should be
evaluated. Table 3 lists several inductors that work well
with the LTC3588-1.
the load current may result in the V
voltage slewing
OUT
Table 3. Recommended Inductors for LTC3588-1
MAX MAX
past the 12mV thresholds. This will lengthen the sleep
time and increase V ripple. A capacitor less than 10μF
OUT
INDUCTOR
TYPE
L
I
DCR
(Ω)
SIZE in mm
MANU-
FACTURER
DC
is not recommended as V
ripple could increase to an
(μH) (mA)
(L × W × H)
OUT
undesirable level.
CDRH2D18/LDNP 10
430 0.180
650 0.145
350 0.301
1000 0.130
490 0.611
500 0.250
Sumida
Toko
3 × 3 × 2
107AS-100M
10
10
2.8 × 3 × 1.8
2.8 × 3 × 1.5
3.2 × 2.5 × 1.0
2.0 × 1.9 × 1.0
7.0 × 7.0 × 4.5
Iftransientloadcurrentsabove100mAarerequiredthena
larger capacitor can be used at the output. This capacitor
will be continuously discharged during a load condition
and the capacitor can be sized for an acceptable drop in
EPL3015-103ML
MLP3225s100L
XLP2010-163ML
SLF7045T
Coilcraft
TDK
10
10
Coilcraft
TDK
100
V
:
OUT
ILOAD −IBUCK
COUT = VOUT+ − VOUT–
(
)
V
and CAP Capacitors
IN2
tLOAD
A 1ꢀF capacitor should be connected between V and
IN
Here V
and V
is the value of V
when PGOOD goes high
OUT
CAP and a 4.7μF capacitor should be connected between
OUT+
OUT–
is the desired lower limit of V . I
is the
V
and GND. These capacitors hold up the internal rails
OUT BUCK
IN2
average current being delivered from the buck converter,
typically I /2.
during buck switching and compensate the internal rail
generation circuits. In applications where the input source
is limited to less than 6V, the CAP pin can be tied to GND
PEAK
A standard surface mount ceramic capacitor can be used
for C , though some applications may be better suited
to a low leakage aluminum electrolytic capacitor or a
supercapacitor. These capacitors can be obtained from
manufacturers such as Vishay, Illinois Capacitor, AVX,
or CAP-XX.
and the V pin can be tied to V as shown in Figure 6.
IN2
IN
OUT
An optional 5.6V Zener diode can be connected to V to
IN
clamp V in this scenario. The leakage of the Zener diode
IN
below its Zener voltage should be considered as it may
be comparable to the quiescent current of the LTC3588-1.
This circuit does not require the capacitors on V and
IN2
CAP, saving components and allowing a lower voltage
Inductor
rating for the single V capacitor.
IN
Thebuckisoptimizedtoworkwithaninductorintherange
of 10μH to 22μH, although inductor values outside this
range may yield benefits in some applications. For typical
applications, a value of 10μH is recommended. A larger
inductorwillbenefithighvoltageapplicationsbyincreasing
the on-time of the PMOS switch and improving efficiency
by reducing gate charge loss. Choose an inductor with a
DC current rating greater than 350mA. The DCR of the
inductor can have an impact on efficiency as it is a source
PIEZO SYSTEMS T220-A4-503X
PZ1
PZ2
PGOOD
V
V
PGOOD
IN
IN2
10μH
LTC3588-1
V
OUT
10μF
6V
CAP
D1
SW
OUT
1.8V
5.6V
(OPTIONAL)
V
10μF
6V
D0
GND
35881 F06
Figure 6. Smallest Solution Size 1.8V Low Voltage Input
Piezoelectric Power Supply
35881f
14
LTC3588-1
APPLICATIONS INFORMATION
Additional Applications with Piezo Inputs
A piezo powered LTC3588-1 can also be used in concert
with a battery connected to V to supplement the system
IN
The versatile LTC3588-1 can be used in a variety of con-
figurations.Figure7showsasinglepiezosourcepowering
two LTC3588-1s simultaneously, providing capability for
multiple rail systems. This setup features automatic sup-
ply sequencing as the LTC3588-1 with the lower voltage
output(i.e.lowerUVLOrisingthreshold)willcomeupfirst.
if ambient vibrational energy ceases as shown in Figure 8.
A blocking diode placed in series with the battery to V
IN
prevents reverse current in the battery if the piezo source
chargesV pastthebatteryvoltage.A9Vbatteryisshown,
IN
but any stack of batteries of a given chemistry can be used
as long as the battery stack voltage does not exceed 18V.
In this setup the presence of the piezo energy harvester
can greatly increase the life of the battery. If the piezo
source is removed the LTC3588-1 can serve as a stand-
alone nanopower buck converter. In this case the bridge
is unused and the blocking diode is unnecessary.
As the piezo provides input power both V rails will
IN
initially come up together, but when one output starts
drawing power, only its corresponding V will fall as the
IN
bridges of each LTC3588-1 provide isolation. Input piezo
energy will then be directed to this lower voltage capacitor
until both V rails are again equal. This configuration is
IN
expandable to any number of LTC3588-1s powered by a
single piezo as long as the piezo can support the sum total
of the quiescent currents from each LTC3588-1.
PIEZO SYSTEMS T220-A4-503X
PZ1
PZ2
PZ1
PZ2
PGOOD1
10μH
PGOOD2
10μH
PGOOD
V
V
PGOOD
IN
IN
1μF
6V
1μF
6V
LTC3588-1
LTC3588-1
3.6V
1.8V
SW
CAP
CAP
SW
OUT
10μF
25V
10μF
25V
V
V
V
IN2
V
OUT
IN2
D1
10μF
6V
10μF
6V
D1
D0
4.7μF
6V
4.7μF
6V
D0
GND
GND
35881 F07
Figure 7. Dual Rail Power Supply with Single Piezo and
Automatic Supply Sequencing
PIEZO SYSTEMS T220-A4-503X
IR05H40CSPTR
PZ1
PZ2
PGOOD
10μH
V
PGOOD
IN
1μF
6V
LTC3588-1
V
OUT
CAP
SW
OUT
3.3V
100μF
16V
V
V
IN2
9V
BATTERY
47μF
6V
D1
D0
PZ1
PZ2
4.7μF
6V
GND
35881 F08
Figure 8. Piezo Energy Harvester with Battery Backup
35881f
15
LTC3588-1
APPLICATIONS INFORMATION
DANGER! HIGH VOLTAGE!
DANGEROUS AND LETHAL POTENTIALS ARE PRESENT IN OFFLINE CIRCUITS!
BEFORE PROCEEDING ANY FURTHER, THE READER IS WARNED THAT
CAUTION MUST BE USED IN THE CONSTRUCTION, TESTING AND USE OF
OFFLINE CIRCUITS. EXTREME CAUTION MUST BE USED IN WORKING WITH
AND MAKING CONNECTIONS TO THESE CIRCUITS. REPEAT: OFFLINE
CIRCUITS CONTAIN DANGEROUS, AC LINE-CONNECTED HIGH VOLTAGE
POTENTIALS. USE CAUTION. ALL TESTING PERFORMED ON AN OFFLINE
CIRCUIT MUST BE DONE WITH AN ISOLATION TRANSFORMER CONNECTED
BETWEEN THE OFFLINE CIRCUIT’S INPUT AND THE AC LINE. USERS AND
CONSTRUCTORS OF OFFLINE CIRCUITS MUST OBSERVE THIS PRECAUTION
WHEN CONNECTING TEST EQUIPMENT TO THE CIRCUIT TO AVOID ELECTRIC
SHOCK. REPEAT: AN ISOLATION TRANSFORMER MUST BE CONNECTED
BETWEEN THE CIRCUIT INPUT AND THE AC LINE IF ANY TEST EQUIPMENT IS
TO BE CONNECTED.
150k
150k
120VAC
60Hz
150k
150k
PZ1
PZ2
PGOOD
10μH
V
PGOOD
IN
1μF
6V
LTC3588-1
V
OUT
CAP
SW
OUT
3.6V
10μF
25V
V
V
IN2
100μF
6V
D1
D0
4.7μF
6V
GND
35881 F09
Figure 9. AC Line Powered 3.6V Buck Regulator with
Large Output Capacitor to Support Heavy Loads
PANELS ARE PLACED 6"
COPPER PANEL
(12" s 24")
COPPER PANEL
(12" s 24")
FROM 2' s 4' FLUORESCENT
LIGHT FIXTURES
PZ1
PZ2
PGOOD
10μH
V
PGOOD
IN
1μF
6V
LTC3588-1
3.3V
CAP
SW
OUT
10μF
25V
V
V
IN2
10μF
6V
D1
D0
4.7μF
6V
GND
35881 F10
Figure 10. Electric Field Energy Harvester
Alternate Power Sources
harvest energy from the electric field around the light.
The frequency of the emission will be 120Hz for magnetic
ballasts but could be higher if the light uses electronic
ballast. The LTC3588-1 bridge rectifier can handle a wide
range of input frequencies.
The LTC3588-1 is not limited to use with piezoelectric ele-
mentsbutcanaccommodateawidevarietyofinputsources
dependingonthetypeofambientenergyavailable.Figure9
shows the LTC3588-1 internal bridge rectifier connected
to the AC line in series with four 150k current limiting
resistors. This is a high voltage application and minimum
spacing between the line, neutral, and any high voltage
components should be maintained per the applicable UL
specification. For general off-line applications refer to UL
regulation 1012.
The LTC3588-1 can also be configured for use with DC
sources such as a solar panel or thermal couple as shown
in Figures 11 and 12 by connecting them to one of the
PZ1/PZ2 inputs. Connecting the two sources in this way
prevents reverse current from flowing in each element.
Current limiting resistors should be used to protect the
PZ1 or PZ2 pins. This can be combined with a battery
Figure 10 shows an application where copper panels are
placednearastandardfluorescentroomlighttocapacitively
backup connected to V with a blocking diode.
IN
35881f
16
LTC3588-1
APPLICATIONS INFORMATION
300ꢁ
PZ1
PZ2
IR05H4OCSPTR
V
PGOOD
PGOOD
10μH
IN
1μF
LTC3588-1
+
–
6V
5V TO 16V
SOLAR PANEL
V
OUT
2.5V
CAP
SW
OUT
100μF
25V
9V
BATTERY
V
V
IN2
+
3F
2.7V
D0
D1
4.7μF
6V
10μF
6V
GND
NESS SUPER CAPACITOR
ESHSR-0003CO-002R7
35881 F11
Figure 11. 5V to 16V Solar-Powered 2.5V Supply with Supercapacitor for
Increased Output Energy Storage and Battery Backup
R , 5.2ꢁ 100ꢁ
S
PZ1
PZ2
PG-1 THERMAL
GENERATOR
P/N G1-1.0-127-1.27
(TELLUREX)
V
PGOOD
PGOOD
10μH
IN
1μF
6V
LTC3588-1
V
OUT
CAP
SW
OUT
5.4V
1μF
16V
2.5V
V
V
IN2
47μF
6V
D0
D1
4.7μF
6V
GND
35881 F12
Figure 12. Thermoelectric Energy Harvester
35881f
17
LTC3588-1
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699)
R = 0.115
TYP
6
0.38 0.10
10
0.675 0.05
3.50 0.05
2.15 0.05 (2 SIDES)
1.65 0.05
3.00 0.10
(4 SIDES)
1.65 0.10
(2 SIDES)
PIN 1
PACKAGE
OUTLINE
TOP MARK
(SEE NOTE 6)
(DD) DFN 1103
5
1
0.25 0.05
0.50 BSC
0.75 0.05
0.200 REF
0.25 0.05
0.50
BSC
2.38 0.10
(2 SIDES)
2.38 0.05
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
35881f
18
LTC3588-1
PACKAGE DESCRIPTION
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.06 p 0.102
2.794 p 0.102
(.110 p .004)
0.889 p 0.127
(.035 p .005)
(.081 p .004)
1
1.83 p 0.102
(.072 p .004)
5.23
(.206)
MIN
2.083 p 0.102 3.20 – 3.45
(.082 p .004) (.126 – .136)
10
0.50
(.0197)
BSC
0.305 p 0.038
(.0120 p .0015)
TYP
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.497 p 0.076
(.0196 p .003)
REF
10 9
8
7 6
RECOMMENDED SOLDER PAD LAYOUT
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0.254
(.010)
0o – 6o TYP
1
2
3
4 5
GAUGE PLANE
0.53 p 0.152
(.021 p .006)
0.86
(.034)
REF
1.10
(.043)
MAX
DETAIL “A”
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
0.1016 p 0.0508
(.004 p .002)
0.50
(.0197)
BSC
MSOP (MSE) 0307 REV B
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
35881f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representa-
tion that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3588-1
TYPICAL APPLICATION
Peak-to-Peak Output Ripple vs COUT1
Piezoelectric 3.3V Power Supply with LDO
Post Regulator for Reduced Output Ripple
120
100
80
60
40
20
0
C
= 1μF
OUT2
V
V
(LTC3588-1)
PZ1
PZ2
OUT1
OUT2
V
IN
PGOOD
SHDN
LT3009-3.3
V
1μF
6V
OUT1
10μH
V
3.6V
OUT2
LTC3588-1
CAP
SW
OUT
3.3V
IN
OUT
47μF
25V
20mA
V
IN2
V
GND
D1
D0
C
10μF
6V
C
OUT2
(LT3009-3.3)
100
4.7μF
6V
OUT1
1μF
GND
6V
35881 TA02a
10
C
(μF)
OUT1
35881 TA02b
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Q
35881f
LT 0110 • PRINTED IN USA
LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
20
●
●
© LINEAR TECHNOLOGY CORPORATION 2010
(408) 432-1900 FAX: (408) 434-0507 www.linear.com
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