SP720ABT [LITTELFUSE]
TVS Diode Arrays - Elctronic Protection Array for ESD and Overvoltage Protection; 瞬态抑制二极管阵列 - 插卡电脑保护阵列的ESD和过电压保护
| 型号： | SP720ABT |
| 厂家： | 
LITTELFUSE |
| 描述： | TVS Diode Arrays - Elctronic Protection Array for ESD and Overvoltage Protection |
| 文件： | 总6页 (文件大小：103K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
TVS Diode Arrays
Electronic Protection Array for ESD and Overvoltage Protection
SP720
The SP720 is an array of SCR/Diode bipolar structures for ESD and
over-voltage protection to sensitive input circuits. The SP720 has 2
protection SCR/Diode device structures per input. A total of 14 available
inputs can be used to protect up to 14 external signal or bus lines.
Over-voltage protection is from the IN (pins 1-7 and 9-15) to V+ or V-.
The SCR structures are designed for fast triggering at a threshold of one
+V
diode threshold above V+ (Pin 16) or a -V
diode threshold
BE
BE
below V- (Pin 8). From an IN input, a clamp to V+ is activated if a tran-
sient pulse causes the input to be increased to a voltage level greater
than one V
pulse, one V
BE
Human Body Model (HBM) Capability is:
above V+. A similar clamp to V- is activated if a negative
less than V-, is applied to an IN input. Standard ESD
BE
HBMSTANDARD
MODE
R
C
ESD (V)
>15kV
>4kV
Features
IEC 61000-4-2
Air
Direct
330Ω 150pF
330Ω 150pF
• ESD Interface Capability for HBM Standards
- MIL STD 3015.7. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15kV
- IEC 61000-4-2, Direct Discharge,
Direct, Dual Pins 330Ω 150pF
MIL-STD-3015.7 Direct, In-circuit 1.5kΩ 100pF
>8kV
Single Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4kV (Level 2)
Two Inputs in Parallel . . . . . . . . . . . . . . . . . . . . . . . . 8kV (Level 4)
- IEC 61000-4-2, Air Discharge. . . . . . . . . . . . . . . . . 15kV (Level 4)
>15kV
Refer to Figure 1 and Table 1 for further detail. Refer to Application Note
AN9304 and AN9612 for additional information.
• High Peak Current Capability
- IEC 61000-4-5 (8/20µs). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±3A
- Single Pulse, 100µs Pulse Width. . . . . . . . . . . . . . . . . . . . . . . ±2A
- Single Pulse, 4µs Pulse Width. . . . . . . . . . . . . . . . . . . . . . . . . ±5A
Ordering Information
• Designed to Provide Over-Voltage Protection
TEMP. RANGE
PKG.
NO.
Min.
Order
- Single-Ended Voltage Range to . . . . . . . . . . . . . . . . . . . . . . +30V
- Differential Voltage Range to. . . . . . . . . . . . . . . . . . . . . . . . . ±15V
o
PART NO.
SP720AP
SP720AB
SP720ABT
( C)
PACKAGE
16 Ld PDIP
-40 to 105
-40 to 105
-40 to 105
E16.3
1500
1970
2500
• Fast Switching . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2ns Risetime
• Low Input Leakages . . . . . . . . . . . . . . . . . . . . . . . . . 1nA at 25oC (Typ)
• Low Input Capacitance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3pF (Typ)
• An Array of 14 SCR/Diode Pairs
16 Ld SOIC
M16.15
M16.15
16 Ld SOIC
Tape and Reel
• Operating Temperature Range . . . . . . . . . . . . . . . . . . . . -40oC to 105oC
Pinout
Applications
• Microprocessor/Logic Input Protection
SP720 (PDIP, SOIC)
TOP VIEW
• Data Bus Protection
• Analog Device Input Protection
• Voltage Clamp
IN
1
2
3
4
5
6
7
8
16 V+
IN
IN
IN
IN
IN
IN
V-
15 IN
14 IN
13 IN
12 IN
11 IN
10 IN
Functional Block Diagram
V+
16
3 - 7
9 - 15
9
IN
IN
2
1
IN
IN
V-
8
228
www. lit t elf us e. c om
TVS Diode Arrays
Electronic Protection Array for ESD and Overvoltage Protection
SP720
Absolute Maximum Ratings
Thermal Information
Continuous Supply Voltage, (V+) - (V-). . . . . . . . . . . . . . . . . . . . . . . . . +35V
Forward Peak Current, I to V , I to GND
(Refer to Figure 6) . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±2A, 100µs
ESD Ratings and Capability (Figure 1, Table 1)
Thermal Resistance (Typical, Note 1). . . . . . . . . . . . . . . . . . . . . θ (oC/W)
JA
PDIP Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .90
SOIC Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 130
Maximum Storage Temperature Range . . . .. . . . . . . . . . . . . . . -65oC to 150oC
Maximum Junction Temperature (Plastic Package) . . . . . . . . . . . . . . . . . . . . . 150oC
Maximum Lead Temperature (Soldering 10s) . . . . . . . . .. . . . . . .. . . . . . . . . .300oC
(SOIC Lead Tips Only)
IN
CC IN
Load Dump and Reverse Battery (Note 2)
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the device
at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. θ is measured with the component mounted on an evaluation PC board in free air.
JA
Electrical Specifications
T
= -40oC to 105oC; V = 0.5V
IN
, Unless Otherwise Specified
CC
A
PARAMETER
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
Operating Voltage Range,
V
-
2 to 30
-
V
SUPPLY
V
= [(V+) - (V-)]
SUPPLY
Forward Voltage Drop:
IN to V-
IN to V+
I
= 1A (Peak Pulse)
IN
V
-
-
2
2
-
-
V
V
FWDL
V
FWDH
Input Leakage Current
Quiescent Supply Current
Equivalent SCR ON Threshold
Equivalent SCR ON Resistance
Input Capacitance
I
-20
5
50
1.1
1
20
nA
nA
V
IN
QUIESCENT
5
I
-
-
-
-
-
200
Note 3
/I ; Note 3
-
-
-
-
V
Ω
FWD FWD
C
3
pF
ns
IN
Input Switching Speed
NOTES:
t
2
ON
2. In automotive and battery operated systems, the power supply lines should be externally protected for load dump and reverse battery. When the
V+ and V- pins are connected to the same supply voltage source as the device or control line under protection, a current limiting resistor should
be connected in series between the external supply and the SP720 supply pins to limit reverse battery current to within the rated maximum
limits. Bypass capacitors of typically 0.01µF or larger from the V+ and V- pins to ground are recommended.
3. Refer to the Figure 3 graph for definitions of equivalent “SCR ON Threshold” and “SCR ON Resistance.” These characteristics are given here
for thumb-rule information to determine peak current and dissipation under EOS conditions.
TABLE 1. ESD TEST CONDITIONS
ESD Capability
ESD capability is dependent on the application and defined test
standard. The evaluation results for various test standards and methods
based on Figure 1 are shown in Table 1.
STANDARD
TYPE/MODE
R
C
±V
D
D
D
MIL STD 3015.7 Modified HBM
Standard HBM
1.5kΩ 100pF 15kV
1.5kΩ 100pF 6kV
For the “Modified” MIL-STD-3015.7 condition that is defined as an
“in-circuit” method of ESD testing, the V+ and V- pins have a return path
to ground and the SP720 ESD capability is typically greater than 15kV
from 100pF through 1.5kΩ. By strict definition of MIL-STD-3015.7 using
“pin-to-pin” device testing, the ESD voltage capability is greater than 6kV.
The MIL-STD-3015.7 results were determined from AT&T ESD Test
Lab measurements.
IEC 61000-4-2
HBM, Air Discharge
330Ω 150pF 15kV
HBM, Direct Discharge 330Ω 150pF 4kV
HBM, Direct Discharge, 330Ω 150pF 8kV
Two Parallel Input Pins
EIAJ IC121
Machine Model
0kΩ 200pF 1kV
R
D
R
1
The HBM capability to the IEC 61000-4-2 standard is greater than 15kV
for air discharge (Level 4) and greater than 4kV for direct discharge
(Level 2). Dual pin capability (2 adjacent pins in parallel) is well in excess
of 8kV (Level 4).
CHARGE
SWITCH
DISCHARGE
SWITCH
C
D
IN
H.V.
SUPPLY
°±V
For ESD testing of the SP720 to EIAJ IC121 Machine Model (MM) standard,
the results are typically better than 1kV from 200pF with no series resistance.
DUT
D
IEC 1000-4-2: R 50 to 100MΩ
1
MIL STD 3015.7:R 1 to 10MΩ
1
FIGURE 1. ELECTROSTATIC DISCHARGETEST
229
www. lit t elf us e. c om
TVS Diode Arrays
Electronic Protection Array for ESD and Overvoltage Protection
SP720
100
80
60
40
20
0
2.5
2
o
o
T
= 25 C
T
= 25 C
A
A
SINGLE PULSE
SINGLE PULSE
1.5
1
I
FWD
EQUIV. SAT. ON
THRESHOLD ~ 1.1V
V
FWD
0.5
0
600
800
1000
1200
0
1
2
3
FORWARD SCRVOLTAGE DROP (mV)
FORWARD SCRVOLTAGE DROP (V)
FIGURE 2. LOW CURRENT SCR FORWARDVOLTAGE DROP
CURVE
FIGURE 3. HIGH CURRENT SCR FORWARDVOLTAGE DROP
CURVE
+V
CC
+V
CC
INPUT
DRIVERS
LINEAR OR
DIGITAL IC
INTERFACE
OR
SIGNAL
SOURCES
TO +V
V+
IN 1-7
IN 9-15
CC
SP720
V-
SP720 INPUT
PROTECTION CIRCUIT
(1 OF 14 ON CHIP)
FIGURE 4. TYPICALAPPLICATION OFTHE SP720 AS AN INPUT CLAMPFOR OVER-VOLTAGE, GREATERTHAN 1V ABOVE V+ OR
BE
LESSTHAN -1V
BELOW V-
BE
230
www. lit t elf us e. c om
TVS Diode Arrays
Electronic Protection Array for ESD and Overvoltage Protection
SP720
The overstress curve is shown in Figure 6 for a 15V supply condition. The
Peak Transient Current Capability of the SP720
dual pins are capable of 10A peak current for a 10µs pulse and 4A peak
current for a 1ms pulse. The complete for single pulse peak current vs.
pulse width time ranging up to 1 second are shown in Figure 6.
The peak transient current capability rises sharply as the width of the
current pulse narrows. Destructive testing was done to fully evaluate the
SP720’s ability to withstand a wide range of transient current pulses. The
circuit used to generate current pulses is shown in Figure 5.
VARIABLETIME DURATION
CURRENT PULSE GENERATOR
+
R
The test circuit of Figure 5 is shown with a positive pulse input. For a
negative pulse input, the (-) current pulse input goes to an SP720 ‘IN’
input pin and the (+) current pulse input goes to the SP720 V- pin. The
V+ to V- supply of the SP720 must be allowed to float. (i.e., It is not tied
to the ground reference of the current pulse generator.) Figure 6 shows
the point of overstress as defined by increased leakage in excess of the
data sheet published limits.
1
V
G
CURRENT
-
SENSE
(-)
(+)
1
2
3
4
5
6
7
8
IN
IN
IN
IN
V+ 16
IN 15
IN 14
IN 13
IN 12
IN 11
IN 10
The maximum peak input current capability is dependent on the V+ to V-
voltage supply level, improving as the supply voltage is reduced. Values
of 0, 5, 15 and 30 voltages are shown. The safe operating range of the
transient peak current should be limited to no more than 75% of the
measured overstress level for any given pulse width as shown in Figure 6.
+
C1
-
SP720
VOLTAGE
PROBE
IN
IN
IN
V-
When adjacent input pins are paralleled, the sustained peak current
capability is increased to nearly twice that of a single pin. For compari-
son, tests were run using dual pin combinations 1+2, 3+4, 5+6, 7+9,
10+11, 12+13 and 14+15.
IN
9
R ~ 10Ω TYPICAL
1
G
V
ADJ. 10V/ATYPICAL
C1 ~ 100µF
5
FIGURE 5. TYPICALSP720 PEAKCURRENTTEST CIRCUIT
WITH AVARIABLEPULSEWIDTH INPUT
10
9
8
7
6
5
4
3
2
1
0
CAUTION: SAFE OPERATING CONDITIONS LIMIT
THE MAXIMUM PEAK CURRENT FOR A GIVEN
PULSEWIDTH TO BE NO GREATER THAN 75%
OF THE VALUES SHOWN ON EACH CURVE.
SINGLE PIN STRESS CURVES
DUAL PIN STRESS CURVE
0V
5V
15V
15V
30V
V+ TO V- SUPPLY
10
0.001
0.01
0.1
1
100
1000
PULSEWIDTH TIME (ms)
FIGURE 6. SP720TYPICALSINGLE PULSE PEAKCURRENT CURVES SHOWINGTHE MEASURED POINT OF OVER-STRESS IN
o
AMPERES vsPULSETIME IN MILLISECONDS (T = 25 C)
A
231
www. lit t elf us e. c om
TVS Diode Arrays
Electronic Protection Array for ESD and Overvoltage Protection
SP720
Dual-In-Line Plastic Packages (PDIP)
E16.3 (JEDEC MS-001 BB ISSUE D)
16 LEAD DUAL-IN-LINE PLASTIC PACKAGE
N
E1
INCHES
MILLIMETERS
INDEX
1
2
3
N/2
AREA
SYMBOL
MIN
MAX
0.210
-
MIN
-
MAX
5.33
-
NOTES
-B-
-C-
A
A1
A2
B
-
4
-A-
0.015
0.115
0.014
0.045
0.008
0.735
0.005
0.300
0.240
0.39
2.93
0.356
1.15
0.204
18.66
0.13
7.62
6.10
4
D
E
BASE
PLANE
0.195
0.022
0.070
0.014
0.775
-
4.95
0.558
1.77
0.355
19.68
-
-
A2
A
-
SEATING
PLANE
L
C
L
B1
C
8, 10
D1
B1
eA
A1
A
-
D1
e
eC
B S
C
D
5
5
6
5
-
B
eB
0.010 (0.25) M
C
D1
E
NOTES:
0.325
0.280
8.25
7.11
1. Controlling Dimensions: INCH. In case of conflict between English and
Metric dimensions, the inch dimensions control.
E1
e
0.100 BSC
0.300 BSC
2.54 BSC
7.62 BSC
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication No. 95.
e
e
6
7
4
9
A
B
-
0.430
0.150
-
10.92
3.81
4. Dimensions A, A1 and L are measured with the package seated in JE-
DEC seating plane gauge GS-3.
L
0.115
2.93
5. D, D1, and E1 dimensions do not include mold flash or protrusions.
Mold flash or protrusions shall not exceed 0.010 inch (0.25mm).
N
16
16
e
6. E and
are measured with the leads constrained to be perpendic-
A
-C-
ular to datum
.
7. e and e are measured at the lead tips with the leads unconstrained.
B
C
e
must be zero or greater.
C
8. B1 maximum dimensions do not include dambar protrusions. Dambar
protrusions shall not exceed 0.010 inch (0.25mm).
9. N is the maximum number of terminal positions.
10. Corner leads (1, N, N/2 and N/2 + 1) for E8.3, E16.3, E18.3, E28.3,
E42.6 will have a B1 dimension of 0.030 - 0.045 inch (0.76 - 1.14mm).
232
www. lit t elf us e. c om
TVS Diode Arrays
Electronic Protection Array for ESD and Overvoltage Protection
SP720
Small Outline Plastic Packages (SOIC)
M16.15 (JEDEC MS-012-AC ISSUE C)
16 LEAD NARROW BODY SMALL OUTLINE PLASTIC PACKAGE
INCHES MILLIMETERS
N
INDEX
AREA
0.25(0.010)
M
B M
H
E
SYMBOL
MIN
MAX
0.0688
0.0098
0.020
MIN
1.35
0.10
0.33
0.19
9.80
3.80
MAX
1.75
0.25
0.51
0.25
10.00
4.00
NOTES
-B-
A
A1
B
C
D
E
e
0.0532
0.0040
0.013
-
-
1
2
3
L
9
-
SEATING PLANE
A
0.0075
0.3859
0.1497
0.0098
0.3937
0.1574
-A-
3
4
-
o
h x 45
D
-C-
0.050 BSC
1.27 BSC
µ
H
h
0.2284
0.0099
0.016
0.2440
0.0196
0.050
5.80
0.25
0.40
6.20
0.50
1.27
-
e
A1
C
5
6
7
-
B
0.10(0.004)
L
0.25(0.010) M
C
A M B S
N
µ
16
16
NOTES:
o
o
o
o
0
8
0
8
1. Symbols are defined in the “MO Series Symbol List” in Section 2.2 of
Publication Number 95.
5
2. Dimensioning and tolerancing per ANSI Y14.5M-1982.
3. Dimension “D” does not include mold flash, protrusions or gate burrs.
Mold flash, protrusion and gate burrs shall not exceed 0.15mm (0.006
inch) per side.
4. Dimension “E” does not include interlead flash or protrusions. Interlead
flash and protrusions shall not exceed 0.25mm (0.010 inch) per side.
5. The chamfer on the body is optional. If it is not present, a visual index
feature must be located within the crosshatched area.
6. “L” is the length of terminal for soldering to a substrate.
7. “N” is the number of terminal positions.
8. Terminal numbers are shown for reference only.
9. The lead width “B”, as measured 0.36mm (0.014 inch) or greater above
the seating plane, shall not exceed a maximum value of 0.61mm
(0.024 inch).
10. Controlling dimension: MILLIMETER. Converted inch dimensions are
not necessarily exact.
233
www. lit t elf us e. c om
相关型号：
©2020 ICPDF网 联系我们和版权申明