LT1056CH [Linear]
Precision, High Speed, JFET Input Operational Amplifiers; 精密，高速， JFET输入运算放大器
| 型号： | LT1056CH |
| 厂家： | 
Linear |
| 描述： | Precision, High Speed, JFET Input Operational Amplifiers |
| 文件： | 总12页 (文件大小：361K) |
| 中文： | 中文翻译 | 下载： | 下载PDF数据表文档文件 |
LT1055/LT1056
Precision, High Speed,
JFET Input Operational Amplifiers
U
FEATURES
DESCRIPTION
■
Guaranteed Offset Voltage
150µV Max
500µV Max
4µV/°C Max
The LT1055/LT1056 JFET input operational amplifiers
combineprecisionspecificationswithhighspeedperfor-
mance.
–55°C to 125°C
■
Guaranteed Drift
■
Guaranteed Bias Current
For the first time, 16V/µs slew rate and 6.5MHz gain-ban-
width product are simultaneously achieved with offset
voltage of typically 50µV, 1.2µV/°C drift, bias currents of
40pA at 70°C and 500pA at 125°C.
70°C
150pA Max
2.5nA Max
12V/µs Min
125°C
Guaranteed Slew Rate
■
The 150µV maximum offset voltage specification is the
U
best available on any JFET input operational amplifier.
APPLICATIONS
The LT1055 and LT1056 are differentiated by their operat-
ingcurrents.ThelowerpowerdissipationLT1055achieves
lower bias and offset currents and offset voltage. The
additional power dissipation of the LT1056 permits higher
slew rate, bandwidth and faster settling time with a slight
sacrifice in DC performance.
■
Precision, High Speed Instrumentation
■
Logarithmic Amplifiers
■
D/A Output Amplifiers
■
Photodiode Amplifiers
■
Voltage-to-Frequency Converters
■
Frequency-to-Voltage Converters
Thevoltage-to-frequencyconvertershownbelowisoneof
the many applications which utilize both the precision and
high speed of the LT1055/LT1056.
■
Fast, Precision Sample-and-Hold
ForaJFETinputopampwith23V/µsguaranteedslewrate,
refer to the LT1022 data sheet.
and LTC are registered trademarks and LT is a trademark of Linear Technology Corporation.
U
TYPICAL APPLICATION
0kHz to 10kHz Voltage-to-Frequency Converter
Distribution of Input Offset Voltage
(H Package)
4.7k
3M
15V
140
V
T
= ±15V
= 25°C
50% TO ±60µV
S
A
0.001 (POLYSTYRENE)
120
100
634 UNITS TESTED
FROM THREE RUNS
10kHZ
TRIM
5k
OUTPUT
15V
2
1Hz TO 10kHz
0.005%
0V TO 10V
INPUT
+
7
80
60
40
20
1.5k
6
LINEARITY
LT1056
0.1µF
22k
3
4
–
–15V
33pF
LM329
3.3M
0.1µF
2N3906
= 1N4148
0
*1% FILM
–200
0
200
400
–400
THE LOW OFFSET VOLTAGE OF LT1056
CONTRIBUTES ONLY 0.1Hz OF ERROR
WHILE ITS HIGH SLEW RATE PERMITS
10kHz OPERATION.
–15V
INPUT OFFSET VOLTAGE (µV)
LT1055/56 TA02
LT1055/56 TA01
1
LT1055/LT1056
W W
U W
U
W U
ABSOLUTE MAXIMUM RATINGS
PACKAGE/ORDER INFORMATION
TOP VIEW
Supply Voltage ...................................................... ±20V
Differential Input Voltage ....................................... ±40V
Input Voltage ......................................................... ±20V
Output Short-Circuit Duration.......................... Indefinite
Operating Temperature Range
ORDER PART
NC
8
+
V
6
NUMBER
BALANCE
1
7
2
–IN
OUT
LT1055ACH
LT1055CH
LT1055AMH LT1056AMH
LT1055MH LT1056MH
LT1056ACH
LT1056CH
5
3
BALANCE
+IN
4
V
–
LT1055AM/LT1055M/LT1056AM/
LT1056M.........................................–55°C to 125°C
LT1055AC/LT1055C/LT1056AC/
H PACKAGE
8-LEAD TO-5 METAL CAN
TJMAX = 150°C, θJA = 150°C/ W, θJC = 45°C/ W
TOP VIEW
LT1056C................................................ 0°C to 70°C
Storage Temperature Range
All Devices ...................................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
BAL
–IN
+IN
1
2
3
4
N/C
8
7
6
5
+
LT1055CN8
LT1056CN8
V
OUT
BAL
–
V
N8 PACKAGE
8-LEAD PLASTIC DIP
TJMAX = 100°C, θJA = 130°C/ W
Consult factory for Industrial grade parts.
VS = ±15V, TA = 25°C, VCM = 0V unless otherwise noted.
ELECTRICAL CHARACTERISTICS
LT1055M/LT1056M
LT1055CH/LT1056CH
LT1055AM/LT1056AM
LT1055AC/LT1056AC
LT1055CN8/LT1056CN8
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
MIN
TYP
MAX
UNITS
V
OS
Input Offset Voltage (Note1)
LT1055 H Package
LT1056 H Package
LT1055 N8 Package
LT1056 N8 Package
—
—
—
—
50
50
—
—
150
180
—
—
—
—
—
70
70
120
140
400
450
700
800
µV
µV
µV
µV
—
I
I
Input Offset Current
Input Bias Current
Fully Warmed Up
Fully Warmed Up
—
—
—
—
—
—
—
—
—
2
±10
30
10
±50
130
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
±10
30
20
±50
150
—
—
—
—
—
—
pA
pA
pA
Ω
Ω
Ω
OS
B
V
= 10V
CM
12
12
11
12
12
11
Input Resistance:Differential
10
10
Common Mode
V
V
= – 11V to 8V
= 8V to 11V
10
10
CM
CM
10
10
Input Capacitance
Input Noise Voltage
4
4
pF
e
0.1Hz to 10Hz LT1055
LT1056
1.8
2.5
2.0
2.8
µV
µV
n
P-P
P-P
Input Noise Voltage Density
f = 10Hz (Note 2)
0
—
—
28
14
50
20
—
—
30
15
60
22
nV/ Hz
√
nV/ Hz
√
0
f = 1kHz (Note 3)
I
A
Input Noise Current Density
Large-Signal Voltage Gain
f = 10Hz, 1kHz (Note 4)
—
150
130
1.8
400
300
4
—
—
—
120
100
1.8
400
300
4
—
—
fA/ Hz
V/mV
V/mV
√
n
0
V = ±10V
R = 2k
VOL
0
L
R = 1k
L
Input Voltage Range
±11
86
90
±12
10
12
±12
100
106
±13.2
13
16
—
—
—
—
—
—
±11
83
88
±12
7.5
9.0
±12
98
104
±13.2
12
14
—
—
—
—
—
—
V
dB
dB
V
V/µs
V/µs
CMRR
PSRR
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing
Slew Rate
V
= ±11V
CM
V = ±10V to ±18V
R = 2k
S
V
OUT
L
SR
LT1055
LT1056
GBW
Gain-Bandwidth Product
Supply Current
f = 1MHz
LT1055
LT1056
LT1055
LT1056
—
—
—
—
5.0
6.5
2.8
5.0
—
—
4.0
6.5
—
—
—
—
4.5
5.5
2.8
5.0
—
—
4.0
7.0
MHz
MHz
mA
mA
I
S
Offset Voltage Adjustment Range
R
= 100k
—
±5
—
—
±5
—
mV
POT
2
LT1055/LT1056
ELECTRICAL CHARACTERISTICS
VS = ±15V, VCM = 0V, 0°C ≤ TA ≤ 70°C unless otherwise noted.
LT1055AC
LT1056AC
TYP
LT1055CH/LT1056CH
LT1055CN8/LT1056CN8
SYMBOL PARAMETER
CONDITIONS
MIN
MAX
MIN
TYP
MAX
UNITS
V
OS
Input Offset Voltage (Note1)
LT1055 H Package
LT1056 H Package
LT1055 N8 Package
LT1056 N8 Package
●
●
●
●
—
—
—
—
100
100
—
330
360
—
—
—
—
—
140
140
250
280
750
800
1250
1350
µV
µV
µV
µV
—
—
Average Temperature
Coefficient of Input Offset
Voltage
H Package (Note 5)
N8 Package (Note 5)
●
●
—
—
1.2
—
4.0
—
—
—
1.6
3.0
8.0
12.0
µV/°C
µV/°C
I
I
Input Offset Current
Warmed Up
LT1055
LT1056
LT1055
LT1056
●
●
—
—
—
—
10
14
±30
±40
50
70
±150
±80
—
—
—
—
16
18
±40
±50
80
100
±200
±240
pA
pA
pA
pA
OS
T = 70°C
A
Input Bias Current
Warmed Up
T = 70°C
A
●
●
B
A
Large-Signal Voltage Gain
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing
V = ±10V, R = 2k
●
●
●
●
80
85
89
250
100
105
—
—
—
—
60
82
87
250
98
103
—
—
—
—
V/mV
dB
dB
VOL
O
L
CMRR
PSRR
V
= ±10.5V
Cm
V = ±10V to ±18V
S
V
OUT
R = 2k
L
±12
±13.1
±12
±13.1
V
VS = ±15V, VCM = 0V, –55°C ≤ TA ≤ 125°C unless otherwise noted.
LT1055AM
LT1056AM
TYP
LT1055M
LT1056M
TYP
SYMBOL PARAMETER
CONDITIONS
MIN
MAX
MIN
MAX
UNITS
V
OS
Input Offset Voltage (Note1)
LT1055
LT1056
●
●
—
—
180
180
500
550
—
—
250
250
1200
1250
µV
µV
Average Temperature
Coefficient of Input Offset
Voltage
(Note 5)
●
—
1.3
4.0
—
1.8
8.0
µV/°C
I
I
Input Offset Current
Warmed Up
LT1055
LT1056
LT1055
LT1056
●
●
—
—
—
—
0.20
0.25
±0.4
±0.5
1.2
1.5
±2.5
±3.0
—
—
—
—
0.25
0.30
±0.5
±0.6
1.8
2.4
±4.0
±5.0
nA
nA
nA
nA
OS
T = 125°C
A
Input Bias Current
Warmed Up
T = 125°C
A
●
●
B
A
Large-Signal Voltage Gain
Common-Mode Rejection Ratio
Power Supply Rejection Ratio
Output Voltage Swing
V = ±10V, R = 2k
●
●
●
●
40
85
88
120
100
104
—
—
—
—
35
82
86
120
98
102
—
—
—
—
V/mV
dB
dB
VOL
O
L
CMRR
PSRR
V
= ±10.5V
CM
V = ±10V to ±17V
S
V
OUT
R = 2k
L
±12
±12.9
±12
±12.9
V
Note 3: This parameter is tested on a sample basis only.
Note 4: Current noise is calculated from the formula: i = (2ql ) , where
The
● denotes specifications which apply over the full operating
1/2
temperature range.
For MIL-STD components, please refer to LTC883 data sheet for test
listing and parameters.
n
B
–19
q = 1.6 × 10
coulomb. The noise of source resistors up to 1GΩ
swamps the contribution of current noise.
Note 5: Offset voltage drift with temperature is practically unchanged when
the offset voltage is trimmed to zero with a 100k potentiometer between
the balance terminals and the wiper tied to V . Devices tested to tighter
Note 1: Offset voltage is measured under two different conditions:
(a) approximately 0.5 seconds after application of power; (b) at T = 25°C
A
+
only, with the chip heated to approximately 38°C for the LT1055 and to
45°C for the LT1056, to account for chip temperature rise when the device
is fully warmed up.
drift specifications are available on request.
Note 2: 10Hz noise voltage density is sample tested on every lot of A
grades. Devices 100% tested at 10Hz are available on request.
3
LT1055/LT1056
TYPICAL PERFORMANCE CHARACTERISTICS
W
U
Input Bias and Offset Currents
vs Temperature
Distribution of Input Offset
Voltage (N8 Package)
Input Bias Current Over the
Common-Mode Range
1200
800
120
80
1000
300
100
30
160
140
120
100
80
V
T
= ±15V
= 25°C
V
V
= ±15V
= 0V
S
A
50% YIELD
TO ±140µV
S
CM
V = ±15V
S
WARMED UP
550 UNITS
TESTED FROM
TWO RUNS
(LT1056)
WARMED UP
T
= 125°C
T
A
BIAS OR OFFSET CURRENTS
MAY BE POSITIVE OR NEGATIVE
T
= 70°C
A
400
40
A
A
= 25°C
A
BIAS CURRENT
0
0
60
–400
–800
–1200
–40
–80
–120
T
= 70°C
A
T
= 125°C
40
A
10
B
B
OFFSET CURRENT
20
A = POSITIVE INPUT CURRENT
B = NEGATIVE INPUT CURRENT
0
3
0
200
400 600 800
–15
–5
0
5
10
15
–800 –600 –400 –200
0
25
50
75
100
125
–10
COMMON-MODE INPUT VOLTAGE (V)
AMBIENT TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (µV)
LT1055/56 G01
LT1055/56 G03
LT1055/56 G02
Distribution of Offset Voltage Drift
with Temperature (H Package)*
Long Term Drift of
Representative Units
Warm-Up Drift
100
80
60
40
20
0
50
40
140
120
50% TO
V
= ±15V
V
T
= ±15V
= 25°C
V
T
= ±15V
= 25°C
S
S
A
S
A
±1.5µV/°C
634 UNITS TESTED
FROM THREE RUNS
30
20
100
10
80
60
40
20
LT1056CN8
0
–10
–20
LT1055CN8
LT1056 H PACKAGE
LT1055 H PACKAGE
–30
–40
–50
0
0
1
2
3
4
5
1
2
3
4
5
–10
–4
2
4
6
8
10
0
–8 –6
–2
0
TIME AFTER POWER ON (MINUTES)
OFFSET VOLTAGE DRIFT WITH TEMPERATURE (µV/°C)
TIME (MONTHS)
LT1055/56 G05
LT1055/56 GO6
*DISTRIBUTION IN THE PLASTIC (N8) PACKAGE
IS SIGNIFICANTLY WIDER.
LT1055/56 G04
0.1Hz to 10Hz Noise
Noise vs Chip Temperature
Voltage Noise vs Frequency
10
7
100
1000
300
100
30
V
= ±15V
= 25°C
S
A
T
70
50
LT1056
PEAK-TO-PEAK
NOISE
5
3
2
30
20
LT1056
f
= 10kHz
0
1/f CORNER = 28HZ
LT1055
f
= 1kHz
60
0
LT1055
1/f CORNER
= 20HZ
1
10
80
10
3
10
100
1
300 1000
0
2
4
6
8
10
30
10
20
30
40
50
70
CHIP TEMPERATURE (°C)
FREQUENCY (Hz)
TIME (SECONDS)
LT1055/56 G09
LT1055/56 GO7
LT1055/56 G08
4
LT1055/LT1056
W
U
TYPICAL PERFORMANCE CHARACTERISTICS
LT1056 Large-Signal Response
Small-Signal Response
LT1055 Large-Signal Response
AV = 1, CL = 100pF, 0.5µs/DIV
AV = 1, CL = 100pF, 0.5µs/DIV
LT1055/56 G10
LT1055/56 G12
AV = 1, CL = 100pF, 0.2µs/DIV
LT1055/56 G11
Undistorted Output Swing vs
Frequency
Slew Rate, Gain-Bandwidth vs
Temperature
Output Impedence vs Frequency
10
8
100
10
1
30
20
30
24
V
= ±15V
= 25°C
S
A
V
= ±15V
= 25°C
A
V
= 100
S
A
T
T
LT1056 GBW
LT1055 GBW
LT1055
LT1056
= 10
6
18
12
6
A
V
4
2
LT1055
LT1056
LT1055
LT1056
LT1056 SLEW
LT1055 SLEW
10
0
LT1055
LT1056
= 1
A
V
V
0
= ±15V
S
f
= 1MHz FOR GBW
0.1
0
125
1
10
100
1000
–25
25
75
0.1
1
10
FREQUENCY (kHz)
FREQUENCY (MHz)
TEMPERATURE (˚C)
LT1055/56 G15
LT1055/56 G13
LT1055/56 G14
Gain vs Frequency
Gain, Phase Shift vs Frequency
Voltage Gain vs Temperature
100
120
140
160
1000
140
120
100
80
V
T
= ±15V
= 25°C
V
V
= ±15V
= ±10V
S
A
S
O
20
10
R
= 2k
L
PHASE
300
100
LT1056
LT1055
R = 1k
L
60
GAIN
LT1056
LT1055
LT1056
40
LT1055
0
20
30
10
V
= ±15V
= 25°C
0
S
A
T
–10
–20
4
6
10k 100k
1
2
8
10
1
10 100 1k
1M 10M 100M
–75
–25
25
125
75
TEMPERATURE (°C)
FREQUENCY (MHz)
FREQUENCY (Hz)
LT1055/56 G17
LT1055/56 G16
LT1055/56 G18
5
LT1055/LT1056
TYPICAL PERFORMANCE CHARACTERISTICS
W
U
Common-Mode Range vs
Temperature
LT1055 Settling Time
LT1056 Settling Time
10
5
10
5
15
14
2mV
10mV
10mV
2mV
0.5mV
0.5mV
13
12
11
5mV
1mV
5mV
5mV
1mV
V
= ±15V
S
A
0
0
±10
–11
–12
–13
–14
–15
≈
≈
T
= 25°C
5mV 2mV
–5
–10
–5
–10
10mV
10mV
0.5mV
0.5mV
1mV
2mV 1mV
V
= ±15V
= 25°C
S
A
T
V
= ±15V
S
1
2
0
3
1
2
0
3
–50
0
50
100
SETTLING TIME (µS)
SETTLING TIME (µS)
TEMPERATURE (°C)
LT1055/56 G19
LT1055/56 G20
LT1055/56 G21
Common-Mode and Power Supply
Rejections vs Temperature
Common-Mode Rejection Ratio
vs Frequency
Power Supply Rejection Ratio vs
Frequency
120
110
120
100
80
60
40
20
0
140
120
100
80
V
V
= ±10V TO ±17V FOR PSRR
V
T
= ±15V
T
= 25°C
S
S
S
A
A
= ±15V, V = ±10.5V FOR CMRR
= 25°C
CM
POSITIVE
SUPPLY
PSRR
CMRR
NEGATIVE
SUPPLY
60
100
90
40
20
0
125
10
1k
10k 100k
1M
10M
–25
25
75
100
100k
FREQUENCY (Hz)
10M
10
100
1k
10k
1M
FREQUENCY (Hz)
TEMPERATURE (˚C)
LT1055/56 G22
LT1055/56 G23
LT1055/56 G24
Supply Current vs Supply Voltage
Output Swing vs Load Resistance
Short-Circuit Current vs Time
8
6
4
2
0
15
12
9
50
40
T
T
T
= –55°C
= 25°C
A
T
A
= –55°C
A
30
= 125°C
T
= –25°C
A
A
T
= –55°C
6
20
A
LT1056
LT1055
3
10
T
= –125°C
A
25°C
25°C
T
T
= 125°C
= –55°C
A
V = ±15V
S
0
0
V = ±15V
S
SINKING
–3
–6
–9
–12
–15
A
–10
–20
–30
–40
–50
T
= –25°C
T
A
T
= 125°C
= 25°C
A
T
= 125°C
A
T
A
= –125°C
A
T
A
= –55°C
0.3
T
= –55°C
2
A
±10
±15
0
±20
0.1
1
3
10
±5
0
1
3
LOAD RESISTANCE (kΩ)
SUPPLY VOLTAGE (V)
TIME FROM OUTPUT SHORT TO GROUND
(MINUTES)
LT1055/56 G26
LT1055/56 G25
LT1055/56 G27
6
LT1055/LT1056
U
W U U
APPLICATIONS INFORMATION
TheLT1055/LT1056maybeinserteddirectlyintoLF155A/
LT355A, LF156A/LT356A, OP-15 and OP-16 sockets. Off-
set nulling will be compatible with these devices with the
wiper of the potentiometer tied to the positive supply.
N/C
8
OFFSET
TRIM
+
V
OUTPUT
7
1
Offset Nulling
6
+
V
2
5
OFFSET
TRIM
1
R
P
4
3
2
3
5
7
–
6
LT1055
LT1056
OUT
–
V
+
4
GUARD
–
V
LT1055/56 AI2
LT1055/56 AI1
Noappreciablechangeinoffsetvoltagedriftwithtempera-
ture will occur when the device is nulled with a potentiom-
eter, RP, ranging from 10k to 200k.
The LT1055/LT1056 has the lowest offset voltage of any
JFET input op amp available today. However, the offset
voltage and its drift with time and temperature are still not
as good as on the best bipolar amplifiers because the
transconductance of FETs is considerably lower than that
of bipolar transistors. Conversely, this lower transcon-
ductance is the main cause of the significantly faster
speed performance of FET input op amps.
The LT1055/LT1056 can also be used in LF351, LF411,
AD547, AD611, OPA-111, and TL081 sockets, provided
thatthenullingcicuitryisremoved.BecauseoftheLT1055/
LT1056’s low offset voltage, nulling will not be necessary
in most applications.
Offset voltage also changes somewhat with temperature
cycling. The AM grades show a typical 20µV hysteresis
(30µV on the M grades) when cycled over the –55°C to
125°C temperature range. Temperature cycling from 0°C
to 70°C has a negligible (less than 10µV) hysteresis
effect.
Achieving Picoampere/Microvolt Performance
In order to realize the picoampere-microvolt level accu-
racy of the LT1055/LT1056 proper care must be exer-
cised. For example, leakage currents in circuitry external
totheopampcansignificantlydegradeperformance.High
quality insulation should be used (e.g. Teflon™, Kel-F);
cleaning of all insulating surfaces to remove fluxes and
other residues will probably be required. Surface coating
may be necessary to provide a moisture barrier in high
humidity environments.
The offset voltage and drift performance are also affected
by packaging. In the plastic N8 package the molding
compound is in direct contact with the chip, exerting
pressure on the surface. While NPN input transistors are
largely unaffected by this pressure, JFET device matching
and drift are degraded. Consequently, for best DC perfor-
mance, as shown in the typical performance distribution
plots, the TO-5 H package is recommended.
Board leakage can be minimized by encircling the input
circuitry with a guard ring operated at a potential close to
that of the inputs: in inverting configurations the guard
ringshouldbetiedtoground,innoninvertingconnnections
to the inverting input at pin 2. Guarding both sides of the
printed circuit board is required. Bulk leakage reduction
depends on the guard ring width.
Noise Performance
The current noise of the LT1055/LT1056 is practically
immeasurable at 1.8fA/√Hz. At 25°C it is negligible up to
1G of source resistance, RS (compound to the noise of
RS). Even at 125°C it is negligible to 100M of RS.
Teflon is a trademark of Dupont.
7
LT1055/LT1056
U
W U U
APPLICATIONS INFORMATION
The voltage noise spectrum is characterized by a low 1/f
corner in the 20Hz to 30Hz range, significantly lower than
on other competitive JFET input op amps. Of particular
interest is the fact that with any JFET IC amplifier, the
frequency location of the 1/f corner is proportional to the
square root of the internal gate leakage currents and,
therefore, noise doubles every 20°C. Furthermore, as
illustrated in the noise versus chip temperature curves,
the 0.1Hz to 10Hz peak-to-peak noise is a strong function
of temperature, while wideband noise (f0 = 1kHz) is
practically unaffected by temperature.
capacitance is isolated from the “false summing” node,
and (2) it does not require a “flat top” input pulse since the
input pulse is merely used to steer current through the
diode bridges. For more details, please see Application
Note 10.
As with most high speed amplifiers, care should be
taken with supply decoupling, lead dress and component
placement.
When the feedback around the op amp is resistive (RF), a
pole will be created with RF, the source resistance and
capacitance (RS, CS), and the amplifier input capacitance
(CIN ≈ 4pF). In low closed-loop gain configurations and
with RS and RF in the kilohm range, this pole can create
excess phase shift and even oscillation. A small capacitor
(CF) in parallel with RF eliminates this problem. With RS
(CS + CIN) = RFCF, the effect of the feedback pole is
Consequently, for optimum low frequency noise, chip
temperatureshouldbeminimized. Forexample, operating
an LT1056 at ±5V supplies or with a 20°C/W case-to-
ambient heat sink reduces 0.1Hz to 10Hz noise from
typically 2.5µVP-P (±15V, free-air) to 1.5µVP-P. Similiarly,
the noise of an LT1055 will be 1.8µVP-P typically because
of its lower power dissipation and chip temperature.
C
F
completely removed.
R
F
High Speed Operation
Settling time is measured in the test circuit shown. This
test configuration has two features which eliminate prob-
lems common to settling time measurments: (1) probe
–
+
C
IN
OUTPUT
R
C
S
S
LT1055/56 AI03
Settling Time Test Circuit
10pF (TYPICAL)
15V
15k
+
10µF
10k
0.01 DISC
SOLID
TANTALUM
–
LT1055
LT1056
–15V
AUT OUTPUT
15V
15k
4.7k
+
10µF
SOLID
TANTALUM
AMPLIFIER
UNDER
TEST
0.01 DISC
10k
+
2N3866
2k
50Ω
15V
2N160
1/2
U440
PULSE GEN
INPUT
(5V MIN STEP)
15V
2W
15k
3Ω
HP5082-8210
HEWLETT
PACKARD
10µF
–15V
15V
+
50Ω
OUTPUT
TO SCOPE
0.01 DISC
SOLID
+
2k
TANTALUM
3Ω
1/2
U440
2N3866
–15V
100Ω
2N5160
15k
10µF
DC ZERO
4.7k
0.01 DISC
+
SOLID TANTALUM
= 1N4148
–15V
LT1055/56 AI04
–15V
8
LT1055/LT1056
U
W U U
APPLICATIONS INFORMATION
Phase Reversal Protection
Voltage Follower with Input Exceeding the Negative
Common-Mode Range
Most industry standard JFET input op amps (e.g., LF155/
LF156, LF351, LF411, OP15/16) exhibit phase reversal at
the output when the negitive common-mode limit at the
input is exceeded (i.e., from –12V to –15V with ±15V
supplies). This can cause lock-up in servo systems. As
shown below, the LT1055/LT1056 does not have this
problem due to unique phase reversal protection circuitry
(Q1 on simplified schematic).
15V
7
2
3
–
6
LT1055/56
OUTPUT
2k
INPUT
±15V
SINE WAVE
+
4
–15V
LT1055/56 AI05
Output
LT1055/LT1056
Output
Input
(LF155/LF56, LF441, OP-15/OP-16)
0.5ms/DIV
0.5ms/DIV
0.5ms/DIV
LT1055/56 AI06
LT1055/56 AI07
LT1055/56 AI08
U
TYPICAL APPLICATIONS †
Exponential Voltage-to-Frequency Converter for Music Synthesizers
INPUT
0V TO 10V
EXPONENT
11.3k*
TRIM
500pF
2N3906
2500Ω*
POLYSTYRENE
15V
5
2N3904
2
6
4
7
–
500Ω*
6
LT1055
3.57k*
ZERO TRIM
500k
3
+
SAWTOOTH
OUTPUT
–15V
1.1k
4.7k
1k*
562Ω*
15V
LM329
4.7k
15V
10k*
10k*
1k*
15V
7
2
–
+
9
3k
6
8
LM301A
13
14
8
3
7
1N148
1
1
4
2
33Ω
3
15
0.01µF
2.2k
SCALE FACTOR
†For ten additional applications utilizing the
LT1055 and LT1056, please see the LTC1043
data sheet and Application Note 3.
–15V
TEMPERATURE CONTROL LOOP
1V IN OCTAVE OUT
*1% METAL FILM RESISTOR
PIN NUMBERED TRANSISTORS = CA3096 ARRAY
LT1055/56 TA03
9
LT1055/LT1056
U
TYPICAL APPLICATIONS
12-Bit Charge Balance A/D Converter
Fast “No Trims” 12-Bit Multiplying CMOS DAC Amplifier
74C00
R
FEEDBACK
REFERENCE
IN
I
OUT1
TYPICAL 12-BIT
CMOS DAC
0.003µF
28k
14k
–
0.01
CLK OUTPUT (B)
OUTPUT
LT1055
I
OUT2
+
15V
7
10k
2
3
OUTPUT
(A)
–
+
CLK
74C74
1N4148
Q
Q
6
LT1055
D
LT1055/56 TA05
P
CL
4
10k
–15V
2N3904
1N4148
1N4148
LM329
249k*
15V
0V TO 10V INPUT
33k
10k
Fast, 16-Bit Current Comparator
15V
COUPLE
THERMALLY
15V
7
2
3
–
DELAY = 250ns
HP5082-2810
CIRCUIT OUTPUT
6
LT1001
f
f
(A)
(B)
* = 1% FILM RESISTOR
15V
OUT
RATIO
CLK
4
+
33k
–15V
15V
7
50k*
100k*
4.7k
2
3
15V
–
1N4148
3k
2
6
LT1055/56 TA04
8
LT1056
+
–
INPUT
7
4
OUTPUT
+
LT1011
4
LT1009
2.5V
3
1
–15V
–15V
LT1055/56 TA06
Temperature-to-Frequency Converter
560Ω
1k*
1k*
15V
15V
2N2222
10k
2N2907
TTL OUTPUT
0kHz TO 1kHz =
0°C TO 100°C
6.2k*
0.01µF
LM329
510pF
POLYSTYRENE
2.7k
2N2222
4.7k
2k
100°C
ADJ
500Ω
0°C ADJ
15V
10k
2
3
7
–
6
LT1055
6.2k*
820 *
+
4
–15V
LM134
510Ω
2V
137Ω*
*1% FILM RESISTOR
LT1055/56 TA07
10
LT1055/LT1056
U
TYPICAL APPLICATIONS
100kHz Voltage Controlled Oscillator
15V
7
2
3
*1% FILM RESISTOR
=1N4148
–
6
X1
X2
U1
+V
CC
W
+15V
SINE OUT
2V
RMS
LT1056
FREQUENCY LINEARITY = 0.1%
FREQUENCY STABILITY = 150ppm/°C
SETTLING TIME = 1.7µs
+
4
22.1k
4.5k
U2 AD639 Z1
0kHs TO 100kHs
–15V
DISTORTION = 0.25% AT 100kHz,
1k
COM
Z2
0.07% AT 10zHz
68k
VR
Y1
Y2
GT
UP
–V
15V
50k
10Hz
DISTORTION
TRIM
FINE
DISTORTION
TRIMS
100kHz
DISTORTION
TRIM
10k
–15
2k
5k
9.09k*
68k
POLYSTYRENE
500pF
22M
–15V
FREQUENCY
TRIM
15pF
–15V
15V
10k*
2
3
0V TO 10V
INPUT
15V
7
4
–
15V
7
10k
5k*
2N4391
2N4391
6
2
3
10k*
2
LT1056
–
22k
6
1k
8
LT1056
+
+
–
2.5k*
1k
7
HP5082-
2810
LT1011
4
+
4
–15V
3
2N4391
1
–15V
20pF
0.01µF
LM329
–15V
10k
4.7k
4.7k
15V
–15V
LT1055/56 TA08
12-Bit Voltage Output D/A Converter
±120V Output Precision Op Amp
125V
12-BIT CURRENT OUTPUT D/A
CONVERTER (e.g., 6012,565
OR DAC-80)
1µF
±25mA OUTPUT
HEAT SINK OUTPUT
TRANSISTORS
330Ω
510Ω
10k
C
2
F
2N5415
1N965
15V
7
–
+
100pF
10k
2N3440
6
0 TO 2
OR 4mA
LT1056
50k
50k
1k
1k
1M
OUTPUT
0V TO 10V
3
2N2222
4
2
C
F
= 15pF TO 33pF
27Ω
27Ω
1N4148
7
4
–
–15V
SETTLING TIME TO 2mV
(0.8 LSB) = 1.5µs TO 2µs
6
LT1055/56 TA09
OUTPUT
LT1055
10k
3
INPUT
+
1N4148
2N2907
1M
2N5415
2N3440
1N965
10k
510Ω
330Ω
1µF
33pF
100k
–125V
LT1055/56 TA10
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LT1055/LT1056
W
W
SI PLIFIED SCHEMATIC
NULL
5
+
7
V
Q8
7k
7k
Q7
NULL
1
J5 J6
J7
7.5pF
2
3
–INPUT
300Ω
Q9
+INPUT
J1
J2
Q15
Q12
Q10
20Ω
Q11
6
OUTPUT
J3
J4
J8
Q13
Q14
Q2
Q1
Q5
3k
8k
Q3
200Ω
Q16
120µA*
(160)
120µA*
(160)
800µA*
(1000)
400µA*
(1100)
9pF
14k
14k
50Ω
Q4
–
4
V
*CURRENTS AS SHOWN FOR LT1055. (X) = CURRENTS FOR LT1056.
LT1055/56 SCHM
U
PACKAGE DESCRIPTION Dimension in inches (millimeters) unless otherwise noted.
N8 Package
8-Lead Plastic
H Package Metal Can
0.335 – 0.370
(8.509 – 9.398)
DIA
0.400*
(10.160)
MAX
0.305 – 0.335
(7.747 – 8.509)
8
7
6
5
4
0.040
(1.016)
MAX
0.050
(1.270)
MAX
0.165 – 0.185
(4.191 – 4.699)
0.250 ± 0.010*
(6.350 ± 0.254)
REFERENCE
PLANE
SEATING
PLANE
GAUGE
PLANE
0.500 – 0.750
(12.700 – 19.050)
0.010 – 0.045
(0.254 – 1.143)
1
2
3
0.016 – 0.021
(0.406 – 0.533)
0.130 ± 0.005
0.300 – 0.320
0.045 – 0.065
(3.302 ± 0.127)
(1.143 – 1.651)
(7.620 – 8.128)
0.027 – 0.045
(0.686 – 1.143)
45°TYP
0.027 – 0.034
0.065
(1.651)
TYP
(0.686 – 0.864)
0.009 – 0.015
(0.229 – 0.381)
0.200 – 0.230
0.125
(3.175)
MIN
(5.080 – 5.842)
0.020
(0.508)
MIN
BSC
+0.025
–0.015
0.045 ± 0.015
(1.143 ± 0.381)
0.325
+0.635
8.255
0.110 – 0.160
(
)
–0.381
0.100 ± 0.010
(2.540 ± 0.254)
0.018 ± 0.003
(0.457 ± 0.076)
(2.794 – 4.064)
INSULATING
STANDOFF
N8 0594
*THESE DIMENSIONS DO NOT INCLUDE MOLD FLASH OR PROTRUSIONS.
MOLD FLASH OR PROTURSIONS SHALL NOT EXCEED 0.010 INCH (0.254mm).
NOTE: LEAD DIAMETER IS UNCONTROLLED BETWEEN
THE REFERENCE PLANE AND SEATING PLANE.
H8(5) 0592
LT/GP 0894 2K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1994
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7487
12
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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