LT1319CS [Linear]
Multiple Modulation Standard Infrared Receiver; 多种调制标准的红外接收器![LT1319CS](http://pdffile.icpdf.com/pdf1/p00082/img/icpdf/LT1319_433898_icpdf.jpg)
型号: | LT1319CS |
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描述: | Multiple Modulation Standard Infrared Receiver |
文件: | 总12页 (文件大小:283K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1319
Multiple Modulation Standard
Infrared Receiver
U
DESCRIPTIO
EATURE
S
F
The LT®1319 is a general purpose building block that
contains all the circuitry necessary to transform modu-
lated photodiode signals back to digital signals. The
circuit’sflexibilitypermitsittoreceivemultiplemodulation
methods. A low noise, high frequency preamplifier per-
forms a current-to-voltage conversion while rejecting low
frequency ambient interference with an AC coupling loop.
Two separate high impedance filter buffer inputs are
provided so that off-chip filtering can be tailored for
specificmodulationschemes.Thefilterbuffersdrivesepa-
rate differential gain stages that end in comparators with
internalhysteresis. Thecomparatorthresholdsareadjust-
able externally by the current into Pin 11. One channel has
ahighspeed25nscomparatorrequiredforhighdatarates.
The second channel’s comparator has a 60ns response
time and is well suited to more modest data rates. A power
savingshutdownfeatureisusefulinportableapplications.
■
■
■
■
■
■
■
■
■
■
Receives Multiple IR Modulation Methods
Low Noise, High Speed Preamp: 2pA/√Hz, 7MHz
Low Frequency Ambient Rejection Loops
Dual Gain Channels: 8MHz, 400V/V
25ns and 60ns Comparators
16-Lead SO Package
5V Single Supply Operation
Supply Current: 14mA
Shutdown Supply Current: 500µA
External Comparator Threshold Setting
W
U
U
ODULATIO STA DARDS
■
IRDA: SIR, FIR
Sharp/Newton
TV Remote
■
■
■
High Data Rate Modulation Methods
For IRDA 4PPM contact the LTC Marketing Department.
, LTC and LT are registered trademarks of Linear Technology Corporation.
U
TYPICAL APPLICATION
IRDA and Sharp/Newton Data Receiver
SHUTDOWN INPUT
IRDA DATA
SHARP/NEWTON DATA
V
CC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
AN_GND
BYPASS
IN
LT1319
V
CC
FILT1
PREOUT
C
B3
10µF
SHDN
DATAL
C
C
R
B1
0.1µF
B2
T1
10µF
30k
V
DIG_GND
BIAS
L
F1
R
R
F1
1k
F2
FILTINL
FILT2L
FILTIN
V
TH
D1*
100µH
2k
C
T1
1µF
DATA
FILT2
C
C
C
B4
1µF
C
C
F5
1µF
C
F3
F2
F4
F1
100pF
1nF
2.2nF
10nF
*BPW34FA OR BPV22NF
DGND
AGND
LT1319 • TA01
1
LT1319
W W W
U
/O
ABSOLUTE AXI U RATI GS
PACKAGE RDER I FOR ATIO
Total Supply Voltage (VCC to GND) ........................... 6V
Differential Voltage (Any Two Pins) .......................... 6V
Maximum Junction Temperature ......................... 150°C
Operating Temperature Range .................... 0°C to 70°C
Specified Temperature Range..................... 0°C to 70°C
Storage Temperature Range ................ –65°C to 150°C
Lead Temperature (Soldering, 10 sec)................. 300°C
TOP VIEW
ORDER PART
AN_GND
IN
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BYPASS
NUMBER
V
CC
FILT1
SHDN
LT1319CS
PREOUT
DATAL
DIG_GND
V
BIAS
FILTINL
FILT2L
FILTIN
V
TH
DATA
FILT2
S PACKAGE
16-LEAD PLASTIC SO
TJMAX = 150°C, θJA = 100°C/W
Consult factory for Industrial or Military grade parts.
ELECTRICAL CHARACTERISTICS
TA = 25°C, V15 = 5V, V1 = V12 = 0V, V6 = V8 = V14 = 2V, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
OS
Preamp Input Offset Voltage
Preamp Output Offset Voltage
Preamp Loop Offset Voltage
High Gain Loop Offset Voltage
Low Gain Loop Offset Voltage
V (Pin 2) – V (Pin 5)
V (Pin 4) – V (Pin 5)
V (Pin 3) – V (Pin 5)
V (Pin 9) – V (Pin 5)
V (Pin 7) – V (Pin 5)
4
15
25
250
950
950
mV
mV
mV
mV
mV
10
50
600
600
150
800
800
A
VP
Preamp Transimpedance
±10µA Into Pin 2, Measure ∆V (Pin 4), Fix Pin 3
10
15
17
kΩ
Preamp Output Swing, Positive
Preamp Output Swing, Negative
100µA Out of Pin 2, Measure ∆V (Pin 4), Fix Pin 3
100µA Into Pin 2, Measure ∆V (Pin 4), Fix Pin 3
0.25
–0.55
0.4
–0.4
0.55
–0.25
V
V
BW
Preamp Bandwidth
C (Pin 3) = 1µF, Measure f
C (Pin 3) = 1µF, f = 10kHz
7
2
MHz
P
–3dB
i
n
Preamp Input Noise Current
pA/√Hz
Preamp Loop Rejection, Positive
Preamp Loop Rejection, Negative
50µA Into Pin 2, Measure ∆V (Pin 4)
50µA Out of Pin 2, Measure ∆V (Pin 4)
–3
–3
–1
1
3
3
mV
mV
Preamp Loop Output Current, Positive
Preamp Loop Output Current, Negative
100µA Out of Pin 2, Measure I (Pin 3), (Note 1)
100µA Into Pin 2, Measure I (Pin 3), (Note 1)
–150
50
–100
100
–50
150
µA
µA
V
V
Bias Voltage
V (Pin 5)
1.7
4.75
0.1
1.9
4.9
0.5
40
2.1
4.95
1.4
V
V
µA
BIAS
Bypass Voltage
Filter Buffer Input Bias Current
Filter Buffer Input Resistance
V (Pin 16)
I (Pin 6), I (Pin 8)
BYPASS
I
B
R
∆V = 0.1V, Measure ∆I Pin 6, Pin 8
MΩ
IN
B
Gain Stage Loop Rejection, Positive
Gain Stage Loop Rejection, Negative
∆V = 50mV (Pin 6, Pin 8), Measure ∆V (Pin 7, Pin 9)
0.33
0.45
–0.45
0.57
–0.33
V
V
∆V = –50mV (Pin 6, Pin 8), Measure ∆V (Pin 7, Pin 9) –0.57
A
Gain Stages Voltage Gain
Gain Stages Bandwidth
(Note 2)
400
8
V/V
VG
BW
C (Pin 7) = C (Pin 9) = 1µF
MHz
G
t
Fast Comparator Response Time
Slow Comparator Response Time
10mV Overdrive
10mV Overdrive
25
60
ns
ns
r
V
V
V
Fast Comparator Hysteresis Voltage
Slow Comparator Hysteresis Voltage
(Note 3)
(Note 3)
35
40
mV
mV
HYS
Fast Comparator Output High Voltage
Slow Comparator Output High Voltage
∆V (Pin 9) = –200mV, 1mA Out of Pin 10 (Note 4)
∆V (Pin 7) = –200mV, 0.1mA Out of Pin 13 (Note 4)
2.4
2.4
3.5
3.9
V
V
OH
Fast Comparator Output Low Voltage
Slow Comparator Output Low Voltage
∆V (Pin 9) = 200mV, 800µA Into Pin 10
∆V (Pin 7) = 200mV, 800µA Into Pin 13
0.35
0.39
0.5
0.5
V
V
OL
2
LT1319
ELECTRICAL CHARACTERISTICS
TA = 25°C, V15 = 5V, V1 = V12 = 0V, V6 = V8 = V14 = 2V, unless otherwise specified.
SYMBOL PARAMETER
Threshold Transimpedance
CONDITIONS
100µA Into Pin 11 (Note 5)
100µA Into Pin 11, V (Pin 11)
MIN
TYP
2
MAX
UNITS
kΩ
V
V
V
V
Threshold External Voltage
Shutdown Input High Voltage
Shutdown Input Low Voltage
Shutdown Input High Current
Shutdown Input Low Current
Supply Current
0.8
2
0.9
1.2
TH
IH
IL
V
V
0.8
–10
–130
18
I
I
I
I
V (Pin 14) = 2.4V
V (Pin 14) = 0.4V
–140
–400
10
–60
–260
14
µA
µA
mA
µA
IH
IL
V (Pin 14) = 2V
S
Supply Current in Shutdown
V (Pin 14) = 0.8V, V (Pin 6) = V (Pin 8) = 0V
300
500
800
SHDN
0°C ≤ TA ≤ 70°C, V15 = 5V, V1 = V12 = 0V, V6 = V8 = V14 = 2V, unless otherwise specified.
SYMBOL PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
V
OS
Preamp Input Offset Voltage
Preamp Output Offset Voltage
Preamp Loop Offset Voltage
High Gain Loop Offset Voltage
Low Gain Loop Offset Voltage
V (Pin 2) – V (Pin 5)
V (Pin 4) – V (Pin 5)
V (Pin 3) – V (Pin 5)
V (Pin 9) – V (Pin 5)
V (Pin 7) – V (Pin 5)
4
17
27
350
1200
1200
mV
mV
mV
mV
mV
10
30
400
400
150
800
800
A
VP
Preamp Transimpedance
±10µA Into Pin 2, Measure ∆V (Pin 4)
8.5
15
18.5
kΩ
Preamp Output Swing, Positive
Preamp Output Swing, Negative
100µA Out of Pin 2, Measure ∆V (Pin 4)
100µA Into Pin 2, Measure ∆V (Pin 4)
0.2
–0.6
0.4
–0.4
0.6
–0.2
V
V
Preamp Loop Rejection, Positive
Preamp Loop Rejection, Negative
50µA Into Pin 2, Measure ∆V (Pin 4)
50µA Out of Pin 2, Measure ∆V (Pin 4)
–3.5
–3.5
–1
1
3.5
3.5
mV
mV
Preamp Loop Output Current, Positive
Preamp Loop Output Current, Negative
100µA Out of Pin 2, Measure I (Pin 3), (Note 1)
100µA Into Pin 2, Measure I (Pin 3), (Note 1)
–160
40
–100
100
–40
160
µA
µA
V
V
Bias Voltage
Bypass Voltage
V (Pin 5)
V (Pin 16)
1.5
4.7
1.9
4.9
0.5
0.45
–0.45
2.3
4.97
1.6
0.6
–0.3
V
V
BIAS
BYPASS
I
Filter Buffer Input Bias Current
Gain Stage Loop Rejection, Positive
Gain Stage Loop Rejection, Negative
I (Pin 6), I (Pin 8)
∆V = 50mV (Pin 6, Pin 8), Measure ∆V (Pin 7, Pin 9)
∆V = –50mV (Pin 6, Pin 8), Measure ∆V (Pin 7, Pin 9) –0.6
0.05
0.3
µA
V
V
B
V
V
Fast Comparator Output High Voltage
Slow Comparator Output High Voltage
∆V (Pin 9) = –200mV, 1mA Out of Pin 10 (Note 4)
∆V (Pin 7) = –200mV, 0.1mA Out of Pin 13 (Note 4)
2.4
2.4
3.5
3.9
V
V
OH
Fast Comparator Output Low Voltage
Slow Comparator Output Low Voltage
∆V (Pin 9) = 200mV, 800µA Into Pin 10
∆V (Pin 7) = 200mV, 800µA Into Pin 13
0.35
0.39
0.5
0.5
V
V
OL
V
V
V
Threshold External Voltage
Shutdown Input High Voltage
Shutdown Input Low Voltage
Shutdown Input High Current
Shutdown Input Low Current
Supply Current
100µA Into Pin 11, V (Pin 11)
0.7
2
0.9
1.3
V
V
TH
IH
IL
0.8
0
V
I
I
I
I
V (Pin 14) = 2.4V
–160
–450
9
–60
–260
14
µA
µA
mA
µA
IH
V (Pin 14) = 0.4V
V (Pin 14) = 2V
–80
20
IL
S
Supply Current in Shutdown
V (Pin 14) = 0.8V, V (Pin 6) = V (Pin 8) = 0V
200
500
900
SHDN
Note 1: Measure V (Pin 3) without input current for Pin 2. Force Pin 3 to
this measured voltage (which disables the preamp loop). Measure the
current into and out of Pin 3 when Pin 2 is driven.
Note 4: Measure V (Pin 7) and V (Pin 9). Force these voltages to 200mV
below their nominal value to switch the comparators high.
Note 5: The current into Pin 11 is multiplied by 4 and then applied to a
500Ω resistor on the positive comparator inputs. The threshold is
I (Pin 11) • 4 • 500Ω.
Note 2: The gain is the differential voltage at the comparator inputs divided
by the differential voltage between the filter buffer output and V
parameter is not tested.
. This
BIAS
Note 3: Hysteresis is the difference in comparator trip point measured
when the output is high and when the output is low. This parameter is
not tested.
3
LT1319
U W
TYPICAL PERFORMANCE CHARACTERISTICS
Preamp Highpass vs
Gain Stage Highpass vs
Capacitance on FILT2 or FILT2L
Preamp Frequency Response vs
Capacitance on FILT1
Input Capacitance
5
4
1000
100
10
1000
100
10
T
= 25°C
T = 25°C
A
T
= 25°C
A
A
3
2
50pF
10pF
1
0
–1
–2
–3
–4
–5
30pF
10M
1
0.1
100
1
100k
1M
100M
1k
10k
100k
1M
1k
10k
100k
1M
10M
FREQUENCY (Hz)
HIGHPASS CORNER FREQUENCY (Hz)
HIGHPASS CORNER FREQUENCY (Hz)
1319 G01
1319 G02
1319 G03
Input-Referred Noise vs
Lowpass Filter on PREOUT
FILTIN- or FILTINL- Referred
Threshold Voltage vs RT1
Preamp Output Noise vs
Input Capacitance
20
15
10
5
1.0
0.9
0.8
0.7
0.6
0.5
250
200
150
100
50
T
= 25°C
T
= 25°C
A
T = 25°C
A
FILTER
A
R
= 1k
50pF
30pF
10pF
0
0
0.1
1
10
20
30
(kΩ)
40
10k
100k
1M
FREQUENCY (Hz)
10M
100M
FILTER CUTOFF FREQUENCY (MHz)
R
T1
1319 G04
1319 G05
1319 G06
U
CIRCUIT DESCRIPTIO
The LT1319 is a general purpose low noise, high speed,
high gain, infrared receiver designed to easily provide IR
communications with portable computers, PDAs, desktop
computers and peripherals. The receiver takes the photo-
current from an infrared photodiode (Siemens BPW34FA
or Temic BPV22NF) and performs a current-to-voltage
conversion. After external filtering that is tailored for the
desired communication standard, two filter buffers are
provided. There are dual gain chains with nominal gain of
400V/Vthatfeedinternalcomparatorswithhysteresis. The
comparatorthresholdsaresetexternallywithacurrentinto
theVTHpin.Thehighfrequencycomparatorhasaresponse
time of 25ns and is well-suited to high data rates.
The low frequency comparator responds in 60ns and is
useful for more modest data rates such as Sharp/Newton
andIRDA-SIR.Thecircuitalsocontainsshutdowncircuitry
to reduce power consumption. Rejection of ambient inter-
ferenceisaccomplishedwithACcouplingloopsaroundthe
preamp and the two gain stages. The rejection frequency is
set with an internal resistor and an external capacitor to
ground. This feature allows changing of the break fre-
quencybysimplyswitchinginadditionalcapacitors. Toaid
in rejection of power supply noise there is internal supply
regulation and a fully differential topology after the filter
buffers.
4
LT1319
W
BLOCK DIAGRA
DS2
DS1
AN_GND
1
BYPASS
16
+
C
B3
10µF
R
R
S3
20k
S5
20k
Q3
R
R
R
S2
FB
S4
V
5V
CC
15k
20k
20k
R
S6
Q2
15
1k
+
0.1µF
+
IPD
C
IN
2
C
B1
B2
Q4
V
Q1
–
10µF
R
S1
SHDN
14
PHOTO-
DIODE
20k
PREAMP
R
+
L1
REG
R
H1
10k
50k
R
R
C1
G1
+
V
BIAS
A1
1k
500Ω
FILTER
BUFFER
–
+
+
+
–
+
1
DATAL
13
GM1
A2
= 20
A3
= 20
R
R
C2
500Ω
G2
FILT1
3
COMP 1
+
A
–
A
V
–
g
1k
V
m
4k
+
–
C
F1
LOW FREQUENCY
COMPARATOR
10nF
V
BIAS
R
L2
10k
+
g
m
+
DIG_GND
12
1
PREOUT
4
4k
–
GM2
V
BIAS
5
R
R
F2
F1
2k
1k
5V
+
C
R
R
B4
T1
SC
V
TH
L
1µF
30k
F1
2k
V
TH
100µH
11
GEN
+
C
T1
FILTINL
1µF
6
R
H2
50k
+
C
F3
FILT2L
7
100pF
R
R
C3
G3
+
A4
1k
500Ω
+
C
FILTER
BUFFER
–
F4
+
+
+
–
DATA
10
2.2nF
A5
= 20
A6
= 20
R
R
C4
500Ω
G4
COMP 2
A
–
A
V
–
1k
V
FILTIN
8
HIGH FREQUENCY
COMPARATOR
V
GM3
+
BIAS
C
F2
R
L3
10k
1nF
+
g
m
+
1
4k
–
FILT2
9
+
C
F5
1µF
NOTE: EXTERNAL COMPONENTS ARE SHOWN FOR AN IRDA AND SHARP/NEWTON DATA RECEIVER.
LT1319 • BD
5
LT1319
U
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APPLICATIONS INFORMATION
ing the voltage noise gain. Referring to the Block Diagram,
at frequencies beyond the corner frequency of the AC
coupling loop, the preamp is in a noise gain of 2.5 due to
the ratio of (RFB + RL1)/RL1. At high frequencies the input
capacitanceapproachesthesameimpedanceasRL1 sothe
noise gain increases. For example, at 500kHz the 30pF
input capacitance looks like 10.6kΩ which increases the
noise gain to almost 4. The preamp is compensated to
provideaflatcurrent-to-voltagefrequencyresponsewitha
–3dB corner at 7MHz. The input current noise peaks up
considerably if full bandwidth is used. To obtain best noise
performance,theoutputofthepreampshouldbefilteredto
the minimum bandwidth required for the desired modula-
tion scheme. The graph of input-referred noise versus
lowpass filtering on the preamp output shows the noise
penalty for higher bandwidths.
Layout and Passive Components
TheLT1319requirescarefullayouttechniquestominimize
parasitic signal coupling to the preamp input. A sample
board layout for the circuit on the first page is shown in the
Typical Application section. The lead lengths on the photo-
diode must be as short as possible to Pin 2. Shielding is
recommended over the entire circuit. A ground plane must
be used and connected to Pin 1. The ground plane should
extendunderthepackageandsurroundPins1to9andPin
16. A single point connection should be made to the
groundplaneatPin12(DIG_GND).TheleadsonPins6and
8 should be short to prevent pickup into the gain stages.
The comparator output leads (Pins 10 and 13) should be
as short as possible to minimize coupling back to the input
via parasitic capacitance.
Capacitance on Pin 10 should be minimized as the com-
parator output is pulled up by an internal 5k resistor. The
associated digital circuitry should be located on the oppo-
site side of the PC board from the LT1319 or separated as
much as possible if on the same side of the board. Filter
components should be located on the analog ground side
of the package. Bypass capacitors should be used on Pins
5, 11, 15 and 16 for best supply rejection.
AC Coupling Loops
There are three AC loops in the circuit that reject low
frequency inputs. The first loop is around the preamp and
provides rejection of ambient light sources. The operation
can be explained by looking at the Block Diagram. For low
frequency signals the transconductance amplifier, GM1,
compares the preamp output to the VBIAS voltage. This
differential voltage is transformed into a current that is fed
into the high impedance node at Pin 3 and transformed
back to a voltage. There is a voltage gain of approximately
60dB to this point which is then buffered to drive a 10k
resistor that is connected back to the input of the preamp.
This high gain loop attenuates the effect of low frequency
signalsbytheamountoftheloopgaintimestheratioofRL1
to RFB (i.e., 1000V/V • 15/10 = 1500). For higher frequen-
ciestheattenuationdecreasesduetotheexternalcapacitor
onPin3. Atfrequenciesbeyondwheretheloopgainequals
10/15, signals are no longer attenuated. This high fre-
quency cutoff is at:
Preamp
The LT1319 preamp is a low noise, high speed current-to-
voltage converter that has been optimized for an input
capacitance of 30pF (which corresponds to the capaci-
tance of the above-mentioned photodiodes with approxi-
mately 2V of back bias). A range of 0pF to 50pF is
acceptable. The amplifier obtains high bandwidth by pro-
vidingalowimpedanceinputsothattheinputcurrentisnot
filtered by the photodiode capacitance.
The dynamic range of the circuit will be limited at the low
end by the input-referred current noise of the preamplifier
and the desired signal-to-noise ratio. At the other extreme
ofthedynamicrangeforverylargeinputsignals,theoutput
of the preamp is clamped by Schottky diodes across the
feedback resistor.
f = (15/10)/(2π • 4kΩ • CPIN3
)
where 1/(4kΩ) is the transconductance of the loop ampli-
fier. For example, if CPIN3 = 300pF, the highpass frequency
is 200kHz which can aid in rejection of a wide range of
ambient interference.
The noise bandwidth is shaped by filtering at the output of
the preamplifier and by the AC coupling loop. The input
capacitance causes noise peaking for high bandwidth
applications. Noise peaking can be explained by consider-
The other two loops operate similarly around the gain
stages and also provide low frequency rejection. In addi-
6
LT1319
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APPLICATIONS INFORMATION
tion, the loops around the gain stages provide an accurate
DC threshold setting for the comparators. At DC, the loops
force the differential voltages at the output of the gain
stages to zero. The comparator threshold is set by the
currents provided by the VTH generator through the 500Ω
resistors RC1 and RC3. These currents are equal to 4 times
thecurrentintoPin11.For100µAintoPin11,thecompara-
tor thresholds are nominally 200mV.
pass filter network. The application on the first page of the
datasheetisrepeatedintheBlockDiagramandcanbeused
to illustrate the filtering for IRDA-SIR and Sharp/Newton.
ThepreamphighpasszeroissetbyGM1andCF1.Thebreak
frequency is located at:
f = (15kΩ/10kΩ)/(2π • 4kΩ • 10nF) = 6kHz
Onthelowspeedchannelthereisalowpassfilterat800kHz
set by RF2 and CF3. The gain stage has a highpass filter set
by GM2 and CF4 at approximately 500kHz. The high speed
channel has an LC tank circuit at 500kHz with Q = 3 set by
RF1. The high speed gain stage has a highpass character-
istic set by GM3 and CF5 with a break frequency of 1.1kHz.
These filters are suitable for the 1.6µs pulses and up to
115kBd data rates of IRDA-SIR on the slow channel. The
fast channel is used for Sharp/Newton ASK Modulation
with 500kHz bursts at data rates up to 38.4kBd.
Power Supply Rejection and Biasing
TheLT1319hasveryhighgainandbandwidthsogreatcare
is taken to reduce false output transitions due to power
supplynoise. AsafirststeptheVCC inputisregulateddown
to approximately 4V to power all the analog sections of the
circuitwhicharealsotiedtoAnalogGround(Pin1)asisthe
substrate of the die. Additionally, the internal 4V is by-
passedatPin16. Thedigitalcircuitry(thecomparatorsand
shutdown logic) is powered directly off of VCC and is
returned to Digital Ground (Pin 12). To provide a clean bias
point for the preamp, filter buffers and the gain stages, a
1.9V reference is generated from the 4V rail and is by-
passed at Pin 5. The gain stages are pure differential
designs which inherently reject supply variations.
A second circuit is shown in the Typical Applications
section for IRDA SIR/FIR and Sharp. This circuit is Demo
Board 54. The first filter is a preamp highpass loop set at
600Hz by CF7 for IRDA or 180kHz by CF1 for Sharp. Sharp
modulation is run on the low speed channel and is next
filtered by a tank circuit formed by RF2, LF1 and CF3 and
centered at 500kHz. LF1 also provides the DC bias for the
filter buffer input. A final highpass for the lower speed
channel is set by CF4 at 130kHz. The high speed channel is
usedbyIRDASIRandFIRwhichuse1.6µsand220nswide
pulses. A lowpass formed by RF1 and CF2 limit the noise
bandwidth. The final highpass is set by CF5 (2.5MHz for
FIR)orCF6(450kHz).ThesquelchcircuitformedbyQ1,Q2,
Q3 and RC1 to RC6 extends the short range performance
and will be discussed later.
Filtering
Filtering is needed for two main reasons: sensitivity and
ambient rejection. Lowpass filtering is needed to limit the
bandwidth in order to minimize the noise. Low noise
permits reliable detection of smaller input signals over a
larger distance. Highpass filtering is used to reject interfer-
ing ambient signals. Interference includes low frequency
sources of infrared light such as sunlight, incandescent
lights, and ordinary fluorescent lights, as well as high
frequencysourcessuchasTVremotecontrols(40kHz)and
high frequency fluorescent lighting (40kHz to 80kHz).
In designing custom filters for different applications, the
following guidelines should be used.
1. Limit the noise bandwidth with a lowpass filter that has
a rise time equal to half the pulse width. For example, for
1µs pulses a 700kHz lowpass filter has a 10% to 90%
rise time of 0.35/700kHz = 500ns.
Thecircuittopologyallowsforfilteringbetweenthepream-
plifier and the filter buffers as well as filtering with the three
internalhighpassloops.Withtwochannelsthefilteringcan
be optimized for different modulation schemes. The high
speed channel (with a 25ns comparator) is ideal for modu-
lation schemes using frequencies above 1MHz. Carrier-
based methods as well as narrow pulse schemes can have
superior ambient rejection by adding in a dedicated high-
2. Limit the maximum highpass to 1/(4 • pulse width). For
1µs pulses, 1/4µs = 250kHz.
3. In setting the highpass filters, space the filters apart by
a factor of 5 to 10 to reduce overshoot due to filter
7
LT1319
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APPLICATIONS INFORMATION
interaction. Overshoot becomes especially important
for high input levels because it can cause false pulses
which may not be tolerated in certain modulation
schemes. It is also more of a problem in modulation
schemes such as IRDA-SIR and FIR where the duty
cycle can get very low (i.e., transmitting data with lots of
ones which are signaled with the absence of pulses). AC
coupled receivers when faced with low duty cycle data
set their thresholds close to the baseline DC level of the
data stream which converts small overshoots into erro-
neously received pulses.
which translates to a photodiode current as follows (using
the BPW34FA data sheet specs):
2
7mm
I
= 40mW/sr
(
•
)
PD MIN
(
)
2
)
1000mm
(
0.65A / W 0.95 0.95 = 164nA
)( )(
(
)
The7mm2 termisthephotodiodearea. The1000mmisthe
distance from the light source. The 0.65A/W is the spectral
sensitivity at 880nm wavelength. The first 0.95 term is the
relative sensitivity at 850nm wavelength and the second
term is the sensitivity at 15° off axis. Similar calculations
are detailed in the Infrared Data Association Serial Infrared
(SIR) Physical Layer Link Specification, version 1.0. This
minimum photocurrent implies that the input-referred
noise current of the receiver be less than 13.7nA rms for a
bit error rate of 1E-9. With an 800kHz lowpass filter on the
preampoutputtheLT1319hasapproximately3.6nArmsof
input-referred current noise. The maximum photodiode
current at 20mm, on-axis with 500mW/sr intensity:
4. As a general rule, place the lowest frequency highpass
aroundthepreampandthehighesthighpassaroundthe
gain stage or between the preamp and gain stage. The
reason for this is again due to high signal levels where
there can be slow photocurrent tails. The tail response
can be filtered out by high enough frequency filters.
5. Inallcaseswithcustomfiltering,orwhenmodifyingone
of the applications presented in this data sheet, try the
system over the full distance range with a full range of
dutycycledatastreams. Modulationmethodswithfixed
orlimiteddutycyclearesuperiorbecausetheyhavelittle
or no data dependent problems.
2
7mm
Dynamic Range
I
= 500mW/sr
•
(
)
PD MAX
(
)
2
20mm
The calculation of dynamic range can only be made in the
context of a specific modulation scheme and with the
system variations taken into account. The required infor-
mation includes: minimum signal-to-noise ratio (or BER,
Bit Error Rate requirement), photodiode capacitance at
1.9V back bias, preamp noise spectrum, preamp output
filtering, AC loop cutoff frequencies, modulation method,
demodulation method including allowable pulse widths
and the effect of missing or extra pulses, photodiode rise
and fall times, and ambient interference. The best solution
istoexperimentallydeterminethemaximumandminimum
distancesatwhichadesiredBERisobtained.Thismeasure
ofdynamicrangeismoremeaningfulintermsoftheoverall
system than any analytic solution.
(
)
0.65A/ W 0.95 = 5.4mA
)(
(
)
so we see that the dynamic range requirement is 90.4dB.
What is not obvious, however, is that the photodiode
output current is not simply a pulse of current, there is a
significanttailathighcurrentlevelsthathasatimeconstant
of more than 1µs which can cause distortion in the output
pulse width of the LT1319. This tail can be shown in the
following photograph which shows the voltage across a 5k
resistor that is connected between the anode of a photo-
diode and ground. The cathode of the photodiode is
connected to 2V. There is a 2pF Schottky diode across the
resistor to clamp the voltage swing to less than 0.5V. With
about 30pF photodiode capacitance and 10pF for an oscil-
loscope probe, any tail observed with a time constant
greater than 210ns is due to decaying photocurrent. The
Using the IRDA-SIR modulation scheme as an example,
however, we can illustrate how some limits on the required
receiver/photodiode combination can be obtained. The
minimum light intensity in the angular range is 40mW/sr
8
LT1319
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APPLICATIONS INFORMATION
or nominally 0.68mV for RT1 = 30k. The largest practical
value of RT1 is 39k. The limitation tends to be switching
transients at the comparator outputs parasitically coupling
to the FILTIN or FILTINL inputs and is layout dependent.
first trace in the photograph shows the current with the
photodiode 10cm from a source with 100mW/sr intensity.
At 200mV/div, there is about 40µA of peak current and the
decay is consistent with the 210ns time constant. The
lower trace shows the current with the photodiode 2cm
from the LEDs where the photodiode current is theoreti-
cally25timesgreaterthanat10cm. Thevoltageisclamped
by the photodiode to nearly 0.4V, but what is now notice-
able is that there is a tail with a time constant a bit greater
than 1µs. If the signal is AC coupled and has a low duty
cycle, the waveform will be centered at the very bottom
which can result in very wide output pulses. This issue will
be discussed later in more detail and a method to circum-
vent it will be shown.
Extending Short Range Performance
The short range performance of the LT1319 is normally
limited by the photocurrent tail, but in some instances the
peak current level cannot be supported by the output of the
preamplifier and the input will sag at Pin 2. Typically the
maximum input current is 6mA. To increase this current to
20mAormore, placeanNPNtransistorwithitsemittertied
to Pin 2, the base to Pin 4 and collector to the 5V supply.
The choice of transistor is dependent on the bandwidth
required for the preamp. The base-emitter capacitance of
the transistor (CJE), is in parallel with the 15k feedback
resistor of the preamplifier and performs a lowpass filter-
ing function. For modest data rates such as IRDA-SIR and
Sharp/Newton a 2N3904 limits the bandwidth to 2MHz
which is ample. For the highest data rates, a transistor with
fT greater than 1GHz is needed such as MMBR941LT1.
Photocurrent Waveforms
10cm
Another issue with large input signals is the photocurrent
tail. WhenthistailisACcoupledandthedatahasalowduty
cycle, the output pulse width can become so wide that it
extendsintothenextbitinterval.Ahighpassfiltercanreject
thistail,butforthecaseofIRDA-SIR,rejectingthe1µstime
constantcancauserejectionofthe1.6µspulsewhichleads
toalossofsensitivityandreducedmaximumlinkdistance.
Thecircuitonthefrontpageofthedatasheetusesa500kHz
highpass that trades off some sensitivity for rejection of
this tail. Unfortunately both maximum and minimum dis-
tance are compromised. An alternative is shown in the
IRDA-SIR/FIRapplication.Inthisinstancethefinalhighpass
filter for SIR is moved into 450kHz, but a clamp/squelch
circuitconsistingofQ1, Q2, D3andRC1 toRC6 isadded. Q1
isusedasdescribedabovetoclamptheinput, buttheinput
currentlevelatwhichtheclampengageshasbeenmodified
by RC1 and RC2.
2cm
1319 AI01
Threshold Adjustment
The comparator thresholds are set by the current into Pin
11. The simplest method of setting this current is by a
resistor, RT1 tied between Pin 11 and Pin 15 (VCC). Pin 11
should be bypassed. The current is given by:
V − 0.9V
(
)
CC
ITH =
R + 2kΩ
T1
The threshold referred to the input of the filter buffer is:
Without the resistors, Q1 would turn on when the voltage
across the 15k resistor in the preamp reaches about 0.7V
(a current of 0.7V/15kΩ = 47µA). The drop across RC1
reducesthisvoltagebyabout365mV.Thedropissetbythe
I
• 4 • 500Ω
400V/ V
TH
V
=
TH
9
LT1319
U
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APPLICATIONS INFORMATION
current through RC2 which is [VCC – (VBIAS + 0.365V)]/
15kΩ = 182µA where VBIAS = 1.9V. At this new level
(0.335V/15kΩ = 22.3µA), Q1 turns on which clamps the
preamp output. The collector current of Q1 provides base
drive for Q2 which saturates and pulls its collector close to
5V. The FILT1, FILT2L and FILT2 inputs are now pulled
positive by RC3, RC4 and RC6 which forces an offset at the
inputs to the gain stages and preamp. Referring to the
Block Diagram, pulling FILT2L or FILT2 positive a voltage
∆V provides a voltage of ∆V/11 at the inverting input of the
first gain stage. This offset effectively cuts off a portion of
the tail at high input levels. The magnitude of ∆V is set by
the value of RC3, the current sinking capability of the
transconductancestages(100µA),thevalueofCF4,CF5 and
the duty cycle of the data pulses. Likewise an offset of
∆V/10kΩ is created at the preamp input to reduce tail
current contributions.
RF quality capacitor to reduce the high frequency spikes.
The current must be selected to achieve the minimum
output light intensity at a given angle and must be lower
than the manufacturer’s maximum current rating at the
maximum duty cycle of the modulation method. The opti-
mum current is a function of the LED output, the LED
forward voltage, the drop across the transistor and the
minimum supply voltage.
V − VLED − VSW
(
)
CC
ILED
=
RSERIES
The minimum light output then can be obtained from the
LEDdatasheet.ForIRDA-SIRtheminimumintensityat15°
off axis is 40mW/sr. For IRDA-FIR the spec rises to
100mW/sr. To increase light output and distance of the
link, a second LED can be inserted in series with the first to
obtain twice the light output without consuming additional
supply current. The current variation will now be greater
becausetwoLEDforwarddropsmustbeaccountedforand
the drop across the series resistor is greatly reduced.
LED Drive Circuits
There are several simple circuits for driving LEDs. For low
speed modulation methods such as IRDA-SIR and Sharp/
Newton with pulses over 1µs, a 2N3904 in a SOT-23
packagecanbeusedasaswitchwithaseriesresistorinthe
collector to limit the current drive. This circuit is shown
below with a suggested limiting resistor of 16Ω which
typically sets the current at 200mA. The supply voltage
mustbewellbypassedattheconnectiontotheLEDinorder
for the supply not to sag when hit with a fast current pulse.
A10µFlowESRcapacitorshouldbeusedaswellasa0.1µF
For pulse widths less than 500ns the NPN should be
replaced by an N-channel MOSFET with on-resistance of
less than 1Ω with 5V on the gate. The FET can turn off
much more quickly than the saturated NPN and provides
a lower effective on-resistance. A suggested circuit is
shown below and includes three devices available in the
SOT-23 package.
U
TYPICAL APPLICATIONS
LED Drive Circuit
for IRDA-SIR and Sharp/Newton
2 LED Drive Circuit
for IRDA-FIR
Optional Clamp Circuit
V
V
CC
V
CC
CC
HSDL4220
TSH5400
DN304
HSDL4220
TSH5400
DN304
2N3904 FOR <1MHz
MMBR941LT1 FOR >1MHz
R
F3
16Ω
R
3.9Ω
D2
R
470Ω
PIN 2
PIN 4
PREOUT
F4
IN
1319 TA03
Q1
2N3904
R
D1
100Ω
V
IN
Q1
NDS351N
TN0201T
2N7002
V
IN
1319 TA04
1319 TA05
10
LT1319
U
TYPICAL APPLICATIONS
IRDA-SIR/FIR and Sharp or TV Remote Data Receiver
E1
SHDN
E2
CC
E3
GND
V
V
CC
V
CC
D2
HSDL-4220
R
C5
1M
R
D2
R
C2
15k
Q2
6.8Ω
R
C1
2k
MMBT3906LT1
1/2W
R
D1
100Ω
Q1
R
C4
10k
E6
TX
MMBT941LT1
Q3
2N7002
Q4
2N7002
R
D3
10k
R
D3
BAS16
C3
10k
R
C6
1k
DRIVER
1
16
BYPASS
AN_GND
C
B3
2
15
14
13
12
11
10
9
V
IN
CC
10µF
3
U1
LT1319
R
C
C
B2
T1
30k
B1
0.1µF
SHDN
FILT1
10µF
E4
4
5
6
7
8
DATAL
PREOUT
SHARP OR
TV DATA
D1
TEMIC
BPV22NF
DIG_GND
V
BIAS
R
F2
1k
R
F1
1k
L
F1
100µH
V
FILTINL
FILT2L
FILTIN
TH
DATA
FILT2
C
T1
1µF
E5
IRDA-SIR/FIR
DATA
C
C
F4
10nF
DGND
B4
C
C
F3
1nF
C
F2
33pF
F1
330pF
C
F5
470pF
1µF
V
V
CC
C
C
CC
F7
F6
AGND
0.1µF
2.7nF
LT1319 • TA02
1
2
1
2
R
S1
5.1k
R
S2
5.1k
IRDA
SIR
NOTES:
1. FOR IRDA-SIR/FIR OR TV REMOTE,
Q5 SHOULD BE TURNED ON WITH
A HIGH LOGIC INPUT
Q5
Q6
JMP1
JMP2
FIR
MMBT3904LT1
MMBT3904LT1
SHARP
3
3
2. FOR IRDA-SIR, Q6 SHOULD BE TURNED
ON WITH A HIGH LOGIC INPUT
3. FOR SHARP ASK, C = 1nF, L = 100µH
4. FOR TV REMOTE, C = 33nF, L = 470µH
DGND
DGND
F3 F1
F3
F1
PC Board Layout for IRDA-SIR/FIR and Sharp or TV Remote Data Receiver
COMPONENT
TOP
BOTTOM
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
11
LT1319
U
Dimensions in inches (millimeters) unless otherwise noted.
PACKAGE DESCRIPTION
S Package
16-Lead Plastic Small Outline (Narrow 0.150)
(LTC DWG # 05-08-1610)
0.386 – 0.394*
(9.804 – 10.008)
16
15
14
13
12
11
10
9
0.150 – 0.157**
(3.810 – 3.988)
0.228 – 0.244
(5.791 – 6.197)
5
7
8
1
2
3
4
6
0.010 – 0.020
(0.254 – 0.508)
× 45°
0.053 – 0.069
(1.346 – 1.752)
0.004 – 0.010
(0.101 – 0.254)
0.008 – 0.010
(0.203 – 0.254)
0° – 8° TYP
0.050
(1.270)
TYP
0.014 – 0.019
(0.355 – 0.483)
0.016 – 0.050
0.406 – 1.270
S16 0695
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1113
Dual, Low Noise Precision JFET Input Op Amp
4.5nV/√Hz Input Voltage Noise
LT1169
Dual, Low Noise Picoampere Bias Current Op Amp
Low Noise, High Speed Op Amp (A ≥ 10)
JFET Input, 10pA Max
LT1222
500MHz Gain Bandwidth, External Comp Pin
V
LT/GP 1095 2K REV A • PRINTED IN USA
LINEAR TECHNOLOGY CORPORATION 1995
Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
12
●
●
(408) 432-1900 FAX: (408) 434-0507 TELEX: 499-3977
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