LT1769IGN [Linear]
Constant-Current/ Constant-Voltage 2A Battery Charger with Input Current Limiting; 恒定电流/恒定电压2A电池充电器输入电流限制型号: | LT1769IGN |
厂家: | Linear |
描述: | Constant-Current/ Constant-Voltage 2A Battery Charger with Input Current Limiting |
文件: | 总16页 (文件大小:218K) |
中文: | 中文翻译 | 下载: | 下载PDF数据表文档文件 |
LT1769
Constant-Current/
Constant-Voltage 2ABattery
Charger with Input Current Limiting
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FEATURES
DESCRIPTIO
The LT®1769 current mode PWM battery charger is a
■
Simple Solution to Charge NiCd, NiMH and Lithium
Rechargeable Batteries—Charging Current
Programmed by Resistors or DAC
Adapter Current Limit Allows Maximum Possible
Charging Current During System Use*
Precision 0.5% Accuracy for Voltage Mode Charging
High Efficiency Current Mode PWM with 3A Internal
Switch
simple, efficient solution to fast charge modern recharge-
able batteries including lithium-ion (Li-Ion), nickel-metal-
hydride (NiMH) and nickel-cadmium (NiCd) that require
constant-current and/or constant-voltage charging. The
internal switch is capable of delivering 2A** DC current
(3A peak current). Charge current can be programmed by
resistorsoraDACtowithin5%. With0.5%referencevoltage
accuracy, the LT1769 meets the critical constant-voltage
charging requirement for Li-Ion cells.
■
■
■
■
■
■
■
■
■
■
■
5% Charge Current Accuracy
Adjustable Undervoltage Lockout
Automatic Shutdown When AC Adapter is Removed
Low Reverse Battery Drain Current: 3µA
Current Sensing Can Be at Either Terminal of the Battery
Charging Current Soft Start
A third control loop is provided to regulate the current
drawn from the input AC adapter. This allows simulta-
neous operation of the equipment and battery charging
withoutoverloadingtheadapter.Chargecurrentisreduced
to keep the adapter current below specified levels.
Shutdown Control
Available in 28-Lead Narrow SSOP Package
The LT1769 can charge batteries ranging from 1V to 20V.
Groundsensingofcurrentisnotrequiredandthebattery’s
negative terminal can be tied directly to ground. A saturat-
ing switch running at 200kHz gives high charging effi-
ciency and small inductor size. A blocking diode is not
required between the chip and the battery because the
chip goes into sleep mode and drains only 3µA when the
wall adapter is unplugged.
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APPLICATIO S
■
Chargers for NiCd, NiMH, Lead-Acid, Lithium
Rechargeable Batteries
■
Switching Regulators with Precision Current Limit
, LTC and LT are registered trademarks of Linear Technology Corporation.
*US patent number 5,723,970
**See LT1510 for 1.5A charger; see LT1511 for 3A charger
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D3††
R7†
SS24
TYPICAL APPLICATIO
500Ω
V
(ADAPTER INPUT)
IN
CLP
CLN
GND
†
11V TO 28V
R
S4
C1
1µF
ADAPTER
CURRENT SENSE
SW
TO MAIN
SYSTEM LOAD
C2
D1††
V
CC
0.47µF
C
*
IN
15µF
R5†
SS24
BOOST
LT1769
UNDERVOLTAGE
LOCKOUT
L1**
22µH
UV
COMP1
D2
1N4148
R6
5k
2nF
10k
PROG
V
C
300Ω
SPIN
R
PROG
4.93k
1%
C
PROG
1µF
0.33µF
OVP SENSE
BAT
R
R
S2
S3
NOTE: COMPLETE LITHIUM-ION CHARGER,
200Ω
200Ω
NO TERMINATION REQUIRED. R , R7
1%
S4
1%
AND C1 ARE OPTIONAL FOR I LIMITING
IN
V
BAT
R3
*TOKIN OR UNITED CHEMI-CON/MARCON
R
S1
+
C
OUT
8.4V
Li-Ion
390k
CERAMIC SURFACE MOUNT
0.05Ω
22µF
0.25%
BATTERY
VOLTAGE SENSE
**22µH SUMIDA CDRH125
BATTERY CURRENT
SENSE
TANT
†
SEE APPLICATIONS INFORMATION FOR
1511 • F01
INPUT CURRENT LIMIT AND UNDERVOLTAGE LOCKOUT
††
GENERAL SEMICONDUCTOR. FOR T LESS THEN 100°C
J
R4
162k
0.25%
MBRS130LT3 CAN BE USED
Figure 1. 2A Lithium-Ion Battery Charger
1
LT1769
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PACKAGE/ORDER INFORMATION
ABSOLUTE MAXIMUM RATINGS
(Note 1)
Supply Voltage
(VCC, CLP and CLN Pin Voltage)......................... 30V
BOOST Pin Voltage with Respect to VCC ................. 25V
TOP VIEW
ORDER PART
NUMBER
1
2
GND**
GND**
GND**
28
27
26
25
24
23
22
21
20
19
18
17
16
15
GND**
GND**
GND**
SW
LT1769CGN
LT1769IGN
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BAT (Average)........................................................... 2A
3
Operating Junction Temperature Range
4
V
CC1
V
CC2
V
CC3
*
*
*
Commercial ........................................... 0°C to 125°C
Industrial ......................................... –40°C to 125°C
Operating Ambient Temperature
Commercial ............................................ 0°C to 70°C
Industrial ........................................... –40°C to 85°C
Storage Temperature Range ................. –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................. 300°C
5
BOOST
UV
6
7
GND**
PROG
GND**
GND**
OVP
*ALL V PINS SHOULD
CC
8
BE CONNECTED
TOGETHER CLOSE TO
THE PINS
9
V
C
** ALL GND PINS ARE
FUSED TO INTERNAL DIE
ATTACH PADDLE FOR
HEAT SINKING. CONNECT
THESE PINS TO
EXPANDED PC LANDS
FOR PROPER HEAT
SINKING. 35°C/W
10
11
12
13
14
UV
OUT
CLP
COMP2
BAT
CLN
COMP1
SENSE
GND**
SPIN
GND**
THERMAL RESISTANCE
ASSUMES AN INTERNAL
GROUND PLANE
GN PACKAGE
28-LEAD PLASTIC SSOP
DOUBLING AS A HEAT
SPREADER
TJMAX = 125°C, θJA = 35°C/ W**
Consult factory for Military grade parts.
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, VBAT = 8V, RS2 = RS3 = 200Ω (see Block Diagram),
VCLN = VCC. No load on any outputs unless otherwise noted.
PARAMETER
Overall
CONDITIONS
MIN
TYP
MAX
UNITS
Supply Current
V
V
= 2.7V, V ≤ 20V
●
●
4.5
4.6
6.8
7.0
mA
mA
PROG
PROG
CC
= 2.7V, 20V < V ≤ 25V
CC
Sense Amplifier CA1 Gain and Input Offset Voltage
8V ≤ V ≤ 25V , 0V ≤ V
≤ 20V
CC
BAT
(With R = 200Ω, R = 200Ω)
R
R
= 4.93k
= 49.3k
●
●
93
8
7
100
10
107
12
12
mV
mV
mV
S2
S3
PROG
(Measured across R )(Note 2)
S1
PROG
T < 0°C
A
V
= 28V, V
= 20V
CC
BAT
R
= 4.93k
= 49.3k
●
●
90
6
7
110
14
13
mV
mV
mV
PROG
R
PROG
T < 0°C
A
V
Undervoltage Lockout (Switch OFF) Threshold
Measured at UV Pin
●
●
●
●
6
7
8
5
V
µA
V
CC
UV Pin Input Current
0.2V ≤ V ≤ 8V
0.1
0.1
0.1
3
UV
UV Output Voltage at UV
Pin
In Undervoltage State, I
= 70µA
0.5
3
OUT
UVOUT
UV Output Leakage Current at UV
Pin
8V ≤ V , V
= 5V
µA
µA
OUT
UV UVOUT
Reverse Current from Battery (When V Is
V
≤ 20V, V ≤ 0.4V
15
CC
BAT
UV
Not Connected, V Is Floating)
SW
2
LT1769
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, VBAT = 8V, RS2 = RS3 = 200Ω (see Block Diagram),
CLN = VCC. No load on any outputs unless otherwise noted.
V
PARAMETER
Overall
CONDITIONS
MIN
TYP
MAX
UNITS
Boost Pin Current
V
V
= 20V, V
= 28V, V
BOOST
BOOST
= 0V
= 0V
0.1
0.25
6
10
20
9
µA
µA
mA
mA
CC
CC
BOOST
BOOST
2V ≤ V
8V ≤ V
– V < 8V (Switch ON)
– V ≤ 25V (Switch ON)
CC
8
12
CC
Switch
Switch ON Resistance
8V ≤ V ≤ V
, I = 2A,
CC
MAX SW
V
V
V
– V ≥ 2V
●
0.15
25
0.25
35
Ω
BOOST
SW
∆I /∆I During Switch ON
BOOST SW
= 24V, I ≤ 2A
mA/A
BOOST
SW
Switch OFF Leakage Current
= 0V, V ≤ 20V
●
●
2
4
100
200
µA
µA
SW
CC
20V < V ≤ 28V
CC
Minimum I
Minimum I
for Switch ON
for Switch OFF
for Switch ON
●
●
●
2
1
4
20
µA
mA
V
PROG
PROG
2.4
Maximum V
V
– 2
BAT
CC
Current Sense Amplifier CA1 Inputs (Sense, BAT)
Input Bias Current
●
●
●
–50
–125
µA
V
Input Common Mode Low
Input Common Mode High
SPIN Input Current
–0.25
V
– 2
V
CC
–100
2.465
–200
µA
Reference
Reference Voltage (Note 3)
R
= 4.93k, Measured at OVP with
PROG
VA Supplying I
and Switch OFF
2.448
2.477
V
PROG
Reference Voltage
All Conditions of V , T ≥ 0°C
●
●
2.441
2.43
2.489
2.489
V
V
CC
A
T < 0°C (Note 4)
A
Oscillator
Switching Frequency
Switching Frequency
180
200
200
220
kHz
All Conditions of V , T ≥ 0°C
●
●
170
160
230
230
kHz
kHz
CC
A
T < 0°C
A
Maximum Duty Cycle
90
85
93
%
%
●
Current Amplifier CA2
Transconductance
V = 1V, I = ±1µA
150
250
550
0.6
µmho
C
VC
Maximum V for Switch OFF
●
V
C
I
Current (Out of Pin)
V ≥ 0.6V
V < 0.45V
C
100
3
µA
mA
VC
C
3
LT1769
ELECTRICAL CHARACTERISTICS The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 16V, VBAT = 8V. No load on any outputs unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
0.6
±3
MAX
UNITS
Voltage Amplifier VA
Transconductance (Note 3)
Output Source Current
OVP Input Bias Current
Output Current from 50µA to 500µA
0.25
1.1
1.3
mho
mA
V
OVP
= V + 10mV, V
= V + 10mV
REF
PROG REF
VA Output Current at 0.5mA
VA Output Current at 0.5mA, T > 90°C
●
●
±10
25
nA
nA
–15
A
Current Limit Amplifier CL1, 8V
Turn-On Threshold
≤ Input Common Mode
0.5mA Output Current
93
100
1
107
2
mV
mho
µA
Transconductance
Output Current from 50µA to 500µA
0.5
CLP Input Current
0.5mA Output Current, V ≥ 0.4V
0.3
0.8
1
UV
CLN Input Current
0.5mA Output Current V ≥ 0.4V
2
mA
UV
Note 3: Tested with Test Circuit 2.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Tested with Test Circuit 1.
Note 4: A linear interpolation can be used for reference voltage
specification between 0°C and –40°C.
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TYPICAL PERFORMANCE CHARACTERISTICS
ICC vs Duty Cycle
ICC vs VCC
Efficiency of Figure 1 Circuit
7.0
6.5
6.0
5.5
5.0
4.5
100
98
96
94
92
90
88
86
84
82
80
8
7
6
5
4
3
2
1
0
MAXIMUM DUTY CYCLE
V
= 16V
V
V
= 16.5
= 8.4V
CC
IN
BAT
T
= 0°C
J
T
= 25°C
J
T = 0°C
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CHARGER EFFICIENCY
T
= 125°C
J
T = 125°C
J
T = 25°C
J
INCLUDES LOSS
IN DIODE D3
0
10
15
(V)
20
25
30
40
DUTY CYCLE (%)
5
0
10 20 30
50 60 70 80
0.2
0.6
1.0
I
1.4
(A)
1.8
2.2
V
CC
BAT
1769 G03
1769 G02
1769 G01
4
LT1769
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TYPICAL PERFORMANCE CHARACTERISTICS
VREF Line Regulation
IVA vs ∆VOVP (Voltage Amplifier)
0.003
0.002
0.001
0
4
3
2
1
0
ALL TEMPERATURES
T
= 125°C
J
–0.001
–0.002
–0.003
T
= 25°C
J
0
10
15
(V)
20
25
30
5
0
0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1.0
(mA)
V
CC
I
VA
1769 G04
1769 G05
Maximum Duty Cycle
VC Pin Characteristics
98
97
96
95
94
93
92
91
90
–1.20
–1.08
–0.96
–0.84
–0.72
–0.60
–0.48
–0.36
–0.24
–0.12
0
0.12
20
40
60
80 100
140
0
120
0
0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0
(V)
JUNCTION TEMPERATURE (°C)
V
C
1769 G06
1769 G07
Reference Voltage
vs Temperature
PROG Pin Characteristics
2.470
2.468
2.466
2.464
2.462
2.460
2.458
6
T
= 125°C
J
T
= 25°C
J
0
–6
0
50
75
100
125
150
25
0
1
2
3
4
5
JUNCTION TEMPERATURE
V
(V)
PROG
1769 G09
1769 G08
5
LT1769
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PIN FUNCTIONS
GND(Pins1to3, 7, 8, 14, 15, 22, 26to28):GroundPins.
Must be connected to expanded PC lands for proper heat
sinking. See Applications Information section for details.
SENSE(Pin13):CurrentAmplifierCA1Input. Sensingcan
be at either terminal of the battery.
SPIN (Pin 16): This pin is for the current amplifier CA1
bias. It must be connected to RS1 as shown in the 2A
Lithium Battery Charger (Figure 1).
SW(Pin4):SwitchOutput.TheSchottkycatchdiodemust
be placed with very short lead length in close proximity to
SW pin and GND.
BAT (Pin 17): Current Amplifier CA1 Input.
BOOST (Pin 5): This pin is used to bootstrap and drive the
switch power NPN transistor to a low on-voltage for low
power dissipation. In Figure 1, VBOOST = VCC + VBAT when
switch is on. For lowest IC power dissipation, connect
boost diode D1 to a 3V to 6V at 30mA voltage source (see
Figure 10).
COMP2 (Pin 18): This is also a compensation node for
amplifier CL1. Voltage on this pin rises to 2.8V at input
adapter current limit and/or at constant-voltage charging.
UVOUT (Pin 19): This is an open-collector output for
undervoltage lockout status. It stays low in undervoltage
state. Withanexternalpull-upresistor, itgoeshighatvalid
VCC. Note that the base drive of the open-collector NPN
comes from CLN pin. UVOUT stays low only when CLN is
higher than 2V. Pull-up current should be kept under
100µA.
UV(Pin6):UndervoltageLockoutInput.Therisingthresh-
old is at 6.7V with a hysteresis of 0.5V. Switching stops in
undervoltage lockout. When the input supply (normally
the wall adapter output) to the IC is removed, the UV pin
must be pulled down to below 0.7V (a 5k resistor from
adapter output to GND is required) otherwise the reverse
battery current drained by the IC will be approximately
200µA instead of 3µA. Do not leave the UV pin floating.
When connected to VIN with no resistor divider, the built-
in 6.7V undervoltage lockout will be effective.
VC (Pin 20): This is the inner loop control signal for the
current mode PWM. Switching starts at 0.7V. In normal
operation, a higher VC corresponds to higher charge
current. A capacitor of at least 0.33µF to GND filters out
noise and controls the rate of soft start. To stop switching,
pull this pin low. Typical output current is 30µA.
OVP (Pin 9): This is the input to amplifier VA with a
threshold of 2.465V. Typical bias current is about 3nA out
ofthispin. Forcharginglithium-ionbatteries, VAmonitors
the battery voltage and reduces charging when battery
voltage reaches the preset value. If it is not used, the OVP
pin should be grounded.
PROG (Pin 21): This pin is for programming the charge
currentandforsystemloopcompensation.Duringnormal
operation, VPROG stays close to 2.465V. If it is shorted to
GND switching will stop. When a microprocessor con-
trolled DAC is used to program charge current, it must be
capable of sinking current at a compliance up to 2.465V.
CLP (Pin 10): This is the positive input to the input current
limit amplifier CL1. The threshold is set at 100mV. When
used to limit supply current, a filter is needed to filter out
the 200kHz switching noise.
VCC1, VCC2, VCC3 (Pins 23 to 25): Input Supply. For good
bypass, a low ESR capacitor of 15µF or higher is required,
with the lead length kept to a minimum. VCC should be
between 8V and 28V and at least 3V higher than VBAT
.
CLN(Pin11):Thisisthenegativeinputtotheinputcurrent
limit amplifier CL1.
Undervoltage lockout starts and switching stops when
VCC goes below 7V typical. Note that there is an internal
parasitic diode from SW pin to VCC pin. Do not force VCC
belowSWbymorethan0.7Vwithbatterypresent.Allthree
VCC pins should be shorted together close to the pins.
COMP1 (Pin 12): This is the compensation node for the
input current limit amplifier CL1. At input adapter current
limit, this node rises to 1V. By forcing COMP1 low with an
external transistor, amplifier CL1 will be defeated (no
adapter current limit). COMP1 can source 200µA. If this
function is not used, the resistor and capacitor on COMP1
pin, shown on the Figure 1 circuit, are not needed.
6
LT1769
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BLOCK DIAGRAM
–
UV
UV
OUT
+
+
7V
200kHz
OSCILLATOR
+
SHUTDOWN
0.7V
V
CC
+
–
–
+
S
V
SW
BOOST
V
CC
R
R
R
Q
SW
SLOPE COMPENSATION
+
SW
1.5V
V
CC
SPIN
V
BAT
–
+
PWM
R
R
S3
SENSE
BAT
I
BAT
B1
+
–
C1
GND
+
–
CA1
R2
R3
R
S1
S2
I
R1
1k
PROG
BAT
0VP
+
–
–
+
VA
V
REF
V
C
CA2
2.465V
Ω
g
= 0.64
V
m
REF
75k
100mV
CLP
CLN
+
–
+
CL1
COMP1
COMP2
1769 BD
PROG
(I
)(R )
PROG S2
I
=
=
BAT
R
S1
R
R
2.465V
I
S2
S1
PROG
C
PROG
(
) (
)
R
PROG
(R = R
)
S3
S2
R
PROG
7
LT1769
TEST CIRCUITS
Test Circuit 1
SPIN
LT1769
R
S3
200Ω
SENSE
–
+
+
–
V
C
R
S1
100Ω
R
S2
200Ω
CA1
CA2
BAT
1k
60k
0.047µF
+
V
BAT
V
REF
PROG
1µF
300Ω
R
PROG
+
LT1006
1k
1769 TC01
–
+
≈ 0.65V
20k
Test Circuit 2
LT1769
OVP
+
VA
–
V
REF
10k
PROG
I
PROG
10k
–
LT1013
+
+
0.47µF
R
PROG
2.465V
1769 TC02
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OPERATION
The LT1769 is a current mode PWM step-down (buck)
switcher. The battery DC charge current is programmed
by a resistor RPROG (or a DAC output current) at the PROG
pin (see Block Diagram). Amplifier CA1 converts the
charge current through RS1 to a much lower current IPROG
fed into the PROG pin. Amplifier CA2 compares the output
of CA1 with the programmed current and drives the PWM
control loop to force them to be equal. High DC accuracy
is achieved with averaging capacitor CPROG. Note that
IPROG has both AC and DC components. IPROG goes
through R1 and generates a ramp signal that is fed to the
PWM control comparator C1 through buffer B1 and level
shift resistors R2 and R3, forming the current mode inner
loop. The BOOST pin drives the switch NPN QSW into
saturation and reduces power loss. For batteries like
lithium-ion that require both constant-current and con-
stant-voltage charging, the 0.5%, 2.465V reference and
the amplifier VA reduce the charge current when battery
voltage reaches the preset level. For NiMH and NiCd, VA
can be used for overvoltage protection. When the input
voltage is removed, the VCC pin drops to 0.7V below the
batteryvoltage, forcingthechargerintoalowbatterydrain
(3µA typical) sleep mode. To shut down the charger,
simply pull the VC pin low with a transistor.
8
LT1769
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APPLICATIONS INFORMATION
Input and Output Capacitors
current and the external capacitor. Charge current starts
ramping up when VC pin voltage reaches 0.7V and full
current is achieved with VC at 1.1V. With a 0.33µF capaci-
tor, thetimetoreachfullchargecurrentisabout10msand
it is assumed that input voltage to the charger will reach
full value in less than 10ms. The capacitor can be
increased up to 1µF if longer input start-up times are
needed.
In the 2A Lithium-Ion Battery Charger (Figure 1), the input
capacitor (CIN) is assumed to absorb all input switching
ripple current in the converter, so it must have adequate
ripple current rating. Worst-case RMS ripple current will
be equal to one half of the output charge current. Actual
capacitance value is not critical. Solid tantalum capacitors
such as the AVX TPS and Sprague 593D series have high
ripple current rating in a relatively small surface mount
package, but caution must be used when tantalum capaci-
tors are used for input bypass. High input surge currents
are possible when the adapter is hot-plugged to the
charger and solid tantalum capacitors have a known
failure mechanism when subjected to very high turn-on
surge currents. Selecting a high voltage rating on the
capacitor will minimize problems. Consult with the manu-
facturerbeforeuse.Alternativesincludenewhighcapacity
ceramic (5µF to 20µF) from Tokin or United Chemi-Con/
Marcon, et al. Sanyo OS-CON can also be used.
In any switching regulator, conventional time-based soft-
starting can be defeated if the input voltage rises much
slower than the time out period. This happens because the
switching regulators in the battery charger and the com-
puter power supply are typically supplying a fixed amount
of power to the load. If the input voltage comes up slowly
compared to the soft-start time, the regulators will try to
deliver full power to the load when the input voltage is still
well below its final value. If the adapter is current limited,
it cannot deliver full power at reduced output voltages and
the possibility exists for a quasi “latch” state where the
adapter output stays in a current limited state at reduced
output voltage. For instance, if maximum charger plus
computer load power is 25W, a 15V adapter might be
current limited at 2A. If adapter voltage is less than
(25W/2A = 12.5V) when full power is drawn, the adapter
voltage will be pulled down by the constant 25W load until
it reaches a lower stable state where the switching regu-
lators can no longer supply full load. This situation can be
prevented by utilizing undervoltage lockout, set higher
thantheminimumadaptervoltagewherefullpowercanbe
achieved.
The output capacitor (COUT) is also assumed to absorb
output switching ripple current. The general formula for
capacitor ripple current is:
V
BAT
0.29 (V ) 1 –
BAT
(
)
V
CC
I
=
RMS
(L1)(f)
For example, VCC = 16V, VBAT = 8.4V, L1 = 20µH,
and f = 200kHz, IRMS = 0.3A.
EMI considerations usually make it desirable to minimize
ripple current in the battery leads. Beads or inductors can
be added to increase battery impedance at the 200kHz
switching frequency. Switching ripple current splits be-
tween the battery and the output capacitor depending on
the ESR of the output capacitor and the battery imped-
ance. IftheESRofCOUT is0.2Ωandthebatteryimpedance
is raised to 4Ω with a bead or inductor, only 5% of the
ripple current will flow into the battery.
Afixedundervoltagelockoutof7VisbuiltintotheLT1769.
This 7V threshold can be increased by adding a resistive
divider to the UV pin as shown in Figure 2. Internal lockout
is performed by clamping the VC pin low. The VC pin is
released from its clamped state when the UV pin rises
above 7V and is pulled low when the UV pin drops below
6.5V (0.5V hysteresis). At the same time UVOUT goes high
with an external pull-up resistor. This signal can be used
to alert the system that charging is about to start. The
charger will start delivering current about 4ms after VC is
released, as set by the 0.33µF capacitor. A resistor divider
is used to set the desired VCC lockout voltage as shown in
Figure 2. A typical value for R6 is 5k and R5 is found from:
Soft-Start and Undervoltage Lockout
The LT1769 is soft-started by the 0.33µF capacitor on the
VC pin. On start-up, the VC pin voltage will quickly rise to
0.5V, then ramp at a rate set by the internal 45µA pull-up
9
LT1769
APPLICATIONS INFORMATION
U
W U U
ally, batteries will automatically be charged at the maximum
possible rate of which the adapter is capable.
R6(V – V )
IN
UV
R5 =
V
UV
This is accomplished by sensing total adapter output
current and adjusting the charge current downward if a
preset adapter current limit is exceeded. True analog
control is used, with closed-loop feedback ensuring that
adapter load current remains below the limit. Amplifier
CL1 in Figure 2 senses the voltage across RS4, connected
betweentheCLPandCLNpins. Whenthisvoltageexceeds
100mV,theamplifierwilloverridetheprogrammedcharge
current to limit adapter current to 100mV/RS4. A lowpass
filter formed by 500Ω and 1µF is required to eliminate
switching noise. If the input current limit is not used, both
CLP and CLN pins should be connected to VCC.
VUV = Rising lockout threshold on the UV pin
VIN =Chargerinputvoltagethatwillsustainfullloadpower
Example: With R6 = 5k, VUV = 6.7V and setting VIN at 12V;
R5 = 5k (12V – 6.7V)/6.7V = 4k
The resistor divider should be connected directly to the
adapter output as shown, not to the VCC pin, to prevent
battery drain with no adapter voltage. If the UV pin is not
used, connect it to the adapter output (not VCC) and
connect a resistor no greater than 5k to ground. Floating
this pin will cause reverse battery current to increase from
3µA to 200µA.
Charge Current Programming
If connecting the unused UV pin to the adapter output is
not possible, it can be grounded. Although it would seem
that grounding the pin creates a permanent lockout state,
the UV circuitry is arranged for phase reversal with low
voltages on the UV pin to allow the grounding technique to
work.
The basic formula for charge current is (see Block
Diagram):
R
R
2.465V R
S2
S1
S2
S1
I
= I
=
BAT
PROG
(
) (
) (
)
R
R
PROG
whereRPROG isthetotalresistancefromPROGpintoground.
100mV
CLP
+
For the sense amplifier CA1 biasing purpose, RS3 should
have the same value as RS2 and SPIN should be connected
directly to the sense resistor (RS1) as shown in the Block
Diagram.
+
1µF
CL1
500Ω
CLN
–
AC ADAPTER
OUTPUT
R
*
V
S4
CC
V
IN
+
For example, 2A charge current is needed. For low power
dissipation on RS1 and enough signal to drive the amplifier
CA1, let RS1 = 100mV/2A = 0.05Ω. This limits RS1 power
to 0.2W. Let RPROG = 5k, then:
R5
LT1769
UV
*R
R6
100mV
ADAPTER CURRENT LIMIT
=
S4
1769 F02
(I )(R
)(R )
S1
BAT
PROG
R
S2
= R
=
S3
Figure 2. Adapter Input Current Limiting
2.465V
(2A)(5k)(0.05)
2.465V
=
= 200Ω
Adapter Current Limiting
An important feature of the LT1769 is the ability to
automaticallyadjustchargecurrenttoalevelwhichavoids
overloading the wall adapter. This allows the product to
operate at the same time the batteries are being charged
without complex load management algorithms. Addition-
Charge current can also be programmed by pulse width
modulatingIPROG withaswitchQ1toRPROG atafrequency
higher than a few kHz (Figure 3). Charge current will be
proportionaltothedutycycleoftheswitchwithfullcurrent
at 100% duty cycle.
10
LT1769
U
W U U
APPLICATIONS INFORMATION
When power is on, there is about 200µA of current flowing
out of the BAT and SENSE pins. If the battery is removed
during charging, and total load including R3 and R4 is less
than 200µA, VBAT could float up to VCC even though the
loop has turned switching off. To keep VBAT regulated to
the battery voltage in this condition, R3 and R4 can be
chosen to draw 0.5mA and Q3 can be added to disconnect
them when power is off (Figure 4). R5 isolates the OVP pin
from any high frequency noise on VIN. An alternative method
is to use a Zener diode with a breakdown voltage two or three
volts higher than battery voltage to clamp the VBAT voltage.
LT1769
PROG
300Ω
R
C
PROG
PROG
4.7k
1µF
Q1
VN2222
5V
0V
PWM
= (DC)(2A)
1769 F03
I
BAT
Figure 3. PWM Current Programming
Lithium-Ion Charging
V
BAT
+
The 2A Lithium-Ion Battery Charger (Figure 1) charges at
aconstant2AuntilbatteryvoltagereachesalimitsetbyR3
and R4. The charger will then automatically go into a
constant-voltage mode with current decreasing to near
zeroovertimeasthebatteryreachesfullcharge.Thisisthe
normal regimen for lithium-ion charging, with the charger
holding the battery at “float” voltage indefinitely. In this
case no external sensing of full charge is needed.
R3
8.4V
12k
0.25%
Q3
VN2222
V
IN
LT1769
OVP
R5
220k
R4
4.99k
0.25%
1769 F04
Figure 4. Disconnecting Voltage Divider
Battery Voltage Sense Resistors Selection
To minimize battery drain when the charger is off, current
throughtheR3/R4dividerissetat15µA. Theinputcurrent
to the OVP pin is 3nA and the error can be neglected.
Some battery manufacturers recommend terminating the
constant-voltage float mode after charge current has
dropped below a specified level (typically around 10% of
the full current) and a further time out period of 30 to 90
minutes has elapsed. This may extend battery life, so
check with the manufacturer for details. The circuit in
Figure 5 will detect when charge current has dropped
below270mA. Thislogicsignalisusedtoinitiateatimeout
period, after which the LT1769 can be shut down by
pulling the VC pin low with an open collector or drain.
Some external means must be used to detect the need for
additional charging or the charger may be turned on
periodically to complete a short float-voltage cycle.
With divider current set at 15µA, VBAT = 8.4V, R4 =
2.465/15µA = 162k and,
R4 V
( )(
− 2.465 162k 8.4 − 2.465
)
(
)
BAT
R3 =
= 390k
=
2.465
2.465
Li-Ion batteries typically require float voltage accuracy of
1% to 2%. Accuracy of the LT1769 OVP voltage is ±0.5%
at 25°C and ±1% over full temperature. This leads to the
possibility that very accurate (0.1%) resistors might be
needed for R3 and R4. Actually, the temperature of the
LT1769 will rarely exceed 50°C in float mode because
chargingcurrentshavetaperedofftoalowlevel,so0.25%
resistors will normally provide the required level of overall
accuracy.
Current trip level is determined by the battery voltage, R1
through R3 and the sense resistor (RS1). D2 generates
hysteresis in the trip level to avoid multiple comparator
transitions.
11
LT1769
APPLICATIONS INFORMATION
U
W U U
I
BAT
2.465 2000
2.465 2000
(
)(
)
(
)(
)
R
R1=
R2 =
S3
200Ω
ILOW
IHI −ILOW
SENSE
R
All battery chargers with fast charge rates require some
meanstodetectfullcharge inthebatteryandterminatethe
highchargecurrent.NiCdbatteriesaretypicallychargedat
high current until a temperature rise or battery voltage
decrease is detected as an indication of near full charge.
The charging current is then reduced to a much lower
value and maintained as a constant trickle charge. An
intermediate “top off” current may also be used for a fixed
time period to reduce total charge time.
S1
LT1769
R
0.05Ω
S2
200Ω
BAT
V
BAT
ADAPTER
OUTPUT
3.3V OR 5V
D1
C1
0.1µF
R1*
1.6k
BAT
1N4148
R4
470k
3
2
8
–
7
NEGATIVE EDGE
TO TIMER
LT1011
+
4
1
R2
D2
1N4148
560k
NiMH batteries are similar in chemistry to NiCd but have
two differences related to charging. First, the inflection
characteristicinbatteryvoltageasfullchargeisapproached
is not nearly as pronounced. This makes it more difficult
to use –dV/dt as an indicator of full charge, and an
increase in battery temperature is more often used with a
temperature sensor in the battery pack. Secondly, con-
stant trickle charge may not be recommended. Instead, a
moderate level of current is used on a pulse basis (≈ 1%
to 5% duty cycle) with the time-averaged value substitut-
ing for a constant low trickle. Please contact the Linear
Technology Applications department about charge termi-
nation circuits.
R1(V
(R2 + R3)(R
)
R3
430k
BAT
* TRIP CURRENT =
)
S1
(1.6k)(8.4V)
=
≈ 270mA
(560k + 430k)(0.05Ω)
1769 F04
Figure 5. Current Comparator for Initiating Float Time Out
Nickel-Cadmium and Nickel-Metal-Hydride Charging
The 2A Lithium-Ion Battery Charger shown in Figure 1 can
be modified to charge NiCd or NiMH batteries. For ex-
ample, if a 2-level charge is needed; 1A when Q1 is on and
100mA when Q1 is off.
If overvoltage protection is needed, R3 and R4 can be cal-
culated according to the procedure described in Lithium-
Ion Charging section. The OVP pin should be grounded if
not used.
LT1769
PROG
R1
49.3k
R2
5.49k
When a microprocessor DAC output is used to control
charge current, it must be capable of sinking current at a
complianceupto2.5VifconnecteddirectlytothePROGpin.
300Ω
1µF
Q1
1769 F05
Thermal Calculations
Figure 6. 2-Level Charging
If the LT1769 is used for charging currents above 1A, a
thermal calculation should be done to ensure that junction
temperature will not exceed 125°C. Power dissipation in
the IC is caused by bias and driver current, switch resis-
tance and switch transition losses. The GN package, with
a thermal resistance of 35°C/W, can provide a full 2A
charging current in many situations. A graph is shown in
the Typical Performance Characteristics section.
For 1A full current, the current sense resistor (RS1) should
be increased to 0.1Ω so that enough signal (10mV) will be
across RS1 at 0.1A trickle charge to keep charging current
accurate.
For a 2-level charger, R1 and R2 are found from:
12
LT1769
U
W U U
APPLICATIONS INFORMATION
P
= 3.5mA V + 1.5mA V
(
)(
)
(
)
BIAS
IN
BAT
SW
LT1769
2
C2
V
(
)
BAT
+
7.5mA + 0.012 I
)(
(
)
[
]
BAT
L1
BOOST
V
IN
D2
V
30
2
BAT
I
(
V
1+
SPIN
)(
)
BAT BAT
P
P
=
V
X
DRIVER
1769 F07
+
55 V
I
(
)
)
VX
IN
10µF
2
I
(
R
V
V
SW BAT
) (
)(
BAT
=
+ t
(
V
I
f
)( )(
)( )
SW
OL IN BAT
IN
Figure 7. Lower VBOOST
RSW = Switch ON resistance ≈ 0.16Ω
OL = Effective switch overlap time ≈ 10ns
f = 200kHz
3.3V
30
2A 12.6V 3.3V 1+
t
(
)(
)(
)
P
=
= 0.09W
DRIVER
55 19V
(
)
Example: VIN = 19V, VBAT = 12.6V, IBAT = 2A:
The average IVX required is:
PBIAS = 3.5mA 19 + 1.5mA 12.6
(
)( )
(
)
P
0.09W
3.3V
DRIVER
2
)
=
= 28mA
12.6
(
VX
+
7.5mA + 0.012 2000mA = 0.35W
(
)(
)
]
[
19
The previous example shows the dramatic drop in driver
powerdissipationwhentheboostdiode(D2)isconnected
to an external 3.3V source instead of the 12.6V battery.
PDRIVER drops from 0.43W to 0.09W resulting in an
approximately 12°C drop in junction temperature.
2
)
12.6
30
2 12.6 1+
( )(
P
=
= 0.43W
DRIVER
55 19
( )
2
2
0.16 12.6
( ) (
)(
)
PSW
=
+ 10−9 19 2 200kHz
Fused-lead packages conduct most of their heat out the
leads. This makes it very important to provide as much PC
board copper around the leads as is practical. Total
thermal resistance of the package-board combination is
dominated by the characteristics of the board in the
immediate area of the package. This means both lateral
thermal resistance across the board and vertical thermal
resistance through the board to other copper layers. Each
layer acts as a thermal heat spreader that increases the
heat sinking effectiveness of extended areas of the board.
( )( )(
)
19
= 0.42 + 0.08 = 0.5W
Total Power in the IC is: 0.35 + 0.43 + 0.5 = 1.3W
Temperature rise will be (1.3W)(35°C/W) = 46°C. This
assumes that the LT1769 is properly heat sunk by con-
necting the eleven fused ground pins to expanded traces
and that the PC board has a backside or internal plane for
heat spreading.
The PDRIVER term can be reduced by connecting the boost
diode D2 (see Figure 7) to a lower system voltage (lower
Total board area becomes an important factor when the
areaoftheboarddropsbelowabout20squareinches. The
graph in Figure 8 shows thermal resistance vs board area
for 2-layer and 4-layer boards with continuous copper
planes. Note that 4-layer boards have significantly lower
thermal resistance, but both types show a rapid increase
for reduced board areas. Figure 9 shows actual measured
lead temperatures for chargers operating at full current.
than VBAT) instead of VBAT
.
V
30
X
I
(
V
V
1+
)(
)(
)
)
BAT BAT
X
Then P
=
DRIVER
55 V
(
IN
For example, VX = 3.3V then:
13
LT1769
U
W U U
APPLICATIONS INFORMATION
45
40
35
30
STANDARD CONNECTION
HIGH DUTY CYCLE CONNECTION
SW
C3
0.47µF
SW
C3
0.47µF
BOOST
LT1769
BOOST
LT1769
SPIN
SENSE
D2
D2
SPIN
2-LAYER BOARD
25
4-LAYER BOARD
20
V
X
3V TO 6V
SENSE
BAT
BAT
C
X
10µF
V
BAT
V
MEASURED FROM AIR AMBIENT
BAT
15
TO DIE USING COPPER LANDS
+
+
AS SHOWN ON DATA SHEET
10
20
BOARD AREA (IN2)
30
35
1769 F08
0
5
10
15
25
1769 F10
Figure 10. High Duty Cycle
Figure 8. LT1769 Thermal Resistance
HIGH DUTY CYCLE CONNECTION
V
IN
70
+
Q1
NOTE: PEAK DIE TEMPERATURE
WILL BE ABOUT 15°C HIGHER AT
2A CHARGE CURRENT
60
Q2
D1
V
CC
SW
V
V
V
= 19V
IN
C2
2
5 IN BOARD
= 12.3V
BAT
0.47µF
R
50
40
30
20
X
50k
= 5V
BOOST
LT1769
BOOST
2-LAYER BOARD
D2
ROOM TEMP = 24°C
SPIN
V
X
2
SENSE
BAT
Q1 = Si4435DY
Q2 = TP0610L
3V TO 6V
25 IN BOARD
C
X
10µF
V
BAT
+
1
1.5
0
0.5
2
CHARGE CURRENT (A)
1769 F09
1769 F11
Figure 11. Replacing the Input Diode
Figure 9. LT1769 Lead Temperature
Higher Duty Cycle for the LT1769 Battery Charger
Battery voltage and input voltage will affect device power
dissipation, so the data sheet power calculations must be
used to extrapolate these readings to other situations.
Maximum duty cycle for the LT1769 is typically 90%, but
this may be too low for some applications. For example, if
an 18V ±3% adapter is used to charge ten NiMH cells, the
charger must put out approximaly 15V. A total of 1.6V is
lost in the input diode, switch resistance, inductor resis-
tance and parasitics, so the required duty cycle is
15/16.4 = 91.4%. The duty cycle can be extended to 93%
by restricting boost voltage to 5V instead of using VBAT as
is normally done. This lower boost voltage also reduces
power dissipation in the LT1769, so it is a win-win deci-
sion. Connect an external source of 3V to 6V at VX node in
Figure 10 with a 10µF CX bypass capacitor.
Vias should be used to connect board layers together.
Planes under the charger area can be cut away from the
rest of the board and connected with vias to form both a
low thermal resistance system and to act as a ground
plane for reduced EMI.
Glue-on, chip-mounted heat sinks are effective only in
moderate power applications where the PC board copper
cannot be used, or where the board size is small. They
offer very little improvement in a properly laid out multi-
layer board of reasonable size.
14
LT1769
U
W U U
APPLICATIONS INFORMATION
Lower Dropout Voltage
pin to the VCC pin in the LT1769. When the input power is
removed, this diode will become forward biased and will
provide a current path from the battery to the system load.
Because of diode power limitations, it is not recom-
mended to power the system load through the internal
parasitic diode. To safely power the system load from the
battery, an additional Schottky diode (D4) is needed. For
minimum losses, D4 could be replaced by a low RDS(ON)
MOSFET which is turned on when the adapter power is
removed.
Forevenlowerdropoutand/orreducingheatontheboard,
the input diode D3 can be replaced with a FET (see Figure
11). Connect a P-channel FET in place of the input diode
with its gate connected to the battery causing the FET to
turn off when the input voltage goes low. The problem is
that the gate must be pumped low so that the FET is fully
turned on even when the input is only a volt or two above
the battery voltage. Also there is a turn-off speed issue.
The FET should turn off instantly when the input is dead
shorted to avoid large current surges from the battery
back through the charger into the FET. Gate capacitance
slows turn-off, so a small P-channel (Q2) is added to
discharge the gate capacitance quickly in the event of an
input short. The Q2 body diode creates the necessary
pumping action to keep the gate of Q1 low during normal
operation. Note that Q1 and Q2 have a VGS spec limit of
20V. This restricts VIN to a maximum of 20V. For low
dropout operation with VIN > 20V consult factory.
Layout Considerations
Switch rise and fall times are under 10ns for maximum
efficiency. To minimize radiation, the catch diode, SW pin
and input bypass capacitor leads should be kept as short
as possible. A ground plane should be used under the
switching circuitry to prevent interplane coupling and to
act as a thermal spreading path. All ground pins should be
connected to expanded traces for low thermal resistance.
Thefast-switchinghighcurrentgroundpath,includingthe
switch, catch diode and input capacitor, should be kept
very short. Catch diode and input capacitor should be
close to the chip and terminated to the same point. This
path contains nanosecond rise and fall times with several
amps of current. The other paths contain only DC and/or
200kHz tri-wave and are less critical. Figure 13 indicates
the high speed, high current switching path. Figure 14
shows critical path layout. Contact Linear Technology for
the LT1769 circuit PCB layout or Gerber file.
Optional Diode Connections
The typical application in Figure 1 shows a single diode
(D3) to isolate the VCC pin from the adaptor input and to
block reverse input voltage (both steady state and tran-
sient). This simple connection may be unacceptable in
situations where the system load must be powered from
the battery when the adapter input power is removed. As
shown in Figure 12, a parasitic diode exists from the SW
R7
D3
500Ω
SWITCH NODE
L1
ADAPTER
IN
CLP
LT1769
+
+
V
BAT
C1
CLN
R
1µF
S4
TO
SYSTEM
LOAD
V
SW
CC
HIGH
FREQUENCY
CIRCULATING
PATH
C
D1
C
OUT
V
IN
BAT
INTERNAL
PARASITIC
DIODE
IN
C
IN
D4
L1
R
S1
+
1769 F13
1769 F12a
Figure 13. High Speed Switching Path
Figure 12. Modified Diode Connection
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tationthattheinterconnectionofitscircuitsasdescribedhereinwillnotinfringeonexistingpatentrights.
15
LT1769
U
W U U
APPLICATIONS INFORMATION
GND
D1
C
IN
GND
GND
GND
SW
BOOST
UV
GND
GND
OVP
CLP
CLN
COMP1
SENSE
GND
GND
GND
GND
V
CC1
V
CC2
V
CC3
GND
PROG
TO
GND
L1
V
C
UV
OUT
COMP2
BAT
TO
GND
SPIN
GND
R
S1
C
OUT
GND
NOTE: CONNECT ALL GND PINS TO EXPANDED PC LANDS FOR PROPER HEAT SINKING
1769 F14
Figure 14. Critical Electrical and Thermal Path Layout
U
PACKAGE DESCRIPTION Dimensions in inches (millimeters) unless otherwise noted.
GN Package
28-Lead Plastic SSOP (Narrow 0.150)
(LTC DWG # 05-08-1641)
0.386 – 0.393*
(9.804 – 9.982)
0.033
(0.838)
REF
0.015 ± 0.004
(0.38 ± 0.10)
28 27 26 25 24 23 22 21 20 19 18 17 1615
0.053 – 0.069
(1.351 – 1.748)
0.004 – 0.009
(0.102 – 0.249)
× 45°
0.0075 – 0.0098
(0.191 – 0.249)
0° – 8° TYP
0.229 – 0.244
(5.817 – 6.198)
0.150 – 0.157**
(3.810 – 3.988)
0.016 – 0.050
(0.406 – 1.270)
0.008 – 0.012
(0.203 – 0.305)
0.0250
(0.635)
BSC
* DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
GN28 (SSOP) 1098
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
1
2
3
4
5
6
7
8
9 10 11 12 13 14
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Pin, Charger and Battery Detection
LTC1759
SMBus Smart Battery Charger
94% Efficiency with Input Current Limiting, Up to 8A I
CHG
1769f LT/TP 0999 4K • PRINTED IN USA
16 LinearTechnology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
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LINEAR TECHNOLOGY CORPORATION 1999
(408)432-1900 FAX:(408)434-0507 www.linear-tech.com
相关型号:
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